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gic: fixed compilation error in GICv2 wait for interrupt macro
[karo-tx-uboot.git] / board / prodrive / p3mx / p3mx.c
1 /*
2  * (C) Copyright 2006
3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
4  *
5  * Based on original work by
6  *      Roel Loeffen, (C) Copyright 2006 Prodrive B.V.
7  *      Josh Huber, (C) Copyright 2001 Mission Critical Linux, Inc.
8  *
9  * SPDX-License-Identifier:     GPL-2.0+
10  *
11  * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
12  * modifications for the cpci750 by reinhard.arlt@esd-electronics.com
13  * modifications for the P3M750 by roel.loeffen@prodrive.nl
14  */
15
16 /*
17  * p3m750.c - main board support/init for the Prodrive p3m750/p3m7448.
18  */
19
20 #include <common.h>
21 #include <74xx_7xx.h>
22 #include "../../Marvell/include/memory.h"
23 #include "../../Marvell/include/pci.h"
24 #include "../../Marvell/include/mv_gen_reg.h"
25 #include <net.h>
26 #include <i2c.h>
27
28 #include "eth.h"
29 #include "mpsc.h"
30 #include "64460.h"
31 #include "mv_regs.h"
32 #include "p3mx.h"
33
34 DECLARE_GLOBAL_DATA_PTR;
35
36 #undef  DEBUG
37 /*#define       DEBUG */
38
39 #ifdef CONFIG_PCI
40 #define MAP_PCI
41 #endif /* of CONFIG_PCI */
42
43 #ifdef DEBUG
44 #define DP(x) x
45 #else
46 #define DP(x)
47 #endif
48
49 extern flash_info_t flash_info[];
50
51 /* ------------------------------------------------------------------------- */
52
53 /* this is the current GT register space location */
54 /* it starts at CONFIG_SYS_DFL_GT_REGS but moves later to CONFIG_SYS_GT_REGS */
55
56 /* Unfortunately, we cant change it while we are in flash, so we initialize it
57  * to the "final" value. This means that any debug_led calls before
58  * board_early_init_f wont work right (like in cpu_init_f).
59  * See also my_remap_gt_regs below. (NTL)
60  */
61
62 void board_prebootm_init (void);
63 unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS;
64 int display_mem_map (void);
65 void set_led(int);
66
67 /* ------------------------------------------------------------------------- */
68
69 /*
70  * This is a version of the GT register space remapping function that
71  * doesn't touch globals (meaning, it's ok to run from flash.)
72  *
73  * Unfortunately, this has the side effect that a writable
74  * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
75  */
76
77 void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
78 {
79         u32 temp;
80
81         /* check and see if it's already moved */
82         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
83         if ((temp & 0xffff) == new_loc >> 16)
84                 return;
85
86         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
87                 0xffff0000) | (new_loc >> 16);
88
89         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
90
91         while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
92 }
93
94 #ifdef CONFIG_PCI
95
96 static void gt_pci_config (void)
97 {
98         unsigned int stat;
99         unsigned int val = 0x00fff864;  /* DINK32: BusNum 23:16,  DevNum 15:11, */
100                                         /* FuncNum 10:8, RegNum 7:2 */
101
102         /*
103          * In PCIX mode devices provide their own bus and device numbers.
104          * We query the Discovery II's
105          * config registers by writing ones to the bus and device.
106          * We then update the Virtual register with the correct value for the
107          * bus and device.
108          */
109         if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) {    /* if  PCI-X */
110                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
111
112                 GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
113
114                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
115                 GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
116                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
117
118         }
119         if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) {    /* if  PCI-X */
120                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
121                 GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
122
123                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
124                 GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
125                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
126         }
127
128         /* Enable master */
129         PCI_MASTER_ENABLE (0, SELF);
130         PCI_MASTER_ENABLE (1, SELF);
131
132         /* Enable PCI0/1 Mem0 and IO 0 disable all others */
133         GT_REG_READ (BASE_ADDR_ENABLE, &stat);
134         stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) |
135                 (1 << 18);
136         stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
137         GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
138
139         /* ronen:
140          * add write to pci remap registers for 64460.
141          * in 64360 when writing to pci base go and overide remap automaticaly,
142          * in 64460 it doesn't
143          */
144         GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CONFIG_SYS_PCI0_IO_SPACE >> 16);
145         GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CONFIG_SYS_PCI0_IO_SPACE_PCI >> 16);
146         GT_REG_WRITE (PCI_0_IO_SIZE, (CONFIG_SYS_PCI0_IO_SIZE - 1) >> 16);
147
148         GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI0_MEM_BASE >> 16);
149         GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI0_MEM_BASE >> 16);
150         GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CONFIG_SYS_PCI0_MEM_SIZE - 1) >> 16);
151
152         GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CONFIG_SYS_PCI1_IO_SPACE >> 16);
153         GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CONFIG_SYS_PCI1_IO_SPACE_PCI >> 16);
154         GT_REG_WRITE (PCI_1_IO_SIZE, (CONFIG_SYS_PCI1_IO_SIZE - 1) >> 16);
155
156         GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI1_MEM_BASE >> 16);
157         GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI1_MEM_BASE >> 16);
158         GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CONFIG_SYS_PCI1_MEM_SIZE - 1) >> 16);
159
160         /* PCI interface settings */
161         /* Timeout set to retry forever */
162         GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
163         GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
164
165         /* ronen - enable only CS0 and Internal reg!! */
166         GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
167         GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
168
169         /* ronen:
170          * update the pci internal registers base address.
171          */
172 #ifdef MAP_PCI
173         for (stat = 0; stat <= PCI_HOST1; stat++)
174                 pciWriteConfigReg (stat,
175                                    PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
176                                    SELF, CONFIG_SYS_GT_REGS);
177 #endif
178
179 }
180 #endif
181
182 /* Setup CPU interface paramaters */
183 static void gt_cpu_config (void)
184 {
185         cpu_t cpu = get_cpu_type ();
186         ulong tmp;
187
188         /* cpu configuration register */
189         tmp = GTREGREAD (CPU_CONFIGURATION);
190         /* set the SINGLE_CPU bit  see MV64460 */
191 #ifndef CONFIG_SYS_GT_DUAL_CPU          /* SINGLE_CPU seems to cause JTAG problems */
192         tmp |= CPU_CONF_SINGLE_CPU;
193 #endif
194         tmp &= ~CPU_CONF_AACK_DELAY_2;
195         tmp |= CPU_CONF_DP_VALID;
196         tmp |= CPU_CONF_AP_VALID;
197         tmp |= CPU_CONF_PIPELINE;
198         GT_REG_WRITE (CPU_CONFIGURATION, tmp);  /* Marvell (VXWorks) writes 0x20220FF */
199
200         /* CPU master control register */
201         tmp = GTREGREAD (CPU_MASTER_CONTROL);
202         tmp |= CPU_MAST_CTL_ARB_EN;
203
204         if ((cpu == CPU_7400) ||
205             (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
206
207                 tmp |= CPU_MAST_CTL_CLEAN_BLK;
208                 tmp |= CPU_MAST_CTL_FLUSH_BLK;
209
210         } else {
211                 /* cleanblock must be cleared for CPUs
212                  * that do not support this command (603e, 750)
213                  * see Res#1 */
214                 tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
215                 tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
216         }
217         GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
218 }
219
220 /*
221  * board_early_init_f.
222  *
223  * set up gal. device mappings, etc.
224  */
225 int board_early_init_f (void)
226 {
227         /* set up the GT the way the kernel wants it
228          * the call to move the GT register space will obviously
229          * fail if it has already been done, but we're going to assume
230          * that if it's not at the power-on location, it's where we put
231          * it last time. (huber)
232          */
233         my_remap_gt_regs (CONFIG_SYS_DFL_GT_REGS, CONFIG_SYS_GT_REGS);
234
235 #ifdef CONFIG_PCI
236         gt_pci_config ();
237 #endif
238         /* mask all external interrupt sources */
239         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
240         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
241         /* new in >MV6436x */
242         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
243         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
244         /* --------------------- */
245         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
246         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
247         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
248         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
249
250         /* Device and Boot bus settings
251          */
252         memoryMapDeviceSpace(DEVICE0, 0, 0);
253         GT_REG_WRITE(DEVICE_BANK0PARAMETERS, 0);
254         memoryMapDeviceSpace(DEVICE1, 0, 0);
255         GT_REG_WRITE(DEVICE_BANK1PARAMETERS, 0);
256         memoryMapDeviceSpace(DEVICE2, 0, 0);
257         GT_REG_WRITE(DEVICE_BANK2PARAMETERS, 0);
258         memoryMapDeviceSpace(DEVICE3, 0, 0);
259         GT_REG_WRITE(DEVICE_BANK3PARAMETERS, 0);
260
261         GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_BOOT_PAR);
262
263         gt_cpu_config();
264
265         /* MPP setup */
266         GT_REG_WRITE (MPP_CONTROL0, CONFIG_SYS_MPP_CONTROL_0);
267         GT_REG_WRITE (MPP_CONTROL1, CONFIG_SYS_MPP_CONTROL_1);
268         GT_REG_WRITE (MPP_CONTROL2, CONFIG_SYS_MPP_CONTROL_2);
269         GT_REG_WRITE (MPP_CONTROL3, CONFIG_SYS_MPP_CONTROL_3);
270
271         GT_REG_WRITE (GPP_LEVEL_CONTROL, CONFIG_SYS_GPP_LEVEL_CONTROL);
272
273         set_led(LED_RED);
274
275         return 0;
276 }
277
278 /* various things to do after relocation */
279
280 int misc_init_r ()
281 {
282         u8 val;
283
284         icache_enable ();
285 #ifdef CONFIG_SYS_L2
286         l2cache_enable ();
287 #endif
288 #ifdef CONFIG_MPSC
289         mpsc_sdma_init ();
290         mpsc_init2 ();
291 #endif
292
293         /*
294          * Enable trickle changing in RTC upon powerup
295          * No diode, 250 ohm series resistor
296          */
297         val = 0xa5;
298         i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 8, 1, &val, 1);
299
300         return 0;
301 }
302
303 void after_reloc (ulong dest_addr, gd_t * gd)
304 {
305         memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE, CONFIG_SYS_BOOT_SIZE);
306
307 /*      display_mem_map(); */
308
309         /* now, jump to the main U-Boot board init code */
310         set_led(LED_GREEN);
311         board_init_r (gd, dest_addr);
312         /* NOTREACHED */
313 }
314
315 /*
316  * Check Board Identity:
317  * right now, assume borad type. (there is just one...after all)
318  */
319
320 int checkboard (void)
321 {
322         char buf[64];
323         int i = getenv_f("serial#", buf, sizeof(buf));
324
325         printf("Board: %s", CONFIG_SYS_BOARD_NAME);
326
327         if (i > 0) {
328                 puts(", serial# ");
329                 puts(buf);
330         }
331         putc('\n');
332
333         return (0);
334 }
335
336 void set_led(int col)
337 {
338         int tmp;
339         int on_pin;
340         int off_pin;
341
342         /* Program Mpp[22] as Gpp[22]
343          * Program Mpp[23] as Gpp[23]
344          */
345         tmp = GTREGREAD(MPP_CONTROL2);
346         tmp &= 0x00ffffff;
347         GT_REG_WRITE(MPP_CONTROL2,tmp);
348
349         /* Program Gpp[22] and Gpp[23] as output
350          */
351         tmp = GTREGREAD(GPP_IO_CONTROL);
352         tmp |= 0x00C00000;
353         GT_REG_WRITE(GPP_IO_CONTROL, tmp);
354
355         /* Program Gpp[22] and Gpp[23] as active high
356          */
357         tmp = GTREGREAD(GPP_LEVEL_CONTROL);
358         tmp &= 0xff3fffff;
359         GT_REG_WRITE(GPP_LEVEL_CONTROL, tmp);
360
361         switch(col) {
362         default:
363         case LED_OFF :
364                 on_pin  = 0;
365                 off_pin = ((1 << 23) | (1 << 22));
366                 break;
367         case LED_RED :
368                 on_pin  = (1 << 23);
369                 off_pin = (1 << 22);
370                 break;
371         case LED_GREEN :
372                 on_pin  = (1 << 22);
373                 off_pin = (1 << 23);
374                 break;
375         case LED_ORANGE :
376                 on_pin  = ((1 << 23) | (1 << 22));
377                 off_pin = 0;
378                 break;
379         }
380
381         /* Set output Gpp[22] and Gpp[23]
382          */
383         tmp = GTREGREAD(GPP_VALUE);
384         tmp |= on_pin;
385         tmp &= ~off_pin;
386         GT_REG_WRITE(GPP_VALUE, tmp);
387 }
388
389 int display_mem_map (void)
390 {
391         int i;
392         unsigned int base, size, width;
393 #ifdef CONFIG_PCI
394         int j;
395 #endif
396
397         /* SDRAM */
398         printf ("SD (DDR) RAM\n");
399         for (i = 0; i <= BANK3; i++) {
400                 base = memoryGetBankBaseAddress (i);
401                 size = memoryGetBankSize (i);
402                 if (size != 0)
403                         printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
404                                 i, base, size >> 20);
405         }
406 #ifdef CONFIG_PCI
407         /* CPU's PCI windows */
408         for (i = 0; i <= PCI_HOST1; i++) {
409                 printf ("\nCPU's PCI %d windows\n", i);
410                 base = pciGetSpaceBase (i, PCI_IO);
411                 size = pciGetSpaceSize (i, PCI_IO);
412                 printf ("      IO: base - 0x%08x\tsize - %dM bytes\n", base,
413                         size >> 20);
414                 /* ronen currently only first PCI MEM is used 3 */
415                 for (j = 0; j <= PCI_REGION0; j++) {
416                         base = pciGetSpaceBase (i, j);
417                         size = pciGetSpaceSize (i, j);
418                         printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n",
419                                 j, base, size >> 20);
420                 }
421         }
422 #endif /* of CONFIG_PCI */
423
424         /* Bootrom */
425         base = memoryGetDeviceBaseAddress (BOOT_DEVICE);        /* Boot */
426         size = memoryGetDeviceSize (BOOT_DEVICE);
427         width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
428         printf (" BOOT:  base - 0x%08x  size - %dM bytes\twidth - %d bits\t- FLASH\n",
429                 base, size >> 20, width);
430
431         return (0);
432 }
433
434 /* DRAM check routines copied from gw8260 */
435
436 #if defined (CONFIG_SYS_DRAM_TEST)
437
438 /*********************************************************************/
439 /* NAME:  move64() -  moves a double word (64-bit)                   */
440 /*                                                                   */
441 /* DESCRIPTION:                                                      */
442 /*   this function performs a double word move from the data at      */
443 /*   the source pointer to the location at the destination pointer.  */
444 /*                                                                   */
445 /* INPUTS:                                                           */
446 /*   unsigned long long *src  - pointer to data to move              */
447 /*                                                                   */
448 /* OUTPUTS:                                                          */
449 /*   unsigned long long *dest - pointer to locate to move data       */
450 /*                                                                   */
451 /* RETURNS:                                                          */
452 /*   None                                                            */
453 /*                                                                   */
454 /* RESTRICTIONS/LIMITATIONS:                                         */
455 /*   May cloober fr0.                                                */
456 /*                                                                   */
457 /*********************************************************************/
458 static void move64 (unsigned long long *src, unsigned long long *dest)
459 {
460         asm ("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
461              "stfd 0, 0(4)"     /* *dest  =  fpr0       */
462              : : : "fr0");              /* Clobbers fr0         */
463         return;
464 }
465
466
467 #if defined (CONFIG_SYS_DRAM_TEST_DATA)
468
469 unsigned long long pattern[] = {
470         0xaaaaaaaaaaaaaaaaULL,
471         0xccccccccccccccccULL,
472         0xf0f0f0f0f0f0f0f0ULL,
473         0xff00ff00ff00ff00ULL,
474         0xffff0000ffff0000ULL,
475         0xffffffff00000000ULL,
476         0x00000000ffffffffULL,
477         0x0000ffff0000ffffULL,
478         0x00ff00ff00ff00ffULL,
479         0x0f0f0f0f0f0f0f0fULL,
480         0x3333333333333333ULL,
481         0x5555555555555555ULL
482 };
483
484 /*********************************************************************/
485 /* NAME:  mem_test_data() -  test data lines for shorts and opens    */
486 /*                                                                   */
487 /* DESCRIPTION:                                                      */
488 /*   Tests data lines for shorts and opens by forcing adjacent data  */
489 /*   to opposite states. Because the data lines could be routed in   */
490 /*   an arbitrary manner the must ensure test patterns ensure that   */
491 /*   every case is tested. By using the following series of binary   */
492 /*   patterns every combination of adjacent bits is test regardless  */
493 /*   of routing.                                                     */
494 /*                                                                   */
495 /*     ...101010101010101010101010                                   */
496 /*     ...110011001100110011001100                                   */
497 /*     ...111100001111000011110000                                   */
498 /*     ...111111110000000011111111                                   */
499 /*                                                                   */
500 /*   Carrying this out, gives us six hex patterns as follows:        */
501 /*                                                                   */
502 /*     0xaaaaaaaaaaaaaaaa                                            */
503 /*     0xcccccccccccccccc                                            */
504 /*     0xf0f0f0f0f0f0f0f0                                            */
505 /*     0xff00ff00ff00ff00                                            */
506 /*     0xffff0000ffff0000                                            */
507 /*     0xffffffff00000000                                            */
508 /*                                                                   */
509 /*   The number test patterns will always be given by:               */
510 /*                                                                   */
511 /*   log(base 2)(number data bits) = log2 (64) = 6                   */
512 /*                                                                   */
513 /*   To test for short and opens to other signals on our boards. we  */
514 /*   simply                                                          */
515 /*   test with the 1's complemnt of the paterns as well.             */
516 /*                                                                   */
517 /* OUTPUTS:                                                          */
518 /*   Displays failing test pattern                                   */
519 /*                                                                   */
520 /* RETURNS:                                                          */
521 /*   0 -  Passed test                                                */
522 /*   1 -  Failed test                                                */
523 /*                                                                   */
524 /* RESTRICTIONS/LIMITATIONS:                                         */
525 /*  Assumes only one one SDRAM bank                                  */
526 /*                                                                   */
527 /*********************************************************************/
528 int mem_test_data (void)
529 {
530         unsigned long long *pmem = (unsigned long long *) CONFIG_SYS_MEMTEST_START;
531         unsigned long long temp64 = 0;
532         int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
533         int i;
534         unsigned int hi, lo;
535
536         for (i = 0; i < num_patterns; i++) {
537                 move64 (&(pattern[i]), pmem);
538                 move64 (pmem, &temp64);
539
540                 /* hi = (temp64>>32) & 0xffffffff;          */
541                 /* lo = temp64 & 0xffffffff;                */
542                 /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
543
544                 hi = (pattern[i] >> 32) & 0xffffffff;
545                 lo = pattern[i] & 0xffffffff;
546                 /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo);  */
547
548                 if (temp64 != pattern[i]) {
549                         printf ("\n   Data Test Failed, pattern 0x%08x%08x",
550                                 hi, lo);
551                         return 1;
552                 }
553         }
554
555         return 0;
556 }
557 #endif /* CONFIG_SYS_DRAM_TEST_DATA */
558
559 #if defined (CONFIG_SYS_DRAM_TEST_ADDRESS)
560 /*********************************************************************/
561 /* NAME:  mem_test_address() -  test address lines                   */
562 /*                                                                   */
563 /* DESCRIPTION:                                                      */
564 /*   This function performs a test to verify that each word im       */
565 /*   memory is uniquly addressable. The test sequence is as follows: */
566 /*                                                                   */
567 /*   1) write the address of each word to each word.                 */
568 /*   2) verify that each location equals its address                 */
569 /*                                                                   */
570 /* OUTPUTS:                                                          */
571 /*   Displays failing test pattern and address                       */
572 /*                                                                   */
573 /* RETURNS:                                                          */
574 /*   0 -  Passed test                                                */
575 /*   1 -  Failed test                                                */
576 /*                                                                   */
577 /* RESTRICTIONS/LIMITATIONS:                                         */
578 /*                                                                   */
579 /*                                                                   */
580 /*********************************************************************/
581 int mem_test_address (void)
582 {
583         volatile unsigned int *pmem =
584                 (volatile unsigned int *) CONFIG_SYS_MEMTEST_START;
585         const unsigned int size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 4;
586         unsigned int i;
587
588         /* write address to each location */
589         for (i = 0; i < size; i++)
590                 pmem[i] = i;
591
592         /* verify each loaction */
593         for (i = 0; i < size; i++) {
594                 if (pmem[i] != i) {
595                         printf ("\n   Address Test Failed at 0x%x", i);
596                         return 1;
597                 }
598         }
599         return 0;
600 }
601 #endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */
602
603 #if defined (CONFIG_SYS_DRAM_TEST_WALK)
604 /*********************************************************************/
605 /* NAME:   mem_march() -  memory march                               */
606 /*                                                                   */
607 /* DESCRIPTION:                                                      */
608 /*   Marches up through memory. At each location verifies rmask if   */
609 /*   read = 1. At each location write wmask if  write = 1. Displays  */
610 /*   failing address and pattern.                                    */
611 /*                                                                   */
612 /* INPUTS:                                                           */
613 /*   volatile unsigned long long * base - start address of test      */
614 /*   unsigned int size - number of dwords(64-bit) to test            */
615 /*   unsigned long long rmask - read verify mask                     */
616 /*   unsigned long long wmask - wrtie verify mask                    */
617 /*   short read - verifies rmask if read = 1                         */
618 /*   short write  - writes wmask if write = 1                        */
619 /*                                                                   */
620 /* OUTPUTS:                                                          */
621 /*   Displays failing test pattern and address                       */
622 /*                                                                   */
623 /* RETURNS:                                                          */
624 /*   0 -  Passed test                                                */
625 /*   1 -  Failed test                                                */
626 /*                                                                   */
627 /* RESTRICTIONS/LIMITATIONS:                                         */
628 /*                                                                   */
629 /*                                                                   */
630 /*********************************************************************/
631 int mem_march (volatile unsigned long long *base,
632                unsigned int size,
633                unsigned long long rmask,
634                unsigned long long wmask, short read, short write)
635 {
636         unsigned int i;
637         unsigned long long temp = 0;
638         unsigned int hitemp, lotemp, himask, lomask;
639
640         for (i = 0; i < size; i++) {
641                 if (read != 0) {
642                         /* temp = base[i]; */
643                         move64 ((unsigned long long *) &(base[i]), &temp);
644                         if (rmask != temp) {
645                                 hitemp = (temp >> 32) & 0xffffffff;
646                                 lotemp = temp & 0xffffffff;
647                                 himask = (rmask >> 32) & 0xffffffff;
648                                 lomask = rmask & 0xffffffff;
649
650                                 printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
651                                 return 1;
652                         }
653                 }
654                 if (write != 0) {
655                         /*  base[i] = wmask; */
656                         move64 (&wmask, (unsigned long long *) &(base[i]));
657                 }
658         }
659         return 0;
660 }
661 #endif /* CONFIG_SYS_DRAM_TEST_WALK */
662
663 /*********************************************************************/
664 /* NAME:   mem_test_walk() -  a simple walking ones test             */
665 /*                                                                   */
666 /* DESCRIPTION:                                                      */
667 /*   Performs a walking ones through entire physical memory. The     */
668 /*   test uses as series of memory marches, mem_march(), to verify   */
669 /*   and write the test patterns to memory. The test sequence is as  */
670 /*   follows:                                                        */
671 /*     1) march writing 0000...0001                                  */
672 /*     2) march verifying 0000...0001  , writing  0000...0010        */
673 /*     3) repeat step 2 shifting masks left 1 bit each time unitl    */
674 /*         the write mask equals 1000...0000                         */
675 /*     4) march verifying 1000...0000                                */
676 /*   The test fails if any of the memory marches return a failure.   */
677 /*                                                                   */
678 /* OUTPUTS:                                                          */
679 /*   Displays which pass on the memory test is executing             */
680 /*                                                                   */
681 /* RETURNS:                                                          */
682 /*   0 -  Passed test                                                */
683 /*   1 -  Failed test                                                */
684 /*                                                                   */
685 /* RESTRICTIONS/LIMITATIONS:                                         */
686 /*                                                                   */
687 /*                                                                   */
688 /*********************************************************************/
689 int mem_test_walk (void)
690 {
691         unsigned long long mask;
692         volatile unsigned long long *pmem =
693                 (volatile unsigned long long *) CONFIG_SYS_MEMTEST_START;
694         const unsigned long size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 8;
695
696         unsigned int i;
697
698         mask = 0x01;
699
700         printf ("Initial Pass");
701         mem_march (pmem, size, 0x0, 0x1, 0, 1);
702
703         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
704         printf ("               ");
705         printf ("         ");
706         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
707
708         for (i = 0; i < 63; i++) {
709                 printf ("Pass %2d", i + 2);
710                 if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
711                         /*printf("mask: 0x%x, pass: %d, ", mask, i); */
712                         return 1;
713                 }
714                 mask = mask << 1;
715                 printf ("\b\b\b\b\b\b\b");
716         }
717
718         printf ("Last Pass");
719         if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
720                 /* printf("mask: 0x%x", mask); */
721                 return 1;
722         }
723         printf ("\b\b\b\b\b\b\b\b\b");
724         printf ("            ");
725         printf ("\b\b\b\b\b\b\b\b\b");
726
727         return 0;
728 }
729
730 /*********************************************************************/
731 /* NAME:    testdram() -  calls any enabled memory tests             */
732 /*                                                                   */
733 /* DESCRIPTION:                                                      */
734 /*   Runs memory tests if the environment test variables are set to  */
735 /*   'y'.                                                            */
736 /*                                                                   */
737 /* INPUTS:                                                           */
738 /*   testdramdata    - If set to 'y', data test is run.              */
739 /*   testdramaddress - If set to 'y', address test is run.           */
740 /*   testdramwalk    - If set to 'y', walking ones test is run       */
741 /*                                                                   */
742 /* OUTPUTS:                                                          */
743 /*   None                                                            */
744 /*                                                                   */
745 /* RETURNS:                                                          */
746 /*   0 -  Passed test                                                */
747 /*   1 -  Failed test                                                */
748 /*                                                                   */
749 /* RESTRICTIONS/LIMITATIONS:                                         */
750 /*                                                                   */
751 /*                                                                   */
752 /*********************************************************************/
753 int testdram (void)
754 {
755         int rundata    = 0;
756         int runaddress = 0;
757         int runwalk    = 0;
758
759 #ifdef CONFIG_SYS_DRAM_TEST_DATA
760         rundata = getenv_yesno("testdramdata") == 1;
761 #endif
762 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
763         runaddress = getenv_yesno("testdramaddress") == 1;
764 #endif
765 #ifdef CONFIG_SYS_DRAM_TEST_WALK
766         runwalk = getenv_yesno("testdramwalk") == 1;
767 #endif
768
769         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1))
770                 printf ("Testing RAM from 0x%08x to 0x%08x ...  "
771                         "(don't panic... that will take a moment !!!!)\n",
772                         CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END);
773 #ifdef CONFIG_SYS_DRAM_TEST_DATA
774         if (rundata == 1) {
775                 printf ("Test DATA ...  ");
776                 if (mem_test_data () == 1) {
777                         printf ("failed \n");
778                         return 1;
779                 } else
780                         printf ("ok \n");
781         }
782 #endif
783 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
784         if (runaddress == 1) {
785                 printf ("Test ADDRESS ...  ");
786                 if (mem_test_address () == 1) {
787                         printf ("failed \n");
788                         return 1;
789                 } else
790                         printf ("ok \n");
791         }
792 #endif
793 #ifdef CONFIG_SYS_DRAM_TEST_WALK
794         if (runwalk == 1) {
795                 printf ("Test WALKING ONEs ...  ");
796                 if (mem_test_walk () == 1) {
797                         printf ("failed \n");
798                         return 1;
799                 } else
800                         printf ("ok \n");
801         }
802 #endif
803         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1))
804                 printf ("passed\n");
805         return 0;
806
807 }
808 #endif /* CONFIG_SYS_DRAM_TEST */
809
810 /* ronen - the below functions are used by the bootm function           */
811 /*  - we map the base register to fbe00000 (same mapping as in the LSP) */
812 /*  - we turn off the RX gig dmas - to prevent the dma from overunning  */
813 /*    the kernel data areas.                                            */
814 /*  - we diable and invalidate the icache and dcache.                   */
815 void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
816 {
817         u32 temp;
818
819         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
820         if ((temp & 0xffff) == new_loc >> 16)
821                 return;
822
823         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
824                 0xffff0000) | (new_loc >> 16);
825
826         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
827
828         while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
829                                                         new_loc |
830                                                         (INTERNAL_SPACE_DECODE)))))
831                != temp);
832
833 }
834
835 int board_eth_init(bd_t *bis)
836 {
837         return mv6446x_eth_initialize(bis);
838 }