board/sandburst/karef/hal_ka_sc_auto.h

   1 /* ****************************************************************
   2  * Common defs for reg spec for chip ka_sc
   3  * Auto-generated by trex2: DO NOT HAND-EDIT!!
   4  * ****************************************************************
   5  */
   6
   7 #ifndef HAL_KA_SC_AUTO_H
   8 #define HAL_KA_SC_AUTO_H
   9
  10
  11 /* ----------------------------------------------------------------
  12  * For block: 'scan'
  13  */
  14
  15 /* ---- Block instance addressing (for block-select) */
  16 #define SCAN_BLOCK_ADDR_BIT_L 7
  17 #define SCAN_BLOCK_ADDR_BIT_H 9
  18 #define SCAN_BLOCK_ADDR_WIDTH 3
  19
  20 #define  SCAN_ADDR  0x0
  21
  22 /* ---- Reg addressing (within block) */
  23 #define SCAN_REG_ADDR_BIT_L 2
  24 #define SCAN_REG_ADDR_BIT_H 6
  25 #define SCAN_REG_ADDR_WIDTH 5
  26
  27
  28 /* ================================================================
  29  * ---- Register KA_SC_SCAN_REVISION */
  30 #define SAND_HAL_KA_SC_SCAN_REVISION_OFFSET    0x000
  31 #ifndef SAND_HAL_KA_SC_SCAN_REVISION_NO_TEST_MASK
  32 #define SAND_HAL_KA_SC_SCAN_REVISION_NO_TEST_MASK    0x000
  33 #endif
  34 #define SAND_HAL_KA_SC_SCAN_REVISION_MASK    0xffffffff
  35 #define SAND_HAL_KA_SC_SCAN_REVISION_MSB     31
  36 #define SAND_HAL_KA_SC_SCAN_REVISION_LSB      0
  37
  38 /* ================================================================
  39  * ---- Register KA_SC_SCAN_RESET */
  40 #define SAND_HAL_KA_SC_SCAN_RESET_OFFSET    0x004
  41 #ifndef SAND_HAL_KA_SC_SCAN_RESET_NO_TEST_MASK
  42 #define SAND_HAL_KA_SC_SCAN_RESET_NO_TEST_MASK    0x000
  43 #endif
  44 #define SAND_HAL_KA_SC_SCAN_RESET_MASK    0xffffffff
  45 #define SAND_HAL_KA_SC_SCAN_RESET_MSB     31
  46 #define SAND_HAL_KA_SC_SCAN_RESET_LSB      0
  47
  48 /* ================================================================
  49  * ---- Register KA_SC_SCAN_STATUS */
  50 #define SAND_HAL_KA_SC_SCAN_STATUS_OFFSET    0x008
  51 #ifndef SAND_HAL_KA_SC_SCAN_STATUS_NO_TEST_MASK
  52 #define SAND_HAL_KA_SC_SCAN_STATUS_NO_TEST_MASK    0x000
  53 #endif
  54 #define SAND_HAL_KA_SC_SCAN_STATUS_MASK    0xffffffff
  55 #define SAND_HAL_KA_SC_SCAN_STATUS_MSB     31
  56 #define SAND_HAL_KA_SC_SCAN_STATUS_LSB      0
  57
  58 /* ================================================================
  59  * ---- Register KA_SC_SCAN_CNTL */
  60 #define SAND_HAL_KA_SC_SCAN_CNTL_OFFSET    0x01c
  61 #ifndef SAND_HAL_KA_SC_SCAN_CNTL_NO_TEST_MASK
  62 #define SAND_HAL_KA_SC_SCAN_CNTL_NO_TEST_MASK    0x000
  63 #endif
  64 #define SAND_HAL_KA_SC_SCAN_CNTL_MASK    0xffffffff
  65 #define SAND_HAL_KA_SC_SCAN_CNTL_MSB     31
  66 #define SAND_HAL_KA_SC_SCAN_CNTL_LSB      0
  67
  68 /* ================================================================
  69  * ---- Register KA_SC_SCAN_BRD_INFO */
  70 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_OFFSET    0x020
  71 #ifndef SAND_HAL_KA_SC_SCAN_BRD_INFO_NO_TEST_MASK
  72 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_NO_TEST_MASK    0x000
  73 #endif
  74 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_MASK    0xffffffff
  75 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_MSB     31
  76 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_LSB      0
  77
  78 /* ================================================================
  79  * ---- Register KA_SC_SCAN_SCAN_FROM_0 */
  80 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_OFFSET    0x024
  81 #ifndef SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_NO_TEST_MASK
  82 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_NO_TEST_MASK    0x000
  83 #endif
  84 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_MASK    0xffffffff
  85 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_MSB     31
  86 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_LSB      0
  87
  88 /* ================================================================
  89  * ---- Register KA_SC_SCAN_SCAN_FROM_1 */
  90 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_OFFSET    0x028
  91 #ifndef SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_NO_TEST_MASK
  92 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_NO_TEST_MASK    0x000
  93 #endif
  94 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_MASK    0xffffffff
  95 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_MSB     31
  96 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_LSB      0
  97
  98 /* ================================================================
  99  * ---- Register KA_SC_SCAN_SCAN_TO_0 */
 100 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_OFFSET    0x02c
 101 #ifndef SAND_HAL_KA_SC_SCAN_SCAN_TO_0_NO_TEST_MASK
 102 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_NO_TEST_MASK    0x000
 103 #endif
 104 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_MASK    0xffffffff
 105 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_MSB     31
 106 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_LSB      0
 107
 108 /* ================================================================
 109  * ---- Register KA_SC_SCAN_SCAN_TO_1 */
 110 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_OFFSET    0x030
 111 #ifndef SAND_HAL_KA_SC_SCAN_SCAN_TO_1_NO_TEST_MASK
 112 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_NO_TEST_MASK    0x000
 113 #endif
 114 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_MASK    0xffffffff
 115 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_MSB     31
 116 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_LSB      0
 117
 118 /* ================================================================
 119  * ---- Register KA_SC_SCAN_SCAN_CTRL */
 120 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_OFFSET    0x034
 121 #ifndef SAND_HAL_KA_SC_SCAN_SCAN_CTRL_NO_TEST_MASK
 122 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_NO_TEST_MASK    0x000
 123 #endif
 124 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_MASK    0xffffffff
 125 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_MSB     31
 126 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_LSB      0
 127
 128 /* ================================================================
 129  * ---- Register KA_SC_SCAN_PLL_CTRL */
 130 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_OFFSET    0x038
 131 #ifndef SAND_HAL_KA_SC_SCAN_PLL_CTRL_NO_TEST_MASK
 132 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_NO_TEST_MASK    0x000
 133 #endif
 134 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_MASK    0xffffffff
 135 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_MSB     31
 136 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_LSB      0
 137
 138 /* ================================================================
 139  * ---- Register KA_SC_SCAN_CORE_CLK_COUNT */
 140 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_OFFSET    0x03c
 141 #ifndef SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_NO_TEST_MASK
 142 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_NO_TEST_MASK    0x000
 143 #endif
 144 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_MASK    0xffffffff
 145 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_MSB     31
 146 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_LSB      0
 147
 148 /* ================================================================
 149  * ---- Register KA_SC_SCAN_DR_CLK_COUNT */
 150 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_OFFSET    0x040
 151 #ifndef SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_NO_TEST_MASK
 152 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_NO_TEST_MASK    0x000
 153 #endif
 154 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_MASK    0xffffffff
 155 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_MSB     31
 156 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_LSB      0
 157
 158 /* ================================================================
 159  * ---- Register KA_SC_SCAN_SPI_CLK_COUNT */
 160 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_OFFSET    0x044
 161 #ifndef SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_NO_TEST_MASK
 162 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_NO_TEST_MASK    0x000
 163 #endif
 164 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_MASK    0xffffffff
 165 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_MSB     31
 166 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_LSB      0
 167
 168 /* ================================================================
 169  * ---- Register KA_SC_SCAN_BRD_BRD_OUT_DATA */
 170 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_OFFSET    0x048
 171 #ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_NO_TEST_MASK
 172 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_NO_TEST_MASK    0x000
 173 #endif
 174 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_MASK    0xffffffff
 175 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_MSB     31
 176 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_LSB      0
 177
 178 /* ================================================================
 179  * ---- Register KA_SC_SCAN_BRD_BRD_OUT_ENABLE */
 180 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_OFFSET    0x04c
 181 #ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_NO_TEST_MASK
 182 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_NO_TEST_MASK    0x000
 183 #endif
 184 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_MASK    0xffffffff
 185 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_MSB     31
 186 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_LSB      0
 187
 188 /* ================================================================
 189  * ---- Register KA_SC_SCAN_BRD_BRD_IN */
 190 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_OFFSET    0x050
 191 #ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_NO_TEST_MASK
 192 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_NO_TEST_MASK    0x000
 193 #endif
 194 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_MASK    0xffffffff
 195 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_MSB     31
 196 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_LSB      0
 197
 198 /* ================================================================
 199  * ---- Register KA_SC_SCAN_MISC */
 200 #define SAND_HAL_KA_SC_SCAN_MISC_OFFSET    0x054
 201 #ifndef SAND_HAL_KA_SC_SCAN_MISC_NO_TEST_MASK
 202 #define SAND_HAL_KA_SC_SCAN_MISC_NO_TEST_MASK    0x000
 203 #endif
 204 #define SAND_HAL_KA_SC_SCAN_MISC_MASK    0xffffffff
 205 #define SAND_HAL_KA_SC_SCAN_MISC_MSB     31
 206 #define SAND_HAL_KA_SC_SCAN_MISC_LSB      0
 207
 208 /* ================================================================
 209  * ---- Register KA_SC_SCAN_INTERRUPT */
 210 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OFFSET    0x00c
 211 #ifndef SAND_HAL_KA_SC_SCAN_INTERRUPT_NO_TEST_MASK
 212 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_NO_TEST_MASK    0x000
 213 #endif
 214 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK    0xffffffff
 215 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MSB     31
 216 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_LSB      0
 217
 218 /* ================================================================
 219  * ---- Register KA_SC_SCAN_INTERRUPT_MASK */
 220 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OFFSET    0x010
 221 #ifndef SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_NO_TEST_MASK
 222 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_NO_TEST_MASK    0x000
 223 #endif
 224 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_MASK    0xffffffff
 225 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_MSB     31
 226 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_LSB      0
 227
 228 /* ================================================================
 229  * ---- Register KA_SC_SCAN_SCRATCH */
 230 #define SAND_HAL_KA_SC_SCAN_SCRATCH_OFFSET    0x014
 231 #ifndef SAND_HAL_KA_SC_SCAN_SCRATCH_NO_TEST_MASK
 232 #define SAND_HAL_KA_SC_SCAN_SCRATCH_NO_TEST_MASK    0x000
 233 #endif
 234 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK    0xffffffff
 235 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MSB     31
 236 #define SAND_HAL_KA_SC_SCAN_SCRATCH_LSB      0
 237
 238 /* ================================================================
 239  * ---- Register KA_SC_SCAN_SCRATCH_MASK */
 240 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_OFFSET    0x018
 241 #ifndef SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_NO_TEST_MASK
 242 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_NO_TEST_MASK    0x000
 243 #endif
 244 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_MASK    0xffffffff
 245 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_MSB     31
 246 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_LSB      0
 247
 248 /* ================================================================
 249  * Field info for register KA_SC_SCAN_REVISION */
 250 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_MASK    0x0000ff00
 251 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_SHIFT    8
 252 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_MSB    15
 253 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_LSB    8
 254 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_TYPE (SAND_HAL_TYPE_READ)
 255 #define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_DEFAULT    0x00000023
 256 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_MASK    0x000000ff
 257 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_SHIFT    0
 258 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_MSB    7
 259 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_LSB    0
 260 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_TYPE (SAND_HAL_TYPE_READ)
 261 #define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_DEFAULT    0x00000000
 262
 263 /* ================================================================
 264  * Field info for register KA_SC_SCAN_RESET */
 265 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MASK    0x00000200
 266 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_SHIFT    9
 267 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MSB    9
 268 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_LSB    9
 269 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 270 #define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_DEFAULT    0x00000000
 271 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_MASK    0x00000100
 272 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_SHIFT    8
 273 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_MSB    8
 274 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_LSB    8
 275 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 276 #define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_DEFAULT    0x00000000
 277 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_MASK    0x00000080
 278 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_SHIFT    7
 279 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_MSB    7
 280 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_LSB    7
 281 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 282 #define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_DEFAULT    0x00000000
 283 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_MASK    0x00000040
 284 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_SHIFT    6
 285 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_MSB    6
 286 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_LSB    6
 287 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 288 #define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_DEFAULT    0x00000000
 289 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_MASK    0x00000020
 290 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_SHIFT    5
 291 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_MSB    5
 292 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_LSB    5
 293 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 294 #define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_DEFAULT    0x00000000
 295 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_MASK    0x00000010
 296 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_SHIFT    4
 297 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_MSB    4
 298 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_LSB    4
 299 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 300 #define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_DEFAULT    0x00000000
 301 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_MASK    0x00000008
 302 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_SHIFT    3
 303 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_MSB    3
 304 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_LSB    3
 305 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 306 #define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_DEFAULT    0x00000000
 307 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_MASK    0x00000002
 308 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_SHIFT    1
 309 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_MSB    1
 310 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_LSB    1
 311 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 312 #define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_DEFAULT    0x00000000
 313 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_MASK    0x00000001
 314 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_SHIFT    0
 315 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_MSB    0
 316 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_LSB    0
 317 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
 318 #define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_DEFAULT    0x00000000
 319
 320 /* ================================================================
 321  * Field info for register KA_SC_SCAN_STATUS */
 322 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_MASK    0x00000040
 323 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_SHIFT    6
 324 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_MSB    6
 325 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_LSB    6
 326 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_TYPE (SAND_HAL_TYPE_READ)
 327 #define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_DEFAULT    0x00000000
 328 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_MASK    0x00000020
 329 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_SHIFT    5
 330 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_MSB    5
 331 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_LSB    5
 332 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_TYPE (SAND_HAL_TYPE_READ)
 333 #define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_DEFAULT    0x00000000
 334 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_MASK    0x00000010
 335 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_SHIFT    4
 336 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_MSB    4
 337 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_LSB    4
 338 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_TYPE (SAND_HAL_TYPE_READ)
 339 #define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_DEFAULT    0x00000000
 340 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_MASK    0x00000008
 341 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_SHIFT    3
 342 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_MSB    3
 343 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_LSB    3
 344 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_TYPE (SAND_HAL_TYPE_READ)
 345 #define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_DEFAULT    0x00000000
 346 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_MASK    0x00000004
 347 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_SHIFT    2
 348 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_MSB    2
 349 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_LSB    2
 350 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_TYPE (SAND_HAL_TYPE_READ)
 351 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_DEFAULT    0x00000000
 352 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_MASK    0x00000002
 353 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_SHIFT    1
 354 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_MSB    1
 355 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_LSB    1
 356 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_TYPE (SAND_HAL_TYPE_READ)
 357 #define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_DEFAULT    0x00000000
 358 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_MASK    0x00000001
 359 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_SHIFT    0
 360 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_MSB    0
 361 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_LSB    0
 362 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_TYPE (SAND_HAL_TYPE_READ)
 363 #define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_DEFAULT    0x00000000
 364
 365 /* ================================================================
 366  * Field info for register KA_SC_SCAN_CNTL */
 367 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_MASK    0x00000400
 368 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_SHIFT    10
 369 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_MSB    10
 370 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_LSB    10
 371 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_TYPE (SAND_HAL_TYPE_WRITE)
 372 #define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_DEFAULT    0x00000000
 373 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_MASK    0x00000200
 374 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_SHIFT    9
 375 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_MSB    9
 376 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_LSB    9
 377 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_TYPE (SAND_HAL_TYPE_WRITE)
 378 #define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_DEFAULT    0x00000001
 379 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_MASK    0x00000100
 380 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_SHIFT    8
 381 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_MSB    8
 382 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_LSB    8
 383 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_TYPE (SAND_HAL_TYPE_WRITE)
 384 #define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_DEFAULT    0x00000001
 385 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_MASK    0x000000c0
 386 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_SHIFT    6
 387 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_MSB    7
 388 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_LSB    6
 389 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_TYPE (SAND_HAL_TYPE_WRITE)
 390 #define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_DEFAULT    0x00000000
 391 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_MASK    0x00000030
 392 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_SHIFT    4
 393 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_MSB    5
 394 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_LSB    4
 395 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_TYPE (SAND_HAL_TYPE_WRITE)
 396 #define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_DEFAULT    0x00000000
 397 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_MASK    0x0000000c
 398 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_SHIFT    2
 399 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_MSB    3
 400 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_LSB    2
 401 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_TYPE (SAND_HAL_TYPE_WRITE)
 402 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_DEFAULT    0x00000000
 403 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_MASK    0x00000003
 404 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_SHIFT    0
 405 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_MSB    1
 406 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_LSB    0
 407 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_TYPE (SAND_HAL_TYPE_WRITE)
 408 #define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_DEFAULT    0x00000000
 409
 410 /* ================================================================
 411  * Field info for register KA_SC_SCAN_BRD_INFO */
 412 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MASK    0x0000f000
 413 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_SHIFT    12
 414 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MSB    15
 415 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_LSB    12
 416 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_TYPE (SAND_HAL_TYPE_READ)
 417 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_DEFAULT    0x00000000
 418 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_MASK    0x00000300
 419 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_SHIFT    8
 420 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_MSB    9
 421 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_LSB    8
 422 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_TYPE (SAND_HAL_TYPE_READ)
 423 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_DEFAULT    0x00000000
 424 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_MASK    0x000000f0
 425 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_SHIFT    4
 426 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_MSB    7
 427 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_LSB    4
 428 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_TYPE (SAND_HAL_TYPE_READ)
 429 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_DEFAULT    0x00000000
 430 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_MASK    0x00000003
 431 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_SHIFT    0
 432 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_MSB    1
 433 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_LSB    0
 434 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_TYPE (SAND_HAL_TYPE_READ)
 435 #define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_DEFAULT    0x00000000
 436
 437 /* ================================================================
 438  * Field info for register KA_SC_SCAN_SCAN_FROM_0 */
 439 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_MASK    0xffffffff
 440 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_SHIFT    0
 441 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_MSB    31
 442 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_LSB    0
 443 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_TYPE (SAND_HAL_TYPE_READ)
 444 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_DEFAULT    0x00000000
 445
 446 /* ================================================================
 447  * Field info for register KA_SC_SCAN_SCAN_FROM_1 */
 448 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_MASK    0xffffffff
 449 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_SHIFT    0
 450 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_MSB    31
 451 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_LSB    0
 452 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_TYPE (SAND_HAL_TYPE_READ)
 453 #define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_DEFAULT    0x00000000
 454
 455 /* ================================================================
 456  * Field info for register KA_SC_SCAN_SCAN_TO_0 */
 457 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_MASK    0xffffffff
 458 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_SHIFT    0
 459 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_MSB    31
 460 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_LSB    0
 461 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_TYPE (SAND_HAL_TYPE_WRITE)
 462 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_DEFAULT    0x00000000
 463
 464 /* ================================================================
 465  * Field info for register KA_SC_SCAN_SCAN_TO_1 */
 466 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_MASK    0xffffffff
 467 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_SHIFT    0
 468 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_MSB    31
 469 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_LSB    0
 470 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_TYPE (SAND_HAL_TYPE_WRITE)
 471 #define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_DEFAULT    0x00000000
 472
 473 /* ================================================================
 474  * Field info for register KA_SC_SCAN_SCAN_CTRL */
 475 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_MASK    0x04000000
 476 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_SHIFT    26
 477 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_MSB    26
 478 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_LSB    26
 479 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_TYPE (SAND_HAL_TYPE_WRITE)
 480 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_DEFAULT    0x00000000
 481 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_MASK    0x03000000
 482 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_SHIFT    24
 483 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_MSB    25
 484 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_LSB    24
 485 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_TYPE (SAND_HAL_TYPE_WRITE)
 486 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_DEFAULT    0x00000000
 487 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_MASK    0x00100000
 488 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_SHIFT    20
 489 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_MSB    20
 490 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_LSB    20
 491 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_TYPE (SAND_HAL_TYPE_WRITE)
 492 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_DEFAULT    0x00000000
 493 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_MASK    0x00080000
 494 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_SHIFT    19
 495 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_MSB    19
 496 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_LSB    19
 497 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_TYPE (SAND_HAL_TYPE_WRITE)
 498 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_DEFAULT    0x00000000
 499 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_MASK    0x00040000
 500 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_SHIFT    18
 501 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_MSB    18
 502 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_LSB    18
 503 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_TYPE (SAND_HAL_TYPE_WRITE)
 504 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_DEFAULT    0x00000000
 505 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_MASK    0x00020000
 506 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_SHIFT    17
 507 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_MSB    17
 508 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_LSB    17
 509 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_TYPE (SAND_HAL_TYPE_WRITE)
 510 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_DEFAULT    0x00000000
 511 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_MASK    0x00010000
 512 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_SHIFT    16
 513 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_MSB    16
 514 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_LSB    16
 515 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_TYPE (SAND_HAL_TYPE_WRITE)
 516 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_DEFAULT    0x00000000
 517 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_MASK    0x00001000
 518 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_SHIFT    12
 519 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_MSB    12
 520 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_LSB    12
 521 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_TYPE (SAND_HAL_TYPE_WRITE)
 522 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_DEFAULT    0x00000000
 523 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_MASK    0x00000800
 524 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SHIFT    11
 525 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_MSB    11
 526 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_LSB    11
 527 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_TYPE (SAND_HAL_TYPE_WRITE)
 528 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_DEFAULT    0x00000000
 529 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_MASK    0x00000400
 530 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SHIFT    10
 531 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_MSB    10
 532 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_LSB    10
 533 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_TYPE (SAND_HAL_TYPE_WRITE)
 534 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_DEFAULT    0x00000000
 535 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_MASK    0x00000200
 536 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SHIFT    9
 537 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_MSB    9
 538 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_LSB    9
 539 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_TYPE (SAND_HAL_TYPE_WRITE)
 540 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_DEFAULT    0x00000000
 541 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_MASK    0x00000100
 542 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SHIFT    8
 543 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_MSB    8
 544 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_LSB    8
 545 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_TYPE (SAND_HAL_TYPE_WRITE)
 546 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_DEFAULT    0x00000000
 547 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_MASK    0x00000018
 548 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_SHIFT    3
 549 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_MSB    4
 550 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_LSB    3
 551 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
 552 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_DEFAULT    0x00000000
 553 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_MASK    0x00000004
 554 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_SHIFT    2
 555 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_MSB    2
 556 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_LSB    2
 557 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
 558 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_DEFAULT    0x00000000
 559 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_MASK    0x00000002
 560 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_SHIFT    1
 561 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_MSB    1
 562 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_LSB    1
 563 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
 564 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_DEFAULT    0x00000000
 565 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_MASK    0x00000001
 566 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_SHIFT    0
 567 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_MSB    0
 568 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_LSB    0
 569 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
 570 #define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_DEFAULT    0x00000000
 571
 572 /* ================================================================
 573  * Field info for register KA_SC_SCAN_PLL_CTRL */
 574 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_MASK    0x00002000
 575 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_SHIFT    13
 576 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_MSB    13
 577 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_LSB    13
 578 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_TYPE (SAND_HAL_TYPE_WRITE)
 579 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_DEFAULT    0x00000000
 580 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_MASK    0x00001000
 581 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_SHIFT    12
 582 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_MSB    12
 583 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_LSB    12
 584 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_TYPE (SAND_HAL_TYPE_WRITE)
 585 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_DEFAULT    0x00000000
 586 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_MASK    0x00000800
 587 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_SHIFT    11
 588 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_MSB    11
 589 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_LSB    11
 590 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 591 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_DEFAULT    0x00000000
 592 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_MASK    0x00000400
 593 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_SHIFT    10
 594 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_MSB    10
 595 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_LSB    10
 596 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 597 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_DEFAULT    0x00000000
 598 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_MASK    0x00000200
 599 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_SHIFT    9
 600 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_MSB    9
 601 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_LSB    9
 602 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
 603 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_DEFAULT    0x00000000
 604 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_MASK    0x00000100
 605 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_SHIFT    8
 606 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_MSB    8
 607 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_LSB    8
 608 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 609 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_DEFAULT    0x00000000
 610 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_MASK    0x00000080
 611 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_SHIFT    7
 612 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_MSB    7
 613 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_LSB    7
 614 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 615 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_DEFAULT    0x00000000
 616 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_MASK    0x00000040
 617 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_SHIFT    6
 618 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_MSB    6
 619 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_LSB    6
 620 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
 621 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_DEFAULT    0x00000000
 622 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_MASK    0x00000020
 623 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_SHIFT    5
 624 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_MSB    5
 625 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_LSB    5
 626 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 627 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_DEFAULT    0x00000000
 628 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_MASK    0x00000010
 629 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_SHIFT    4
 630 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_MSB    4
 631 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_LSB    4
 632 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
 633 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_DEFAULT    0x00000000
 634 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MASK    0x00000008
 635 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_SHIFT    3
 636 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MSB    3
 637 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_LSB    3
 638 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
 639 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_DEFAULT    0x00000000
 640 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MASK    0x00000007
 641 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_SHIFT    0
 642 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MSB    2
 643 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_LSB    0
 644 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_TYPE (SAND_HAL_TYPE_WRITE)
 645 #define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_DEFAULT    0x00000000
 646
 647 /* ================================================================
 648  * Field info for register KA_SC_SCAN_CORE_CLK_COUNT */
 649 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK    0x02000000
 650 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT    25
 651 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB    25
 652 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB    25
 653 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
 654 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT    0x00000000
 655 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK    0x01000000
 656 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT    24
 657 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB    24
 658 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB    24
 659 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
 660 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT    0x00000000
 661 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MASK    0x00ffffff
 662 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_SHIFT    0
 663 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MSB    23
 664 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_LSB    0
 665 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
 666 #define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_DEFAULT    0x00000000
 667
 668 /* ================================================================
 669  * Field info for register KA_SC_SCAN_DR_CLK_COUNT */
 670 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK    0x02000000
 671 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT    25
 672 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB    25
 673 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB    25
 674 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
 675 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT    0x00000000
 676 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK    0x01000000
 677 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT    24
 678 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB    24
 679 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB    24
 680 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
 681 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT    0x00000000
 682 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MASK    0x00ffffff
 683 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_SHIFT    0
 684 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MSB    23
 685 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_LSB    0
 686 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
 687 #define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_DEFAULT    0x00000000
 688
 689 /* ================================================================
 690  * Field info for register KA_SC_SCAN_SPI_CLK_COUNT */
 691 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK    0x02000000
 692 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT    25
 693 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB    25
 694 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB    25
 695 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
 696 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT    0x00000000
 697 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK    0x01000000
 698 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT    24
 699 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB    24
 700 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB    24
 701 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
 702 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT    0x00000000
 703 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MASK    0x00ffffff
 704 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_SHIFT    0
 705 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MSB    23
 706 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_LSB    0
 707 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
 708 #define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_DEFAULT    0x00000000
 709
 710 /* ================================================================
 711  * Field info for register KA_SC_SCAN_BRD_BRD_OUT_DATA */
 712 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MASK    0x001fffff
 713 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_SHIFT    0
 714 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MSB    20
 715 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_LSB    0
 716 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_TYPE (SAND_HAL_TYPE_WRITE)
 717 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_DEFAULT    0x00000000
 718
 719 /* ================================================================
 720  * Field info for register KA_SC_SCAN_BRD_BRD_OUT_ENABLE */
 721 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MASK    0x001fffff
 722 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_SHIFT    0
 723 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MSB    20
 724 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_LSB    0
 725 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_TYPE (SAND_HAL_TYPE_WRITE)
 726 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_DEFAULT    0x00000000
 727
 728 /* ================================================================
 729  * Field info for register KA_SC_SCAN_BRD_BRD_IN */
 730 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MASK    0x001fffff
 731 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_SHIFT    0
 732 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MSB    20
 733 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_LSB    0
 734 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_TYPE (SAND_HAL_TYPE_READ)
 735 #define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_DEFAULT    0x00000000
 736
 737 /* ================================================================
 738  * Field info for register KA_SC_SCAN_MISC */
 739 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MASK    0x00000002
 740 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_SHIFT    1
 741 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MSB    1
 742 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_LSB    1
 743 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_TYPE (SAND_HAL_TYPE_WRITE)
 744 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_DEFAULT    0x00000000
 745 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MASK    0x00000001
 746 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_SHIFT    0
 747 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MSB    0
 748 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_LSB    0
 749 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_TYPE (SAND_HAL_TYPE_READ)
 750 #define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_DEFAULT    0x00000000
 751
 752 /* ================================================================
 753  * Field info for register KA_SC_SCAN_INTERRUPT */
 754 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MASK    0x00000010
 755 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_SHIFT    4
 756 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MSB    4
 757 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_LSB    4
 758 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)
 759 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_DEFAULT    0x00000000
 760 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MASK    0x00000008
 761 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_SHIFT    3
 762 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MSB    3
 763 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_LSB    3
 764 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_TYPE (SAND_HAL_TYPE_READ)
 765 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_DEFAULT    0x00000000
 766 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MASK    0x00000004
 767 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_SHIFT    2
 768 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MSB    2
 769 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_LSB    2
 770 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_TYPE (SAND_HAL_TYPE_READ)
 771 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_DEFAULT    0x00000000
 772 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MASK    0x00000002
 773 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_SHIFT    1
 774 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MSB    1
 775 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_LSB    1
 776 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_TYPE (SAND_HAL_TYPE_READ)
 777 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_DEFAULT    0x00000000
 778 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MASK    0x00000001
 779 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_SHIFT    0
 780 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MSB    0
 781 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_LSB    0
 782 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_TYPE (SAND_HAL_TYPE_READ)
 783 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_DEFAULT    0x00000000
 784
 785 /* ================================================================
 786  * Field info for register KA_SC_SCAN_INTERRUPT_MASK */
 787 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MASK    0x00000010
 788 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_SHIFT    4
 789 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MSB    4
 790 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_LSB    4
 791 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 792 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_DEFAULT    0x00000001
 793 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MASK    0x00000008
 794 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_SHIFT    3
 795 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MSB    3
 796 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_LSB    3
 797 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 798 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_DEFAULT    0x00000001
 799 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MASK    0x00000004
 800 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_SHIFT    2
 801 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MSB    2
 802 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_LSB    2
 803 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 804 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_DEFAULT    0x00000001
 805 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MASK    0x00000002
 806 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_SHIFT    1
 807 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MSB    1
 808 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_LSB    1
 809 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 810 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_DEFAULT    0x00000001
 811 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MASK    0x00000001
 812 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_SHIFT    0
 813 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MSB    0
 814 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_LSB    0
 815 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 816 #define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_DEFAULT    0x00000001
 817
 818 /* ================================================================
 819  * Field info for register KA_SC_SCAN_SCRATCH */
 820 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MASK    0xffffffff
 821 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_SHIFT    0
 822 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MSB    31
 823 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_LSB    0
 824 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_TYPE (SAND_HAL_TYPE_WRITE)
 825 #define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_DEFAULT    0x00000000
 826
 827 /* ================================================================
 828  * Field info for register KA_SC_SCAN_SCRATCH_MASK */
 829 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MASK    0xffffffff
 830 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_SHIFT    0
 831 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MSB    31
 832 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_LSB    0
 833 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
 834 #define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_DEFAULT    0xffffffff
 835
 836 #endif /* matches #ifndef HAL_KA_SC_AUTO_H */