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1 /*
2  * (C) Copyright 2009
3  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23
24 #include <common.h>
25 #include <command.h>
26 #include <i2c.h>
27 #include <net.h>
28 #include <asm/io.h>
29 #include <asm/arch/hardware.h>
30 #include <asm/arch/spr_emi.h>
31 #include <asm/arch/spr_xloader_table.h>
32 #include <asm/arch/spr_defs.h>
33
34 #define CPU             0
35 #define DDR             1
36 #define SRAM_REL        0xD2801000
37
38 DECLARE_GLOBAL_DATA_PTR;
39 static struct chip_data chip_data;
40
41 int dram_init(void)
42 {
43         struct xloader_table *xloader_tb =
44             (struct xloader_table *)XLOADER_TABLE_ADDRESS;
45         struct xloader_table_1_1 *table_1_1;
46         struct xloader_table_1_2 *table_1_2;
47         struct chip_data *chip = &chip_data;
48
49         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
50         gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1,
51                                                PHYS_SDRAM_1_MAXSIZE);
52
53         if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) {
54                 table_1_1 = &xloader_tb->table.table_1_1;
55                 chip->dramfreq = table_1_1->ddrfreq;
56                 chip->dramtype = table_1_1->ddrtype;
57
58         } else if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
59                 table_1_2 = &xloader_tb->table.table_1_2;
60                 chip->dramfreq = table_1_2->ddrfreq;
61                 chip->dramtype = table_1_2->ddrtype;
62         } else {
63                 chip->dramfreq = -1;
64         }
65
66         return 0;
67 }
68
69 int misc_init_r(void)
70 {
71 #if defined(CONFIG_CMD_NET)
72         uchar mac_id[6];
73
74         if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
75                 eth_setenv_enetaddr("ethaddr", mac_id);
76 #endif
77         setenv("verify", "n");
78
79 #if defined(CONFIG_SPEAR_USBTTY)
80         setenv("stdin", "usbtty");
81         setenv("stdout", "usbtty");
82         setenv("stderr", "usbtty");
83 #endif
84         return 0;
85 }
86
87 #ifdef CONFIG_SPEAR_EMI
88 struct cust_emi_para {
89         unsigned int tap;
90         unsigned int tsdp;
91         unsigned int tdpw;
92         unsigned int tdpr;
93         unsigned int tdcs;
94 };
95
96 /* EMI timing setting of m28w640hc of linux kernel */
97 const struct cust_emi_para emi_timing_m28w640hc = {
98         .tap = 0x10,
99         .tsdp = 0x05,
100         .tdpw = 0x0a,
101         .tdpr = 0x0a,
102         .tdcs = 0x05,
103 };
104
105 /* EMI timing setting of bootrom */
106 const struct cust_emi_para emi_timing_bootrom = {
107         .tap = 0xf,
108         .tsdp = 0x0,
109         .tdpw = 0xff,
110         .tdpr = 0x111,
111         .tdcs = 0x02,
112 };
113
114 void spear_emi_init(void)
115 {
116         const struct cust_emi_para *p = &emi_timing_m28w640hc;
117         struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
118         unsigned int cs;
119         unsigned int val, tmp;
120
121         val = readl(CONFIG_SPEAR_RASBASE);
122
123         if (val & EMI_ACKMSK)
124                 tmp = 0x3f;
125         else
126                 tmp = 0x0;
127
128         writel(tmp, &emi_regs_p->ack);
129
130         for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
131                 writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
132                 writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
133                 writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
134                 writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
135                 writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
136                 writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
137                        &emi_regs_p->bank_regs[cs].control);
138         }
139 }
140 #endif
141
142 int spear_board_init(ulong mach_type)
143 {
144         struct xloader_table *xloader_tb =
145             (struct xloader_table *)XLOADER_TABLE_ADDRESS;
146         struct xloader_table_1_2 *table_1_2;
147         struct chip_data *chip = &chip_data;
148
149         gd->bd->bi_arch_number = mach_type;
150
151         /* adress of boot parameters */
152         gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
153
154         /* CPU is initialized to work at 333MHz in Xloader */
155         chip->cpufreq = 333;
156
157         if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
158                 table_1_2 = &xloader_tb->table.table_1_2;
159                 memcpy(chip->version, table_1_2->version,
160                        sizeof(chip->version));
161         }
162
163 #ifdef CONFIG_SPEAR_EMI
164         spear_emi_init();
165 #endif
166         return 0;
167 }
168
169 static int i2c_read_mac(uchar *buffer)
170 {
171         u8 buf[2];
172
173         i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
174
175         /* Check if mac in i2c memory is valid */
176         if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
177                 /* Valid mac address is saved in i2c eeprom */
178                 i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
179                 return 0;
180         }
181
182         return -1;
183 }
184
185 static int write_mac(uchar *mac)
186 {
187         u8 buf[2];
188
189         buf[0] = (u8)MAGIC_BYTE0;
190         buf[1] = (u8)MAGIC_BYTE1;
191         i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
192
193         buf[0] = (u8)~MAGIC_BYTE0;
194         buf[1] = (u8)~MAGIC_BYTE1;
195
196         i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
197
198         /* check if valid MAC address is saved in I2C EEPROM or not? */
199         if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
200                 i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
201                 puts("I2C EEPROM written with mac address \n");
202                 return 0;
203         }
204
205         puts("I2C EEPROM writing failed \n");
206         return -1;
207 }
208
209 int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
210 {
211         void (*sram_setfreq) (unsigned int, unsigned int);
212         struct chip_data *chip = &chip_data;
213         unsigned char mac[6];
214         unsigned int reg, frequency;
215         char *s, *e;
216         char i2c_mac[20];
217
218         if ((argc > 3) || (argc < 2)) {
219                 cmd_usage(cmdtp);
220                 return 1;
221         }
222
223         if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
224
225                 frequency = simple_strtoul(argv[2], NULL, 0);
226
227                 if (frequency > 333) {
228                         printf("Frequency is limited to 333MHz\n");
229                         return 1;
230                 }
231
232                 sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
233
234                 if (!strcmp(argv[1], "cpufreq")) {
235                         sram_setfreq(CPU, frequency);
236                         printf("CPU frequency changed to %u\n", frequency);
237
238                         chip->cpufreq = frequency;
239                 } else {
240                         sram_setfreq(DDR, frequency);
241                         printf("DDR frequency changed to %u\n", frequency);
242
243                         chip->dramfreq = frequency;
244                 }
245
246                 return 0;
247         } else if (!strcmp(argv[1], "ethaddr")) {
248
249                 s = argv[2];
250                 for (reg = 0; reg < 6; ++reg) {
251                         mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
252                         if (s)
253                                 s = (*e) ? e + 1 : e;
254                 }
255                 write_mac(mac);
256
257                 return 0;
258         } else if (!strcmp(argv[1], "print")) {
259
260                 if (chip->cpufreq == -1)
261                         printf("CPU Freq    = Not Known\n");
262                 else
263                         printf("CPU Freq    = %d MHz\n", chip->cpufreq);
264
265                 if (chip->dramfreq == -1)
266                         printf("DDR Freq    = Not Known\n");
267                 else
268                         printf("DDR Freq    = %d MHz\n", chip->dramfreq);
269
270                 if (chip->dramtype == DDRMOBILE)
271                         printf("DDR Type    = MOBILE\n");
272                 else if (chip->dramtype == DDR2)
273                         printf("DDR Type    = DDR2\n");
274                 else
275                         printf("DDR Type    = Not Known\n");
276
277                 if (!i2c_read_mac(mac)) {
278                         sprintf(i2c_mac, "%pM", mac);
279                         printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
280                 } else {
281                         printf("Ethaddr (from i2c mem) = Not set\n");
282                 }
283
284                 printf("Xloader Rev = %s\n", chip->version);
285
286                 return 0;
287         }
288
289         cmd_usage(cmdtp);
290         return 1;
291 }
292
293 U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
294            "configure chip",
295            "chip_config cpufreq/ddrfreq frequency\n"
296            "chip_config print");