3 # Note only one of these may be selected at a time! But hidden choices are
4 # not supported by Kconfig
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
11 config SUNXI_GEN_SUN6I
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
20 prompt "Sunxi SoC Variant"
24 bool "sun4i (Allwinner A10)"
26 select SUNXI_GEN_SUN4I
30 bool "sun5i (Allwinner A13)"
32 select SUNXI_GEN_SUN4I
36 bool "sun6i (Allwinner A31)"
38 select SUNXI_GEN_SUN6I
42 bool "sun7i (Allwinner A20)"
44 select CPU_V7_HAS_NONSEC
45 select CPU_V7_HAS_VIRT
46 select SUNXI_GEN_SUN4I
48 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
51 bool "sun8i (Allwinner A23)"
53 select SUNXI_GEN_SUN6I
57 bool "sun8i (Allwinner A33)"
59 select SUNXI_GEN_SUN6I
63 bool "sun9i (Allwinner A80)"
65 select SUNXI_GEN_SUN6I
69 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
72 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
76 int "sunxi dram clock speed"
77 default 312 if MACH_SUN6I || MACH_SUN8I
78 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
80 Set the dram clock speed, valid range 240 - 480, must be a multiple
83 if MACH_SUN5I || MACH_SUN7I
85 int "sunxi mbus clock speed"
88 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
93 int "sunxi dram zq value"
94 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
95 default 127 if MACH_SUN7I
97 Set the dram zq value.
100 bool "sunxi dram odt enable"
101 default n if !MACH_SUN8I_A23
102 default y if MACH_SUN8I_A23
104 Select this to enable dram odt (on die termination).
106 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
108 int "sunxi dram emr1 value"
109 default 0 if MACH_SUN4I
110 default 4 if MACH_SUN5I || MACH_SUN7I
112 Set the dram controller emr1 value.
115 hex "sunxi dram tpr3 value"
118 Set the dram controller tpr3 parameter. This parameter configures
119 the delay on the command lane and also phase shifts, which are
120 applied for sampling incoming read data. The default value 0
121 means that no phase/delay adjustments are necessary. Properly
122 configuring this parameter increases reliability at high DRAM
125 config DRAM_DQS_GATING_DELAY
126 hex "sunxi dram dqs_gating_delay value"
129 Set the dram controller dqs_gating_delay parmeter. Each byte
130 encodes the DQS gating delay for each byte lane. The delay
131 granularity is 1/4 cycle. For example, the value 0x05060606
132 means that the delay is 5 quarter-cycles for one lane (1.25
133 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
134 The default value 0 means autodetection. The results of hardware
135 autodetection are not very reliable and depend on the chip
136 temperature (sometimes producing different results on cold start
137 and warm reboot). But the accuracy of hardware autodetection
138 is usually good enough, unless running at really high DRAM
139 clocks speeds (up to 600MHz). If unsure, keep as 0.
142 prompt "sunxi dram timings"
143 default DRAM_TIMINGS_VENDOR_MAGIC
145 Select the timings of the DDR3 chips.
147 config DRAM_TIMINGS_VENDOR_MAGIC
148 bool "Magic vendor timings from Android"
150 The same DRAM timings as in the Allwinner boot0 bootloader.
152 config DRAM_TIMINGS_DDR3_1066F_1333H
153 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
155 Use the timings of the standard JEDEC DDR3-1066F speed bin for
156 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
157 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
158 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
159 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
160 that down binning to DDR3-1066F is supported (because DDR3-1066F
161 uses a bit faster timings than DDR3-1333H).
163 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
164 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
166 Use the timings of the slowest possible JEDEC speed bin for the
167 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
168 DDR3-800E, DDR3-1066G or DDR3-1333J.
175 config DRAM_ODT_CORRECTION
176 int "sunxi dram odt correction value"
179 Set the dram odt correction value (range -255 - 255). In allwinner
180 fex files, this option is found in bits 8-15 of the u32 odt_en variable
181 in the [dram] section. When bit 31 of the odt_en variable is set
182 then the correction is negative. Usually the value for this is 0.
186 default 912000000 if MACH_SUN7I
187 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
189 config SYS_CONFIG_NAME
190 default "sun4i" if MACH_SUN4I
191 default "sun5i" if MACH_SUN5I
192 default "sun6i" if MACH_SUN6I
193 default "sun7i" if MACH_SUN7I
194 default "sun8i" if MACH_SUN8I
195 default "sun9i" if MACH_SUN9I
204 bool "UART0 on MicroSD breakout board"
207 Repurpose the SD card slot for getting access to the UART0 serial
208 console. Primarily useful only for low level u-boot debugging on
209 tablets, where normal UART0 is difficult to access and requires
210 device disassembly and/or soldering. As the SD card can't be used
211 at the same time, the system can be only booted in the FEL mode.
212 Only enable this if you really know what you are doing.
214 config OLD_SUNXI_KERNEL_COMPAT
215 boolean "Enable workarounds for booting old kernels"
218 Set this to enable various workarounds for old kernels, this results in
219 sub-optimal settings for newer kernels, only enable if needed.
222 string "Card detect pin for mmc0"
225 Set the card detect pin for mmc0, leave empty to not use cd. This
226 takes a string in the format understood by sunxi_name_to_gpio, e.g.
227 PH1 for pin 1 of port H.
230 string "Card detect pin for mmc1"
233 See MMC0_CD_PIN help text.
236 string "Card detect pin for mmc2"
239 See MMC0_CD_PIN help text.
242 string "Card detect pin for mmc3"
245 See MMC0_CD_PIN help text.
248 string "Pins for mmc1"
251 Set the pins used for mmc1, when applicable. This takes a string in the
252 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
255 string "Pins for mmc2"
258 See MMC1_PINS help text.
261 string "Pins for mmc3"
264 See MMC1_PINS help text.
266 config MMC_SUNXI_SLOT_EXTRA
267 int "mmc extra slot number"
270 sunxi builds always enable mmc0, some boards also have a second sdcard
271 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
275 string "Vbus enable pin for usb0 (otg)"
278 Set the Vbus enable pin for usb0 (otg). This takes a string in the
279 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
282 string "Vbus detect pin for usb0 (otg)"
285 Set the Vbus detect pin for usb0 (otg). This takes a string in the
286 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
289 string "Vbus enable pin for usb1 (ehci0)"
290 default "PH6" if MACH_SUN4I || MACH_SUN7I
291 default "PH27" if MACH_SUN6I
293 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
294 a string in the format understood by sunxi_name_to_gpio, e.g.
295 PH1 for pin 1 of port H.
298 string "Vbus enable pin for usb2 (ehci1)"
299 default "PH3" if MACH_SUN4I || MACH_SUN7I
300 default "PH24" if MACH_SUN6I
302 See USB1_VBUS_PIN help text.
305 bool "Enable I2C/TWI controller 0"
306 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
307 default n if MACH_SUN6I || MACH_SUN8I
309 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
310 its clock and setting up the bus. This is especially useful on devices
311 with slaves connected to the bus or with pins exposed through e.g. an
312 expansion port/header.
315 bool "Enable I2C/TWI controller 1"
318 See I2C0_ENABLE help text.
321 bool "Enable I2C/TWI controller 2"
324 See I2C0_ENABLE help text.
326 if MACH_SUN6I || MACH_SUN7I
328 bool "Enable I2C/TWI controller 3"
331 See I2C0_ENABLE help text.
336 bool "Enable I2C/TWI controller 4"
339 See I2C0_ENABLE help text.
343 boolean "Enable support for gpio-s on axp PMICs"
346 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
349 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
352 Say Y here to add support for using a cfb console on the HDMI, LCD
353 or VGA output found on most sunxi devices. See doc/README.video for
354 info on how to select the video output and mode.
357 boolean "HDMI output support"
358 depends on VIDEO && !MACH_SUN8I
361 Say Y here to add support for outputting video over HDMI.
364 boolean "VGA output support"
365 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
368 Say Y here to add support for outputting video over VGA.
370 config VIDEO_VGA_VIA_LCD
371 boolean "VGA via LCD controller support"
372 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
375 Say Y here to add support for external DACs connected to the parallel
376 LCD interface driving a VGA connector, such as found on the
379 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
380 boolean "Force sync active high for VGA via LCD controller support"
381 depends on VIDEO_VGA_VIA_LCD
384 Say Y here if you've a board which uses opendrain drivers for the vga
385 hsync and vsync signals. Opendrain drivers cannot generate steep enough
386 positive edges for a stable video output, so on boards with opendrain
387 drivers the sync signals must always be active high.
389 config VIDEO_VGA_EXTERNAL_DAC_EN
390 string "LCD panel power enable pin"
391 depends on VIDEO_VGA_VIA_LCD
394 Set the enable pin for the external VGA DAC. This takes a string in the
395 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
397 config VIDEO_LCD_MODE
398 string "LCD panel timing details"
402 LCD panel timing details string, leave empty if there is no LCD panel.
403 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
404 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
406 config VIDEO_LCD_DCLK_PHASE
407 int "LCD panel display clock phase"
411 Select LCD panel display clock phase shift, range 0-3.
413 config VIDEO_LCD_POWER
414 string "LCD panel power enable pin"
418 Set the power enable pin for the LCD panel. This takes a string in the
419 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
421 config VIDEO_LCD_RESET
422 string "LCD panel reset pin"
426 Set the reset pin for the LCD panel. This takes a string in the format
427 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
429 config VIDEO_LCD_BL_EN
430 string "LCD panel backlight enable pin"
434 Set the backlight enable pin for the LCD panel. This takes a string in the
435 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
438 config VIDEO_LCD_BL_PWM
439 string "LCD panel backlight pwm pin"
443 Set the backlight pwm pin for the LCD panel. This takes a string in the
444 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
446 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
447 bool "LCD panel backlight pwm is inverted"
451 Set this if the backlight pwm output is active low.
453 config VIDEO_LCD_PANEL_I2C
454 bool "LCD panel needs to be configured via i2c"
458 Say y here if the LCD panel needs to be configured via i2c. This
459 will add a bitbang i2c controller using gpios to talk to the LCD.
461 config VIDEO_LCD_PANEL_I2C_SDA
462 string "LCD panel i2c interface SDA pin"
463 depends on VIDEO_LCD_PANEL_I2C
466 Set the SDA pin for the LCD i2c interface. This takes a string in the
467 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
469 config VIDEO_LCD_PANEL_I2C_SCL
470 string "LCD panel i2c interface SCL pin"
471 depends on VIDEO_LCD_PANEL_I2C
474 Set the SCL pin for the LCD i2c interface. This takes a string in the
475 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
478 # Note only one of these may be selected at a time! But hidden choices are
479 # not supported by Kconfig
480 config VIDEO_LCD_IF_PARALLEL
483 config VIDEO_LCD_IF_LVDS
488 prompt "LCD panel support"
491 Select which type of LCD panel to support.
493 config VIDEO_LCD_PANEL_PARALLEL
494 bool "Generic parallel interface LCD panel"
495 select VIDEO_LCD_IF_PARALLEL
497 config VIDEO_LCD_PANEL_LVDS
498 bool "Generic lvds interface LCD panel"
499 select VIDEO_LCD_IF_LVDS
501 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
502 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
503 select VIDEO_LCD_SSD2828
504 select VIDEO_LCD_IF_PARALLEL
506 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
508 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
509 bool "Hitachi tx18d42vm LCD panel"
510 select VIDEO_LCD_HITACHI_TX18D42VM
511 select VIDEO_LCD_IF_LVDS
513 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
515 config VIDEO_LCD_TL059WV5C0
516 bool "tl059wv5c0 LCD panel"
517 select VIDEO_LCD_PANEL_I2C
518 select VIDEO_LCD_IF_PARALLEL
520 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
521 Aigo M60/M608/M606 tablets.
526 config USB_MUSB_SUNXI
527 bool "Enable sunxi OTG / DRC USB controller in host mode"
530 Say y here to enable support for the sunxi OTG / DRC USB controller
531 used on almost all sunxi boards. Note currently u-boot can only have
532 one usb host controller enabled at a time, so enabling this on boards
533 which also use the ehci host controller will result in build errors.
536 boolean "Enable USB keyboard support"
539 Say Y here to add support for using a USB keyboard (typically used
540 in combination with a graphical console).
543 int "GMAC Transmit Clock Delay Chain"
546 Set the GMAC Transmit Clock Delay Chain value.
548 config SYS_MALLOC_CLEAR_ON_INIT
564 default y if !USB_MUSB_SUNXI