board/ti/ks2_evm/board.c

   1 /*
   2  * Keystone : Board initialization
   3  *
   4  * (C) Copyright 2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include "board.h"
  11 #include <common.h>
  12 #include <spl.h>
  13 #include <exports.h>
  14 #include <fdt_support.h>
  15 #include <asm/arch/ddr3.h>
  16 #include <asm/arch/psc_defs.h>
  17 #include <asm/ti-common/ti-aemif.h>
  18 #include <asm/ti-common/keystone_net.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 static struct aemif_config aemif_configs[] = {
  23         {                       /* CS0 */
  24                 .mode           = AEMIF_MODE_NAND,
  25                 .wr_setup       = 0xf,
  26                 .wr_strobe      = 0x3f,
  27                 .wr_hold        = 7,
  28                 .rd_setup       = 0xf,
  29                 .rd_strobe      = 0x3f,
  30                 .rd_hold        = 7,
  31                 .turn_around    = 3,
  32                 .width          = AEMIF_WIDTH_8,
  33         },
  34 };
  35
  36 int dram_init(void)
  37 {
  38         ddr3_init();
  39
  40         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  41                                     CONFIG_MAX_RAM_BANK_SIZE);
  42         aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
  43         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE);
  44         return 0;
  45 }
  46
  47 int board_init(void)
  48 {
  49         gd->bd->bi_boot_params = CONFIG_LINUX_BOOT_PARAM_ADDR;
  50
  51         return 0;
  52 }
  53
  54 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  55 int get_eth_env_param(char *env_name)
  56 {
  57         char *env;
  58         int res = -1;
  59
  60         env = getenv(env_name);
  61         if (env)
  62                 res = simple_strtol(env, NULL, 0);
  63
  64         return res;
  65 }
  66
  67 int board_eth_init(bd_t *bis)
  68 {
  69         int j;
  70         int res;
  71         int port_num;
  72         char link_type_name[32];
  73
  74         /* By default, select PA PLL clock as PA clock source */
  75         if (psc_enable_module(KS2_LPSC_PA))
  76                 return -1;
  77         if (psc_enable_module(KS2_LPSC_CPGMAC))
  78                 return -1;
  79         if (psc_enable_module(KS2_LPSC_CRYPTO))
  80                 return -1;
  81         pass_pll_pa_clk_enable();
  82
  83         port_num = get_num_eth_ports();
  84
  85         for (j = 0; j < port_num; j++) {
  86                 sprintf(link_type_name, "sgmii%d_link_type", j);
  87                 res = get_eth_env_param(link_type_name);
  88                 if (res >= 0)
  89                         eth_priv_cfg[j].sgmii_link_type = res;
  90
  91                 keystone2_emac_initialize(&eth_priv_cfg[j]);
  92         }
  93
  94         return 0;
  95 }
  96 #endif
  97
  98 #ifdef CONFIG_SPL_BUILD
  99 void spl_board_init(void)
 100 {
 101         spl_init_keystone_plls();
 102         preloader_console_init();
 103 }
 104
 105 u32 spl_boot_device(void)
 106 {
 107 #if defined(CONFIG_SPL_SPI_LOAD)
 108         return BOOT_DEVICE_SPI;
 109 #else
 110         puts("Unknown boot device\n");
 111         hang();
 112 #endif
 113 }
 114 #endif
 115
 116 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 117 void ft_board_setup(void *blob, bd_t *bd)
 118 {
 119         int lpae;
 120         char *env;
 121         char *endp;
 122         int nbanks;
 123         u64 size[2];
 124         u64 start[2];
 125         char name[32];
 126         int nodeoffset;
 127         u32 ddr3a_size;
 128         int unitrd_fixup = 0;
 129
 130         env = getenv("mem_lpae");
 131         lpae = env && simple_strtol(env, NULL, 0);
 132         env = getenv("uinitrd_fixup");
 133         unitrd_fixup = env && simple_strtol(env, NULL, 0);
 134
 135         ddr3a_size = 0;
 136         if (lpae) {
 137                 env = getenv("ddr3a_size");
 138                 if (env)
 139                         ddr3a_size = simple_strtol(env, NULL, 10);
 140                 if ((ddr3a_size != 8) && (ddr3a_size != 4))
 141                         ddr3a_size = 0;
 142         }
 143
 144         nbanks = 1;
 145         start[0] = bd->bi_dram[0].start;
 146         size[0]  = bd->bi_dram[0].size;
 147
 148         /* adjust memory start address for LPAE */
 149         if (lpae) {
 150                 start[0] -= CONFIG_SYS_SDRAM_BASE;
 151                 start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 152         }
 153
 154         if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
 155                 size[1] = ((u64)ddr3a_size - 2) << 30;
 156                 start[1] = 0x880000000;
 157                 nbanks++;
 158         }
 159
 160         /* reserve memory at start of bank */
 161         sprintf(name, "mem_reserve_head");
 162         env = getenv(name);
 163         if (env) {
 164                 start[0] += ustrtoul(env, &endp, 0);
 165                 size[0] -= ustrtoul(env, &endp, 0);
 166         }
 167
 168         sprintf(name, "mem_reserve");
 169         env = getenv(name);
 170         if (env)
 171                 size[0] -= ustrtoul(env, &endp, 0);
 172
 173         fdt_fixup_memory_banks(blob, start, size, nbanks);
 174
 175         /* Fix up the initrd */
 176         if (lpae && unitrd_fixup) {
 177                 int err;
 178                 u32 *prop1, *prop2;
 179                 u64 initrd_start, initrd_end;
 180
 181                 nodeoffset = fdt_path_offset(blob, "/chosen");
 182                 if (nodeoffset >= 0) {
 183                         prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
 184                                             "linux,initrd-start", NULL);
 185                         prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
 186                                             "linux,initrd-end", NULL);
 187                         if (prop1 && prop2) {
 188                                 initrd_start = __be32_to_cpu(*prop1);
 189                                 initrd_start -= CONFIG_SYS_SDRAM_BASE;
 190                                 initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 191                                 initrd_start = __cpu_to_be64(initrd_start);
 192                                 initrd_end = __be32_to_cpu(*prop2);
 193                                 initrd_end -= CONFIG_SYS_SDRAM_BASE;
 194                                 initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 195                                 initrd_end = __cpu_to_be64(initrd_end);
 196
 197                                 err = fdt_delprop(blob, nodeoffset,
 198                                                   "linux,initrd-start");
 199                                 if (err < 0)
 200                                         puts("error deleting initrd-start\n");
 201
 202                                 err = fdt_delprop(blob, nodeoffset,
 203                                                   "linux,initrd-end");
 204                                 if (err < 0)
 205                                         puts("error deleting initrd-end\n");
 206
 207                                 err = fdt_setprop(blob, nodeoffset,
 208                                                   "linux,initrd-start",
 209                                                   &initrd_start,
 210                                                   sizeof(initrd_start));
 211                                 if (err < 0)
 212                                         puts("error adding initrd-start\n");
 213
 214                                 err = fdt_setprop(blob, nodeoffset,
 215                                                   "linux,initrd-end",
 216                                                   &initrd_end,
 217                                                   sizeof(initrd_end));
 218                                 if (err < 0)
 219                                         puts("error adding linux,initrd-end\n");
 220                         }
 221                 }
 222         }
 223 }
 224
 225 void ft_board_setup_ex(void *blob, bd_t *bd)
 226 {
 227         int lpae;
 228         u64 size;
 229         char *env;
 230         u64 *reserve_start;
 231
 232         env = getenv("mem_lpae");
 233         lpae = env && simple_strtol(env, NULL, 0);
 234
 235         if (lpae) {
 236                 /*
 237                  * the initrd and other reserved memory areas are
 238                  * embedded in in the DTB itslef. fix up these addresses
 239                  * to 36 bit format
 240                  */
 241                 reserve_start = (u64 *)((char *)blob +
 242                                        fdt_off_mem_rsvmap(blob));
 243                 while (1) {
 244                         *reserve_start = __cpu_to_be64(*reserve_start);
 245                         size = __cpu_to_be64(*(reserve_start + 1));
 246                         if (size) {
 247                                 *reserve_start -= CONFIG_SYS_SDRAM_BASE;
 248                                 *reserve_start +=
 249                                         CONFIG_SYS_LPAE_SDRAM_BASE;
 250                                 *reserve_start =
 251                                         __cpu_to_be64(*reserve_start);
 252                         } else {
 253                                 break;
 254                         }
 255                         reserve_start += 2;
 256                 }
 257         }
 258
 259         ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE);
 260 }
 261 #endif