board/ti/ks2_evm/board.c

   1 /*
   2  * Keystone : Board initialization
   3  *
   4  * (C) Copyright 2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include "board.h"
  11 #include <common.h>
  12 #include <spl.h>
  13 #include <exports.h>
  14 #include <fdt_support.h>
  15 #include <asm/arch/ddr3.h>
  16 #include <asm/arch/psc_defs.h>
  17 #include <asm/ti-common/ti-aemif.h>
  18 #include <asm/ti-common/keystone_net.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 static struct aemif_config aemif_configs[] = {
  23         {                       /* CS0 */
  24                 .mode           = AEMIF_MODE_NAND,
  25                 .wr_setup       = 0xf,
  26                 .wr_strobe      = 0x3f,
  27                 .wr_hold        = 7,
  28                 .rd_setup       = 0xf,
  29                 .rd_strobe      = 0x3f,
  30                 .rd_hold        = 7,
  31                 .turn_around    = 3,
  32                 .width          = AEMIF_WIDTH_8,
  33         },
  34 };
  35
  36 int dram_init(void)
  37 {
  38         u32 ddr3_size;
  39
  40         ddr3_size = ddr3_init();
  41
  42         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  43                                     CONFIG_MAX_RAM_BANK_SIZE);
  44         aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
  45         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
  46         return 0;
  47 }
  48
  49 int board_init(void)
  50 {
  51         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  52
  53         return 0;
  54 }
  55
  56 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  57 int get_eth_env_param(char *env_name)
  58 {
  59         char *env;
  60         int res = -1;
  61
  62         env = getenv(env_name);
  63         if (env)
  64                 res = simple_strtol(env, NULL, 0);
  65
  66         return res;
  67 }
  68
  69 int board_eth_init(bd_t *bis)
  70 {
  71         int j;
  72         int res;
  73         int port_num;
  74         char link_type_name[32];
  75
  76         /* By default, select PA PLL clock as PA clock source */
  77         if (psc_enable_module(KS2_LPSC_PA))
  78                 return -1;
  79         if (psc_enable_module(KS2_LPSC_CPGMAC))
  80                 return -1;
  81         if (psc_enable_module(KS2_LPSC_CRYPTO))
  82                 return -1;
  83
  84         port_num = get_num_eth_ports();
  85
  86         for (j = 0; j < port_num; j++) {
  87                 sprintf(link_type_name, "sgmii%d_link_type", j);
  88                 res = get_eth_env_param(link_type_name);
  89                 if (res >= 0)
  90                         eth_priv_cfg[j].sgmii_link_type = res;
  91
  92                 keystone2_emac_initialize(&eth_priv_cfg[j]);
  93         }
  94
  95         return 0;
  96 }
  97 #endif
  98
  99 #ifdef CONFIG_SPL_BUILD
 100 void spl_board_init(void)
 101 {
 102         spl_init_keystone_plls();
 103         preloader_console_init();
 104 }
 105
 106 u32 spl_boot_device(void)
 107 {
 108 #if defined(CONFIG_SPL_SPI_LOAD)
 109         return BOOT_DEVICE_SPI;
 110 #else
 111         puts("Unknown boot device\n");
 112         hang();
 113 #endif
 114 }
 115 #endif
 116
 117 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 118 int ft_board_setup(void *blob, bd_t *bd)
 119 {
 120         int lpae;
 121         char *env;
 122         char *endp;
 123         int nbanks;
 124         u64 size[2];
 125         u64 start[2];
 126         int nodeoffset;
 127         u32 ddr3a_size;
 128         int unitrd_fixup = 0;
 129
 130         env = getenv("mem_lpae");
 131         lpae = env && simple_strtol(env, NULL, 0);
 132         env = getenv("uinitrd_fixup");
 133         unitrd_fixup = env && simple_strtol(env, NULL, 0);
 134
 135         ddr3a_size = 0;
 136         if (lpae) {
 137                 env = getenv("ddr3a_size");
 138                 if (env)
 139                         ddr3a_size = simple_strtol(env, NULL, 10);
 140                 if ((ddr3a_size != 8) && (ddr3a_size != 4))
 141                         ddr3a_size = 0;
 142         }
 143
 144         nbanks = 1;
 145         start[0] = bd->bi_dram[0].start;
 146         size[0]  = bd->bi_dram[0].size;
 147
 148         /* adjust memory start address for LPAE */
 149         if (lpae) {
 150                 start[0] -= CONFIG_SYS_SDRAM_BASE;
 151                 start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 152         }
 153
 154         if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
 155                 size[1] = ((u64)ddr3a_size - 2) << 30;
 156                 start[1] = 0x880000000;
 157                 nbanks++;
 158         }
 159
 160         /* reserve memory at start of bank */
 161         env = getenv("mem_reserve_head");
 162         if (env) {
 163                 start[0] += ustrtoul(env, &endp, 0);
 164                 size[0] -= ustrtoul(env, &endp, 0);
 165         }
 166
 167         env = getenv("mem_reserve");
 168         if (env)
 169                 size[0] -= ustrtoul(env, &endp, 0);
 170
 171         fdt_fixup_memory_banks(blob, start, size, nbanks);
 172
 173         /* Fix up the initrd */
 174         if (lpae && unitrd_fixup) {
 175                 int err;
 176                 u32 *prop1, *prop2;
 177                 u64 initrd_start, initrd_end;
 178
 179                 nodeoffset = fdt_path_offset(blob, "/chosen");
 180                 if (nodeoffset >= 0) {
 181                         prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
 182                                             "linux,initrd-start", NULL);
 183                         prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
 184                                             "linux,initrd-end", NULL);
 185                         if (prop1 && prop2) {
 186                                 initrd_start = __be32_to_cpu(*prop1);
 187                                 initrd_start -= CONFIG_SYS_SDRAM_BASE;
 188                                 initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 189                                 initrd_start = __cpu_to_be64(initrd_start);
 190                                 initrd_end = __be32_to_cpu(*prop2);
 191                                 initrd_end -= CONFIG_SYS_SDRAM_BASE;
 192                                 initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 193                                 initrd_end = __cpu_to_be64(initrd_end);
 194
 195                                 err = fdt_delprop(blob, nodeoffset,
 196                                                   "linux,initrd-start");
 197                                 if (err < 0)
 198                                         puts("error deleting initrd-start\n");
 199
 200                                 err = fdt_delprop(blob, nodeoffset,
 201                                                   "linux,initrd-end");
 202                                 if (err < 0)
 203                                         puts("error deleting initrd-end\n");
 204
 205                                 err = fdt_setprop(blob, nodeoffset,
 206                                                   "linux,initrd-start",
 207                                                   &initrd_start,
 208                                                   sizeof(initrd_start));
 209                                 if (err < 0)
 210                                         puts("error adding initrd-start\n");
 211
 212                                 err = fdt_setprop(blob, nodeoffset,
 213                                                   "linux,initrd-end",
 214                                                   &initrd_end,
 215                                                   sizeof(initrd_end));
 216                                 if (err < 0)
 217                                         puts("error adding linux,initrd-end\n");
 218                         }
 219                 }
 220         }
 221
 222         return 0;
 223 }
 224
 225 void ft_board_setup_ex(void *blob, bd_t *bd)
 226 {
 227         int lpae;
 228         u64 size;
 229         char *env;
 230         u64 *reserve_start;
 231
 232         env = getenv("mem_lpae");
 233         lpae = env && simple_strtol(env, NULL, 0);
 234
 235         if (lpae) {
 236                 /*
 237                  * the initrd and other reserved memory areas are
 238                  * embedded in in the DTB itslef. fix up these addresses
 239                  * to 36 bit format
 240                  */
 241                 reserve_start = (u64 *)((char *)blob +
 242                                        fdt_off_mem_rsvmap(blob));
 243                 while (1) {
 244                         *reserve_start = __cpu_to_be64(*reserve_start);
 245                         size = __cpu_to_be64(*(reserve_start + 1));
 246                         if (size) {
 247                                 *reserve_start -= CONFIG_SYS_SDRAM_BASE;
 248                                 *reserve_start +=
 249                                         CONFIG_SYS_LPAE_SDRAM_BASE;
 250                                 *reserve_start =
 251                                         __cpu_to_be64(*reserve_start);
 252                         } else {
 253                                 break;
 254                         }
 255                         reserve_start += 2;
 256                 }
 257         }
 258
 259         ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE);
 260 }
 261 #endif