board/ti/ks2_evm/board_k2e.c

   1 /*
   2  * K2E EVM : Board initialization
   3  *
   4  * (C) Copyright 2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/arch/ddr3.h>
  12 #include <asm/arch/hardware.h>
  13 #include <asm/ti-common/keystone_net.h>
  14
  15 DECLARE_GLOBAL_DATA_PTR;
  16
  17 unsigned int external_clk[ext_clk_count] = {
  18         [sys_clk]       = 100000000,
  19         [alt_core_clk]  = 100000000,
  20         [pa_clk]        = 100000000,
  21         [ddr3_clk]      = 100000000,
  22         [mcm_clk]       = 312500000,
  23         [pcie_clk]      = 100000000,
  24         [sgmii_clk]     = 156250000,
  25         [xgmii_clk]     = 156250000,
  26         [usb_clk]       = 100000000,
  27 };
  28
  29 static struct pll_init_data core_pll_config[] = {
  30         CORE_PLL_800,
  31         CORE_PLL_850,
  32         CORE_PLL_1000,
  33         CORE_PLL_1250,
  34         CORE_PLL_1350,
  35         CORE_PLL_1400,
  36         CORE_PLL_1500,
  37 };
  38
  39 s16 divn_val[16] = {
  40         0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  41 };
  42
  43 static struct pll_init_data pa_pll_config =
  44         PASS_PLL_1000;
  45
  46 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  47 struct eth_priv_t eth_priv_cfg[] = {
  48         {
  49                 .int_name        = "K2E_EMAC0",
  50                 .rx_flow         = 0,
  51                 .phy_addr        = 0,
  52                 .slave_port      = 1,
  53                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  54         },
  55         {
  56                 .int_name        = "K2E_EMAC1",
  57                 .rx_flow         = 8,
  58                 .phy_addr        = 1,
  59                 .slave_port      = 2,
  60                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  61         },
  62         {
  63                 .int_name        = "K2E_EMAC2",
  64                 .rx_flow         = 16,
  65                 .phy_addr        = 2,
  66                 .slave_port      = 3,
  67                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  68         },
  69         {
  70                 .int_name        = "K2E_EMAC3",
  71                 .rx_flow         = 24,
  72                 .phy_addr        = 3,
  73                 .slave_port      = 4,
  74                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  75         },
  76         {
  77                 .int_name        = "K2E_EMAC4",
  78                 .rx_flow         = 32,
  79                 .phy_addr        = 4,
  80                 .slave_port      = 5,
  81                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  82         },
  83         {
  84                 .int_name        = "K2E_EMAC5",
  85                 .rx_flow         = 40,
  86                 .phy_addr        = 5,
  87                 .slave_port      = 6,
  88                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  89         },
  90         {
  91                 .int_name        = "K2E_EMAC6",
  92                 .rx_flow         = 48,
  93                 .phy_addr        = 6,
  94                 .slave_port      = 7,
  95                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  96         },
  97         {
  98                 .int_name        = "K2E_EMAC7",
  99                 .rx_flow         = 56,
 100                 .phy_addr        = 7,
 101                 .slave_port      = 8,
 102                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
 103         },
 104 };
 105
 106 int get_num_eth_ports(void)
 107 {
 108         return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
 109 }
 110 #endif
 111
 112 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 113 int board_early_init_f(void)
 114 {
 115         int speed;
 116
 117         speed = get_max_dev_speed();
 118         init_pll(&core_pll_config[speed]);
 119
 120         init_pll(&pa_pll_config);
 121
 122         return 0;
 123 }
 124 #endif
 125
 126 #ifdef CONFIG_SPL_BUILD
 127 static struct pll_init_data spl_pll_config[] = {
 128         CORE_PLL_800,
 129 };
 130
 131 void spl_init_keystone_plls(void)
 132 {
 133         init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
 134 }
 135 #endif