2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
15 * @defgroup GPIO_MX35 Board GPIO and Muxing Setup
19 * @file mach-mx35/iomux.c
21 * @brief I/O Muxing control functions
26 #include <asm/arch/mx35.h>
27 #include <asm/arch/mx35_pins.h>
28 #include <asm/arch/iomux.h>
31 * IOMUX register (base) addresses
34 IOMUXGPR = IOMUXC_BASE_ADDR,
35 /*!< General purpose */
36 IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR + 4,
38 IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + 0x324,
39 /*!< last MUX control register */
40 IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + 0x328,
42 IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x794,
43 /*!< last Pad control register */
44 IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7AC,
45 /*!< input select register */
46 IOMUXSW_INPUT_END = IOMUXC_BASE_ADDR + 0x9F4,
47 /*!< last input select register */
50 #define MUX_PIN_NUM_MAX \
51 (((IOMUXSW_PAD_END - IOMUXSW_PAD_CTL) >> 2) + 1)
52 #define MUX_INPUT_NUM_MUX \
53 (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1)
55 #define PIN_TO_IOMUX_INDEX(pin) ((PIN_TO_IOMUX_PAD(pin) - 0x328) >> 2)
58 * This function is used to configure a pin through the IOMUX module.
59 * FIXED ME: for backward compatible. Will be static function!
60 * @param pin a pin number as defined in \b #iomux_pin_name_t
61 * @param cfg an output function as defined in \b #iomux_pin_cfg_t
63 * @return 0 if successful; Non-zero otherwise
65 static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
67 u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
69 if (mux_reg != NON_MUX_I) {
78 * Request ownership for an IO pin. This function has to be the first one
79 * being called before that pin is used. The caller has to check the
80 * return value to make sure it returns 0.
82 * @param pin a name defined by \b iomux_pin_name_t
83 * @param cfg an input function as defined in \b #iomux_pin_cfg_t
85 * @return 0 if successful; Non-zero otherwise
87 int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
89 int ret = iomux_config_mux(pin, cfg);
94 * Release ownership for an IO pin
96 * @param pin a name defined by \b iomux_pin_name_t
97 * @param cfg an input function as defined in \b #iomux_pin_cfg_t
99 void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
104 * This function configures the pad value for a IOMUX pin.
106 * @param pin a pin number as defined in \b #iomux_pin_name_t
107 * @param config the ORed value of elements defined in \b #iomux_pad_config_t
109 void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
111 u32 pad_reg = IOMUXGPR + PIN_TO_IOMUX_PAD(pin);
113 __REG(pad_reg) = config;
117 * This function enables/disables the general purpose function for a particular
120 * @param gp one signal as defined in \b #iomux_gp_func_t
121 * @param en \b #true to enable; \b #false to disable
123 void mxc_iomux_set_gpr(iomux_gp_func_t gp, int en)
137 * This function configures input path.
139 * @param input index of input select register as defined in \b
140 * #iomux_input_select_t
141 * @param config the binary value of elements defined in \b
142 * #iomux_input_config_t
144 void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
146 u32 reg = IOMUXSW_INPUT_CTL + (input << 2);