2 * armboot - Startup Code for OMP2420/ARM1136 CPU-core
4 * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
6 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
7 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
8 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
9 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
10 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 .section ".text.head", "ax"
37 .section ".text.vect", "ax"
40 #ifdef CONFIG_PRELOADER
58 .word 0x12345678 /* now 16*4=64 */
60 ldr pc, _undefined_instruction
61 ldr pc, _software_interrupt
62 ldr pc, _prefetch_abort
68 _undefined_instruction: .word undefined_instruction
69 _software_interrupt: .word software_interrupt
70 _prefetch_abort: .word prefetch_abort
71 _data_abort: .word data_abort
72 _not_used: .word not_used
75 _pad: .word 0x12345678 /* now 16*4=64 */
76 #endif /* CONFIG_PRELOADER */
80 .balignl 16,0xdeadbeef
82 *************************************************************************
84 * Startup Code (reset vector)
86 * do important init only if we don't start from memory!
87 * setup Memory and board specific bits prior to relocation.
88 * relocate armboot to ram
91 *************************************************************************
95 * the actual reset code
98 .section ".text.head", "ax"
102 * set the cpu to SVC32 mode
109 #ifdef CONFIG_OMAP2420H4
110 /* Copy vectors to mask ROM indirect addr */
111 adr r0, _start /* r0 <- current position of code */
112 add r0, r0, #4 /* skip reset vector */
113 mov r2, #64 /* r2 <- size to copy */
114 add r2, r0, r2 /* r2 <- source end address */
115 mov r1, #SRAM_OFFSET0 /* build vect addr */
116 mov r3, #SRAM_OFFSET1
118 mov r3, #SRAM_OFFSET2
121 ldmia r0!, {r3-r10} /* copy from source address [r0] */
122 stmia r1!, {r3-r10} /* copy to target address [r1] */
123 cmp r0, r2 /* until source end address [r2] */
124 bne next /* loop until equal */
125 bl cpy_clk_code /* put dpll adjust code behind vectors */
127 /* the mask ROM code should have PLL and others stable */
128 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
133 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
135 *************************************************************************
137 * CPU_init_critical registers
139 * setup important registers
140 * setup memory timing
142 *************************************************************************
146 * flush v4 I/D caches
149 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
150 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
153 * disable MMU stuff and caches
155 mrc p15, 0, r0, c1, c0, 0
156 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
157 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
158 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
159 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
160 mcr p15, 0, r0, c1, c0, 0
163 * Jump to board specific initialization... The Mask ROM will have already initialized
164 * basic memory. Go here to bump up clock rate and handle wake up conditions.
166 mov ip, lr /* persevere link reg across call */
167 bl lowlevel_init /* go setup pll,mux,memory */
168 mov lr, ip /* restore link */
169 mov pc, lr /* back to my caller */
170 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
172 .section ".text.setup", "ax"
178 .globl _armboot_start
183 * These are defined in the board-specific linker script.
193 #ifdef CONFIG_USE_IRQ
194 /* IRQ stack memory (calculated at run-time) */
195 .globl IRQ_STACK_START
199 /* IRQ stack memory (calculated at run-time) */
200 .globl FIQ_STACK_START
207 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
208 relocate: /* relocate U-Boot to RAM */
209 adr r0, _armboot_start
210 ldr r1, =_armboot_start
211 cmp r0, r1 /* don't reloc during debug */
213 ldr r2, _armboot_start
217 ldr r2, _armboot_start
219 sub r2, r3, r2 /* r2 <- size of armboot */
220 add r2, r0, r2 /* r2 <- source end address */
223 ldmia r0!, {r3-r10} /* copy from source address [r0] */
224 stmia r1!, {r3-r10} /* copy to target address [r1] */
225 cmp r0, r2 /* until source end addreee [r2] */
227 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
229 /* Set up the stack */
231 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
232 #ifdef CONFIG_PRELOADER
233 sub sp, r0, #128 /* leave 32 words for abort-stack */
235 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
236 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
237 #ifdef CONFIG_USE_IRQ
238 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
240 sub sp, r0, #12 /* leave 3 words for abort-stack */
241 #endif /* CONFIG_PRELOADER */
244 ldr r0, _bss_start /* find start of bss segment */
245 ldr r1, _bss_end /* stop here */
246 mov r2, #0x00000000 /* clear */
248 #ifndef CONFIG_PRELOADER
249 clbss_l:str r2, [r0] /* clear loop... */
254 #ifdef CONFIG_ARCH_MMU
257 ldr pc, _start_armboot
259 #ifdef CONFIG_NAND_SPL
260 _start_armboot: .word nand_boot
262 #ifdef CONFIG_ONENAND_IPL
263 _start_armboot: .word start_oneboot
265 _start_armboot: .word start_armboot
266 #endif /* CONFIG_ONENAND_IPL */
267 #endif /* CONFIG_NAND_SPL */
269 #ifndef CONFIG_PRELOADER
271 *************************************************************************
275 *************************************************************************
280 #define S_FRAME_SIZE 72
302 #define MODE_SVC 0x13
306 * use bad_save_user_regs for abort/prefetch/undef/swi ...
307 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
310 .macro bad_save_user_regs
311 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
312 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
314 ldr r2, _armboot_start
315 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
316 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
317 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
318 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
322 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
323 mov r0, sp @ save current stack into r0 (param register)
326 .macro irq_save_user_regs
327 sub sp, sp, #S_FRAME_SIZE
328 stmia sp, {r0 - r12} @ Calling r0-r12
329 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
330 stmdb r8, {sp, lr}^ @ Calling SP, LR
331 str lr, [r8, #0] @ Save calling PC
333 str r6, [r8, #4] @ Save CPSR
334 str r0, [r8, #8] @ Save OLD_R0
338 .macro irq_restore_user_regs
339 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
341 ldr lr, [sp, #S_PC] @ Get PC
342 add sp, sp, #S_FRAME_SIZE
343 subs pc, lr, #4 @ return & move spsr_svc into cpsr
347 ldr r13, _armboot_start @ setup our mode stack (enter in banked mode)
348 sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
349 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
351 str lr, [r13] @ save caller lr in position 0 of saved stack
352 mrs lr, spsr @ get the spsr
353 str lr, [r13, #4] @ save spsr in position 1 of saved stack
355 mov r13, #MODE_SVC @ prepare SVC-Mode
357 msr spsr, r13 @ switch modes, make sure moves will execute
358 mov lr, pc @ capture return pc
359 movs pc, lr @ jump to next instruction & switch modes.
362 .macro get_bad_stack_swi
363 sub r13, r13, #4 @ space on current stack for scratch reg.
364 str r0, [r13] @ save R0's value.
365 ldr r0, _armboot_start @ get data regions start
366 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
367 sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
368 str lr, [r0] @ save caller lr in position 0 of saved stack
369 mrs r0, spsr @ get the spsr
370 str lr, [r0, #4] @ save spsr in position 1 of saved stack
371 ldr r0, [r13] @ restore r0
372 add r13, r13, #4 @ pop stack entry
375 .macro get_irq_stack @ setup IRQ stack
376 ldr sp, IRQ_STACK_START
379 .macro get_fiq_stack @ setup FIQ stack
380 ldr sp, FIQ_STACK_START
382 #endif /* CONFIG_PRELOADER */
387 #ifdef CONFIG_PRELOADER
390 ldr sp, _TEXT_BASE /* use 32 words about stack */
391 bl hang /* hang and never return */
392 #else /* !CONFIG_PRELOADER */
394 undefined_instruction:
397 bl do_undefined_instruction
403 bl do_software_interrupt
423 #ifdef CONFIG_USE_IRQ
430 irq_restore_user_regs
435 /* someone ought to write a more effiction fiq_save_user_regs */
438 irq_restore_user_regs
456 .global arm1136_cache_flush
458 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
459 mov pc, lr @ back to caller
460 #endif /* CONFIG_PRELOADER */