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85xx,86xx: Determine I2C clock frequencies and store in global_data
[karo-tx-uboot.git] / cpu / mpc85xx / speed.c
1 /*
2  * Copyright 2004 Freescale Semiconductor.
3  * (C) Copyright 2003 Motorola Inc.
4  * Xianghua Xiao, (X.Xiao@motorola.com)
5  *
6  * (C) Copyright 2000
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27
28 #include <common.h>
29 #include <ppc_asm.tmpl>
30 #include <asm/processor.h>
31
32 DECLARE_GLOBAL_DATA_PTR;
33
34 /* --------------------------------------------------------------- */
35
36 void get_sys_info (sys_info_t * sysInfo)
37 {
38         volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
39         uint plat_ratio,e500_ratio,half_freqSystemBus;
40
41         plat_ratio = (gur->porpllsr) & 0x0000003e;
42         plat_ratio >>= 1;
43         sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
44         e500_ratio = (gur->porpllsr) & 0x003f0000;
45         e500_ratio >>= 16;
46
47         /* Divide before multiply to avoid integer
48          * overflow for processor speeds above 2GHz */
49         half_freqSystemBus = sysInfo->freqSystemBus/2;
50         sysInfo->freqProcessor = e500_ratio*half_freqSystemBus;
51         sysInfo->freqDDRBus = sysInfo->freqSystemBus;
52
53 #ifdef CONFIG_DDR_CLK_FREQ
54         {
55                 u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
56                 if (ddr_ratio != 0x7)
57                         sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
58         }
59 #endif
60 }
61
62
63 int get_clocks (void)
64 {
65         sys_info_t sys_info;
66 #if defined(CONFIG_CPM2)
67         volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
68         uint sccr, dfbrg;
69
70         /* set VCO = 4 * BRG */
71         cpm->im_cpm_intctl.sccr &= 0xfffffffc;
72         sccr = cpm->im_cpm_intctl.sccr;
73         dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
74 #endif
75         get_sys_info (&sys_info);
76         gd->cpu_clk = sys_info.freqProcessor;
77         gd->bus_clk = sys_info.freqSystemBus;
78         gd->i2c1_clk = sys_info.freqSystemBus;
79         gd->i2c2_clk = sys_info.freqSystemBus;
80
81 #if defined(CONFIG_CPM2)
82         gd->vco_out = 2*sys_info.freqSystemBus;
83         gd->cpm_clk = gd->vco_out / 2;
84         gd->scc_clk = gd->vco_out / 4;
85         gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
86 #endif
87
88         if(gd->cpu_clk != 0) return (0);
89         else return (1);
90 }
91
92
93 /********************************************
94  * get_bus_freq
95  * return system bus freq in Hz
96  *********************************************/
97 ulong get_bus_freq (ulong dummy)
98 {
99         ulong val;
100
101         sys_info_t sys_info;
102
103         get_sys_info (&sys_info);
104         val = sys_info.freqSystemBus;
105
106         return val;
107 }
108
109 /********************************************
110  * get_ddr_freq
111  * return ddr bus freq in Hz
112  *********************************************/
113 ulong get_ddr_freq (ulong dummy)
114 {
115         ulong val;
116
117         sys_info_t sys_info;
118
119         get_sys_info (&sys_info);
120         val = sys_info.freqDDRBus;
121
122         return val;
123 }