drivers/bcm570x_autoneg.h

   1 /******************************************************************************/
   2 /*                                                                            */
   3 /* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom         */
   4 /* Corporation.                                                               */
   5 /* All rights reserved.                                                       */
   6 /*                                                                            */
   7 /* This program is free software; you can redistribute it and/or modify       */
   8 /* it under the terms of the GNU General Public License as published by       */
   9 /* the Free Software Foundation, located in the file LICENSE.                 */
  10 /*                                                                            */
  11 /* History:                                                                   */
  12 /******************************************************************************/
  13
  14
  15 #ifndef AUTONEG_H
  16 #define AUTONEG_H
  17
  18
  19
  20 /******************************************************************************/
  21 /* Constants. */
  22 /******************************************************************************/
  23
  24 #define AN_LINK_TIMER_INTERVAL_US           9000       /* 10ms */
  25
  26 /* TRUE, FALSE */
  27 #define AN_TRUE                             1
  28 #define AN_FALSE                            0
  29
  30
  31
  32 /******************************************************************************/
  33 /* Main data structure for keeping track of 802.3z auto-negotation state */
  34 /* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */
  35 /******************************************************************************/
  36
  37 typedef struct
  38 {
  39     /* Current auto-negotiation state. */
  40     unsigned long State;
  41     #define AN_STATE_UNKNOWN                        0
  42     #define AN_STATE_AN_ENABLE                      1
  43     #define AN_STATE_AN_RESTART_INIT                2
  44     #define AN_STATE_AN_RESTART                     3
  45     #define AN_STATE_DISABLE_LINK_OK                4
  46     #define AN_STATE_ABILITY_DETECT_INIT            5
  47     #define AN_STATE_ABILITY_DETECT                 6
  48     #define AN_STATE_ACK_DETECT_INIT                7
  49     #define AN_STATE_ACK_DETECT                     8
  50     #define AN_STATE_COMPLETE_ACK_INIT              9
  51     #define AN_STATE_COMPLETE_ACK                   10
  52     #define AN_STATE_IDLE_DETECT_INIT               11
  53     #define AN_STATE_IDLE_DETECT                    12
  54     #define AN_STATE_LINK_OK                        13
  55     #define AN_STATE_NEXT_PAGE_WAIT_INIT            14
  56     #define AN_STATE_NEXT_PAGE_WAIT                 16
  57
  58     /* Link timer. */
  59     unsigned long LinkTime_us;
  60
  61     /* Current time. */
  62     unsigned long CurrentTime_us;
  63
  64     /* Need these values for consistency check. */
  65     unsigned short AbilityMatchCfg;
  66
  67     /* Ability, idle, and ack match functions. */
  68     unsigned long AbilityMatchCnt;
  69     char AbilityMatch;
  70     char IdleMatch;
  71     char AckMatch;
  72
  73     /* Tx config data */
  74     union
  75     {
  76         /* The TxConfig register is arranged as follows:                      */
  77         /*                                                                    */
  78         /* MSB                                                           LSB  */
  79         /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
  80         /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8|  */
  81         /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
  82         struct
  83         {
  84 #ifdef BIG_ENDIAN_HOST
  85             unsigned int D7:1;        /* PS1 */
  86             unsigned int D6:1;        /* HD */
  87             unsigned int D5:1;        /* FD */
  88             unsigned int D4:1;
  89             unsigned int D3:1;
  90             unsigned int D2:1;
  91             unsigned int D1:1;
  92             unsigned int D0:1;
  93             unsigned int D15:1;       /* NP */
  94             unsigned int D14:1;       /* ACK */
  95             unsigned int D13:1;       /* RF2 */
  96             unsigned int D12:1;       /* RF1 */
  97             unsigned int D11:1;
  98             unsigned int D10:1;
  99             unsigned int D9:1;
 100             unsigned int D8:1;        /* PS2 */
 101 #else /* BIG_ENDIAN_HOST */
 102             unsigned int D8:1;        /* PS2 */
 103             unsigned int D9:1;
 104             unsigned int D10:1;
 105             unsigned int D11:1;
 106             unsigned int D12:1;       /* RF1 */
 107             unsigned int D13:1;       /* RF2 */
 108             unsigned int D14:1;       /* ACK */
 109             unsigned int D15:1;       /* NP */
 110             unsigned int D0:1;
 111             unsigned int D1:1;
 112             unsigned int D2:1;
 113             unsigned int D3:1;
 114             unsigned int D4:1;
 115             unsigned int D5:1;        /* FD */
 116             unsigned int D6:1;        /* HD */
 117             unsigned int D7:1;        /* PS1 */
 118 #endif
 119         } bits;
 120
 121         unsigned short AsUSHORT;
 122
 123         #define D8_PS2                      bits.D8
 124         #define D12_RF1                     bits.D12
 125         #define D13_RF2                     bits.D13
 126         #define D14_ACK                     bits.D14
 127         #define D15_NP                      bits.D15
 128         #define D5_FD                       bits.D5
 129         #define D6_HD                       bits.D6
 130         #define D7_PS1                      bits.D7
 131     } TxConfig;
 132
 133     /* Rx config data */
 134     union
 135     {
 136         /* The RxConfig register is arranged as follows:                      */
 137         /*                                                                    */
 138         /* MSB                                                           LSB  */
 139         /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
 140         /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8|  */
 141         /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
 142         struct
 143         {
 144 #ifdef BIG_ENDIAN_HOST
 145             unsigned int D7:1;        /* PS1 */
 146             unsigned int D6:1;        /* HD */
 147             unsigned int D5:1;        /* FD */
 148             unsigned int D4:1;
 149             unsigned int D3:1;
 150             unsigned int D2:1;
 151             unsigned int D1:1;
 152             unsigned int D0:1;
 153             unsigned int D15:1;       /* NP */
 154             unsigned int D14:1;       /* ACK */
 155             unsigned int D13:1;       /* RF2 */
 156             unsigned int D12:1;       /* RF1 */
 157             unsigned int D11:1;
 158             unsigned int D10:1;
 159             unsigned int D9:1;
 160             unsigned int D8:1;        /* PS2 */
 161 #else /* BIG_ENDIAN_HOST */
 162             unsigned int D8:1;        /* PS2 */
 163             unsigned int D9:1;
 164             unsigned int D10:1;
 165             unsigned int D11:1;
 166             unsigned int D12:1;       /* RF1 */
 167             unsigned int D13:1;       /* RF2 */
 168             unsigned int D14:1;       /* ACK */
 169             unsigned int D15:1;       /* NP */
 170             unsigned int D0:1;
 171             unsigned int D1:1;
 172             unsigned int D2:1;
 173             unsigned int D3:1;
 174             unsigned int D4:1;
 175             unsigned int D5:1;        /* FD */
 176             unsigned int D6:1;        /* HD */
 177             unsigned int D7:1;        /* PS1 */
 178 #endif
 179         } bits;
 180
 181         unsigned short AsUSHORT;
 182     } RxConfig;
 183
 184     #define AN_CONFIG_NP                            0x0080
 185     #define AN_CONFIG_ACK                           0x0040
 186     #define AN_CONFIG_RF2                           0x0020
 187     #define AN_CONFIG_RF1                           0x0010
 188     #define AN_CONFIG_PS2                           0x0001
 189     #define AN_CONFIG_PS1                           0x8000
 190     #define AN_CONFIG_HD                            0x4000
 191     #define AN_CONFIG_FD                            0x2000
 192
 193
 194     /* Management registers. */
 195
 196     /* Control register. */
 197     union
 198     {
 199         struct
 200         {
 201             unsigned int an_enable:1;
 202             unsigned int loopback:1;
 203             unsigned int reset:1;
 204             unsigned int restart_an:1;
 205         } bits;
 206
 207         unsigned short AsUSHORT;
 208
 209         #define mr_an_enable                Mr0.bits.an_enable
 210         #define mr_loopback                 Mr0.bits.loopback
 211         #define mr_main_reset               Mr0.bits.reset
 212         #define mr_restart_an               Mr0.bits.restart_an
 213     } Mr0;
 214
 215     /* Status register. */
 216     union
 217     {
 218         struct
 219         {
 220             unsigned int an_complete:1;
 221             unsigned int link_ok:1;
 222         } bits;
 223
 224         unsigned short AsUSHORT;
 225
 226         #define mr_an_complete              Mr1.bits.an_complete
 227         #define mr_link_ok                  Mr1.bits.link_ok
 228     } Mr1;
 229
 230     /* Advertisement register. */
 231     union
 232     {
 233         struct
 234         {
 235             unsigned int reserved_4:5;
 236             unsigned int full_duplex:1;
 237             unsigned int half_duplex:1;
 238             unsigned int sym_pause:1;
 239             unsigned int asym_pause:1;
 240             unsigned int reserved_11:3;
 241             unsigned int remote_fault1:1;
 242             unsigned int remote_fault2:1;
 243             unsigned int reserved_14:1;
 244             unsigned int next_page:1;
 245         } bits;
 246
 247         unsigned short AsUSHORT;
 248
 249         #define mr_adv_full_duplex          Mr4.bits.full_duplex
 250         #define mr_adv_half_duplex          Mr4.bits.half_duplex
 251         #define mr_adv_sym_pause            Mr4.bits.sym_pause
 252         #define mr_adv_asym_pause           Mr4.bits.asym_pause
 253         #define mr_adv_remote_fault1        Mr4.bits.remote_fault1
 254         #define mr_adv_remote_fault2        Mr4.bits.remote_fault2
 255         #define mr_adv_next_page            Mr4.bits.next_page
 256     } Mr4;
 257
 258     /* Link partner advertisement register. */
 259     union
 260     {
 261         struct
 262         {
 263             unsigned int reserved_4:5;
 264             unsigned int lp_full_duplex:1;
 265             unsigned int lp_half_duplex:1;
 266             unsigned int lp_sym_pause:1;
 267             unsigned int lp_asym_pause:1;
 268             unsigned int reserved_11:3;
 269             unsigned int lp_remote_fault1:1;
 270             unsigned int lp_remote_fault2:1;
 271             unsigned int lp_ack:1;
 272             unsigned int lp_next_page:1;
 273         } bits;
 274
 275         unsigned short AsUSHORT;
 276
 277         #define mr_lp_adv_full_duplex       Mr5.bits.lp_full_duplex
 278         #define mr_lp_adv_half_duplex       Mr5.bits.lp_half_duplex
 279         #define mr_lp_adv_sym_pause         Mr5.bits.lp_sym_pause
 280         #define mr_lp_adv_asym_pause        Mr5.bits.lp_asym_pause
 281         #define mr_lp_adv_remote_fault1     Mr5.bits.lp_remote_fault1
 282         #define mr_lp_adv_remote_fault2     Mr5.bits.lp_remote_fault2
 283         #define mr_lp_adv_next_page         Mr5.bits.lp_next_page
 284     } Mr5;
 285
 286     /* Auto-negotiation expansion register. */
 287     union
 288     {
 289         struct
 290         {
 291             unsigned int reserved_0:1;
 292             unsigned int page_received:1;
 293             unsigned int next_pageable:1;
 294             unsigned int reserved_15:13;
 295         } bits;
 296
 297         unsigned short AsUSHORT;
 298     } Mr6;
 299
 300     /* Auto-negotiation next page transmit register. */
 301     union
 302     {
 303         struct
 304         {
 305             unsigned int code_field:11;
 306             unsigned int toggle:1;
 307             unsigned int ack2:1;
 308             unsigned int message_page:1;
 309             unsigned int reserved_14:1;
 310             unsigned int next_page:1;
 311         } bits;
 312
 313         unsigned short AsUSHORT;
 314
 315         #define mr_np_tx                    Mr7.AsUSHORT
 316     } Mr7;
 317
 318     /* Auto-negotiation link partner ability register. */
 319     union
 320     {
 321         struct
 322         {
 323             unsigned int code_field:11;
 324             unsigned int toggle:1;
 325             unsigned int ack2:1;
 326             unsigned int message_page:1;
 327             unsigned int ack:1;
 328             unsigned int next_page:1;
 329         } bits;
 330
 331         unsigned short AsUSHORT;
 332
 333         #define mr_lp_np_rx                 Mr8.AsUSHORT
 334     } Mr8;
 335
 336     /* Extended status register. */
 337     union
 338     {
 339         struct
 340         {
 341             unsigned int reserved_11:12;
 342             unsigned int base1000_t_hd:1;
 343             unsigned int base1000_t_fd:1;
 344             unsigned int base1000_x_hd:1;
 345             unsigned int base1000_x_fd:1;
 346         } bits;
 347
 348         unsigned short AsUSHORT;
 349     } Mr15;
 350
 351     /* Miscellaneous state variables. */
 352     union
 353     {
 354         struct
 355         {
 356             unsigned int toggle_tx:1;
 357             unsigned int toggle_rx:1;
 358             unsigned int np_rx:1;
 359             unsigned int page_rx:1;
 360             unsigned int np_loaded:1;
 361         } bits;
 362
 363         unsigned short AsUSHORT;
 364
 365         #define mr_toggle_tx                MrMisc.bits.toggle_tx
 366         #define mr_toggle_rx                MrMisc.bits.toggle_rx
 367         #define mr_np_rx                    MrMisc.bits.np_rx
 368         #define mr_page_rx                  MrMisc.bits.page_rx
 369         #define mr_np_loaded                MrMisc.bits.np_loaded
 370     } MrMisc;
 371
 372
 373     /* Implement specifics */
 374
 375     /* Pointer to the operating system specific data structure. */
 376     void *pContext;
 377 } AN_STATE_INFO, *PAN_STATE_INFO;
 378
 379
 380
 381 /******************************************************************************/
 382 /* Return code of Autoneg8023z. */
 383 /******************************************************************************/
 384
 385 typedef enum
 386 {
 387     AUTONEG_STATUS_OK               = 0,
 388     AUTONEG_STATUS_DONE             = 1,
 389     AUTONEG_STATUS_TIMER_ENABLED    = 2,
 390     AUTONEG_STATUS_FAILED           = 0xfffffff
 391 } AUTONEG_STATUS, *PAUTONEG_STATUS;
 392
 393
 394
 395 /******************************************************************************/
 396 /* Function prototypes. */
 397 /******************************************************************************/
 398
 399 AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo);
 400 void AutonegInit(PAN_STATE_INFO pAnInfo);
 401
 402
 403
 404 /******************************************************************************/
 405 /* The following functions are defined in the os-dependent module. */
 406 /******************************************************************************/
 407
 408 void MM_AnTxConfig(PAN_STATE_INFO pAnInfo);
 409 void MM_AnTxIdle(PAN_STATE_INFO pAnInfo);
 410 char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig);
 411
 412
 413
 414 #endif /* AUTONEG_H */
 415