drivers/fpga/xilinx.c

   1 /*
   2  * (C) Copyright 2012-2013, Xilinx, Michal Simek
   3  *
   4  * (C) Copyright 2002
   5  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
   6  * Keith Outwater, keith_outwater@mvis.com
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  *
  26  */
  27
  28 /*
  29  *  Xilinx FPGA support
  30  */
  31
  32 #include <common.h>
  33 #include <fpga.h>
  34 #include <virtex2.h>
  35 #include <spartan2.h>
  36 #include <spartan3.h>
  37 #include <zynqpl.h>
  38
  39 #if 0
  40 #define FPGA_DEBUG
  41 #endif
  42
  43 /* Define FPGA_DEBUG to get debug printf's */
  44 #ifdef  FPGA_DEBUG
  45 #define PRINTF(fmt,args...)     printf (fmt ,##args)
  46 #else
  47 #define PRINTF(fmt,args...)
  48 #endif
  49
  50 /* Local Static Functions */
  51 static int xilinx_validate (Xilinx_desc * desc, char *fn);
  52
  53 /* ------------------------------------------------------------------------- */
  54
  55 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
  56 {
  57         unsigned int length;
  58         unsigned int swapsize;
  59         char buffer[80];
  60         unsigned char *dataptr;
  61         unsigned int i;
  62         const fpga_desc *desc;
  63         Xilinx_desc *xdesc;
  64
  65         dataptr = (unsigned char *)fpgadata;
  66         /* Find out fpga_description */
  67         desc = fpga_validate(devnum, dataptr, 0, (char *)__func__);
  68         /* Assign xilinx device description */
  69         xdesc = desc->devdesc;
  70
  71         /* skip the first bytes of the bitsteam, their meaning is unknown */
  72         length = (*dataptr << 8) + *(dataptr + 1);
  73         dataptr += 2;
  74         dataptr += length;
  75
  76         /* get design name (identifier, length, string) */
  77         length = (*dataptr << 8) + *(dataptr + 1);
  78         dataptr += 2;
  79         if (*dataptr++ != 0x61) {
  80                 debug("%s: Design name id not recognized in bitstream\n",
  81                       __func__);
  82                 return FPGA_FAIL;
  83         }
  84
  85         length = (*dataptr << 8) + *(dataptr + 1);
  86         dataptr += 2;
  87         for (i = 0; i < length; i++)
  88                 buffer[i] = *dataptr++;
  89
  90         printf("  design filename = \"%s\"\n", buffer);
  91
  92         /* get part number (identifier, length, string) */
  93         if (*dataptr++ != 0x62) {
  94                 printf("%s: Part number id not recognized in bitstream\n",
  95                        __func__);
  96                 return FPGA_FAIL;
  97         }
  98
  99         length = (*dataptr << 8) + *(dataptr + 1);
 100         dataptr += 2;
 101         for (i = 0; i < length; i++)
 102                 buffer[i] = *dataptr++;
 103
 104         if (xdesc->name) {
 105                 i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
 106                 if (i) {
 107                         printf("%s: Wrong bitstream ID for this device\n",
 108                                __func__);
 109                         printf("%s: Bitstream ID %s, current device ID %d/%s\n",
 110                                __func__, buffer, devnum, xdesc->name);
 111                         return FPGA_FAIL;
 112                 }
 113         } else {
 114                 printf("%s: Please fill correct device ID to Xilinx_desc\n",
 115                        __func__);
 116         }
 117         printf("  part number = \"%s\"\n", buffer);
 118
 119         /* get date (identifier, length, string) */
 120         if (*dataptr++ != 0x63) {
 121                 printf("%s: Date identifier not recognized in bitstream\n",
 122                        __func__);
 123                 return FPGA_FAIL;
 124         }
 125
 126         length = (*dataptr << 8) + *(dataptr+1);
 127         dataptr += 2;
 128         for (i = 0; i < length; i++)
 129                 buffer[i] = *dataptr++;
 130         printf("  date = \"%s\"\n", buffer);
 131
 132         /* get time (identifier, length, string) */
 133         if (*dataptr++ != 0x64) {
 134                 printf("%s: Time identifier not recognized in bitstream\n",
 135                        __func__);
 136                 return FPGA_FAIL;
 137         }
 138
 139         length = (*dataptr << 8) + *(dataptr+1);
 140         dataptr += 2;
 141         for (i = 0; i < length; i++)
 142                 buffer[i] = *dataptr++;
 143         printf("  time = \"%s\"\n", buffer);
 144
 145         /* get fpga data length (identifier, length) */
 146         if (*dataptr++ != 0x65) {
 147                 printf("%s: Data length id not recognized in bitstream\n",
 148                        __func__);
 149                 return FPGA_FAIL;
 150         }
 151         swapsize = ((unsigned int) *dataptr << 24) +
 152                    ((unsigned int) *(dataptr + 1) << 16) +
 153                    ((unsigned int) *(dataptr + 2) << 8) +
 154                    ((unsigned int) *(dataptr + 3));
 155         dataptr += 4;
 156         printf("  bytes in bitstream = %d\n", swapsize);
 157
 158         return fpga_load(devnum, dataptr, swapsize);
 159 }
 160
 161 int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 162 {
 163         int ret_val = FPGA_FAIL;        /* assume a failure */
 164
 165         if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
 166                 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
 167         } else
 168                 switch (desc->family) {
 169                 case Xilinx_Spartan2:
 170 #if defined(CONFIG_FPGA_SPARTAN2)
 171                         PRINTF ("%s: Launching the Spartan-II Loader...\n",
 172                                         __FUNCTION__);
 173                         ret_val = Spartan2_load (desc, buf, bsize);
 174 #else
 175                         printf ("%s: No support for Spartan-II devices.\n",
 176                                         __FUNCTION__);
 177 #endif
 178                         break;
 179                 case Xilinx_Spartan3:
 180 #if defined(CONFIG_FPGA_SPARTAN3)
 181                         PRINTF ("%s: Launching the Spartan-III Loader...\n",
 182                                         __FUNCTION__);
 183                         ret_val = Spartan3_load (desc, buf, bsize);
 184 #else
 185                         printf ("%s: No support for Spartan-III devices.\n",
 186                                         __FUNCTION__);
 187 #endif
 188                         break;
 189                 case Xilinx_Virtex2:
 190 #if defined(CONFIG_FPGA_VIRTEX2)
 191                         PRINTF ("%s: Launching the Virtex-II Loader...\n",
 192                                         __FUNCTION__);
 193                         ret_val = Virtex2_load (desc, buf, bsize);
 194 #else
 195                         printf ("%s: No support for Virtex-II devices.\n",
 196                                         __FUNCTION__);
 197 #endif
 198                         break;
 199                 case xilinx_zynq:
 200 #if defined(CONFIG_FPGA_ZYNQPL)
 201                         PRINTF("%s: Launching the Zynq PL Loader...\n",
 202                                __func__);
 203                         ret_val = zynq_load(desc, buf, bsize);
 204 #else
 205                         printf("%s: No support for Zynq devices.\n",
 206                                __func__);
 207 #endif
 208                         break;
 209
 210                 default:
 211                         printf ("%s: Unsupported family type, %d\n",
 212                                         __FUNCTION__, desc->family);
 213                 }
 214
 215         return ret_val;
 216 }
 217
 218 int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
 219 {
 220         int ret_val = FPGA_FAIL;        /* assume a failure */
 221
 222         if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
 223                 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
 224         } else
 225                 switch (desc->family) {
 226                 case Xilinx_Spartan2:
 227 #if defined(CONFIG_FPGA_SPARTAN2)
 228                         PRINTF ("%s: Launching the Spartan-II Reader...\n",
 229                                         __FUNCTION__);
 230                         ret_val = Spartan2_dump (desc, buf, bsize);
 231 #else
 232                         printf ("%s: No support for Spartan-II devices.\n",
 233                                         __FUNCTION__);
 234 #endif
 235                         break;
 236                 case Xilinx_Spartan3:
 237 #if defined(CONFIG_FPGA_SPARTAN3)
 238                         PRINTF ("%s: Launching the Spartan-III Reader...\n",
 239                                         __FUNCTION__);
 240                         ret_val = Spartan3_dump (desc, buf, bsize);
 241 #else
 242                         printf ("%s: No support for Spartan-III devices.\n",
 243                                         __FUNCTION__);
 244 #endif
 245                         break;
 246                 case Xilinx_Virtex2:
 247 #if defined( CONFIG_FPGA_VIRTEX2)
 248                         PRINTF ("%s: Launching the Virtex-II Reader...\n",
 249                                         __FUNCTION__);
 250                         ret_val = Virtex2_dump (desc, buf, bsize);
 251 #else
 252                         printf ("%s: No support for Virtex-II devices.\n",
 253                                         __FUNCTION__);
 254 #endif
 255                         break;
 256                 case xilinx_zynq:
 257 #if defined(CONFIG_FPGA_ZYNQPL)
 258                         PRINTF("%s: Launching the Zynq PL Reader...\n",
 259                                __func__);
 260                         ret_val = zynq_dump(desc, buf, bsize);
 261 #else
 262                         printf("%s: No support for Zynq devices.\n",
 263                                __func__);
 264 #endif
 265                         break;
 266
 267                 default:
 268                         printf ("%s: Unsupported family type, %d\n",
 269                                         __FUNCTION__, desc->family);
 270                 }
 271
 272         return ret_val;
 273 }
 274
 275 int xilinx_info (Xilinx_desc * desc)
 276 {
 277         int ret_val = FPGA_FAIL;
 278
 279         if (xilinx_validate (desc, (char *)__FUNCTION__)) {
 280                 printf ("Family:        \t");
 281                 switch (desc->family) {
 282                 case Xilinx_Spartan2:
 283                         printf ("Spartan-II\n");
 284                         break;
 285                 case Xilinx_Spartan3:
 286                         printf ("Spartan-III\n");
 287                         break;
 288                 case Xilinx_Virtex2:
 289                         printf ("Virtex-II\n");
 290                         break;
 291                 case xilinx_zynq:
 292                         printf("Zynq PL\n");
 293                         break;
 294                         /* Add new family types here */
 295                 default:
 296                         printf ("Unknown family type, %d\n", desc->family);
 297                 }
 298
 299                 printf ("Interface type:\t");
 300                 switch (desc->iface) {
 301                 case slave_serial:
 302                         printf ("Slave Serial\n");
 303                         break;
 304                 case master_serial:     /* Not used */
 305                         printf ("Master Serial\n");
 306                         break;
 307                 case slave_parallel:
 308                         printf ("Slave Parallel\n");
 309                         break;
 310                 case jtag_mode:         /* Not used */
 311                         printf ("JTAG Mode\n");
 312                         break;
 313                 case slave_selectmap:
 314                         printf ("Slave SelectMap Mode\n");
 315                         break;
 316                 case master_selectmap:
 317                         printf ("Master SelectMap Mode\n");
 318                         break;
 319                 case devcfg:
 320                         printf("Device configuration interface (Zynq)\n");
 321                         break;
 322                         /* Add new interface types here */
 323                 default:
 324                         printf ("Unsupported interface type, %d\n", desc->iface);
 325                 }
 326
 327                 printf ("Device Size:   \t%d bytes\n"
 328                                 "Cookie:        \t0x%x (%d)\n",
 329                                 desc->size, desc->cookie, desc->cookie);
 330                 if (desc->name)
 331                         printf("Device name:   \t%s\n", desc->name);
 332
 333                 if (desc->iface_fns) {
 334                         printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
 335                         switch (desc->family) {
 336                         case Xilinx_Spartan2:
 337 #if defined(CONFIG_FPGA_SPARTAN2)
 338                                 Spartan2_info (desc);
 339 #else
 340                                 /* just in case */
 341                                 printf ("%s: No support for Spartan-II devices.\n",
 342                                                 __FUNCTION__);
 343 #endif
 344                                 break;
 345                         case Xilinx_Spartan3:
 346 #if defined(CONFIG_FPGA_SPARTAN3)
 347                                 Spartan3_info (desc);
 348 #else
 349                                 /* just in case */
 350                                 printf ("%s: No support for Spartan-III devices.\n",
 351                                                 __FUNCTION__);
 352 #endif
 353                                 break;
 354                         case Xilinx_Virtex2:
 355 #if defined(CONFIG_FPGA_VIRTEX2)
 356                                 Virtex2_info (desc);
 357 #else
 358                                 /* just in case */
 359                                 printf ("%s: No support for Virtex-II devices.\n",
 360                                                 __FUNCTION__);
 361 #endif
 362                                 break;
 363                         case xilinx_zynq:
 364 #if defined(CONFIG_FPGA_ZYNQPL)
 365                                 zynq_info(desc);
 366 #else
 367                                 /* just in case */
 368                                 printf("%s: No support for Zynq devices.\n",
 369                                        __func__);
 370 #endif
 371                                 /* Add new family types here */
 372                         default:
 373                                 /* we don't need a message here - we give one up above */
 374                                 ;
 375                         }
 376                 } else
 377                         printf ("No Device Function Table.\n");
 378
 379                 ret_val = FPGA_SUCCESS;
 380         } else {
 381                 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
 382         }
 383
 384         return ret_val;
 385 }
 386
 387 /* ------------------------------------------------------------------------- */
 388
 389 static int xilinx_validate (Xilinx_desc * desc, char *fn)
 390 {
 391         int ret_val = false;
 392
 393         if (desc) {
 394                 if ((desc->family > min_xilinx_type) &&
 395                         (desc->family < max_xilinx_type)) {
 396                         if ((desc->iface > min_xilinx_iface_type) &&
 397                                 (desc->iface < max_xilinx_iface_type)) {
 398                                 if (desc->size) {
 399                                         ret_val = true;
 400                                 } else
 401                                         printf ("%s: NULL part size\n", fn);
 402                         } else
 403                                 printf ("%s: Invalid Interface type, %d\n",
 404                                                 fn, desc->iface);
 405                 } else
 406                         printf ("%s: Invalid family type, %d\n", fn, desc->family);
 407         } else
 408                 printf ("%s: NULL descriptor!\n", fn);
 409
 410         return ret_val;
 411 }