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1 /*
2  * (C) Copyright 2002-2004
3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4  *
5  * Copyright (C) 2003 Arabella Software Ltd.
6  * Yuli Barcohen <yuli@arabellasw.com>
7  *
8  * Copyright (C) 2004
9  * Ed Okerson
10  *
11  * Copyright (C) 2006
12  * Tolunay Orkun <listmember@orkun.us>
13  *
14  * See file CREDITS for list of people who contributed to this
15  * project.
16  *
17  * This program is free software; you can redistribute it and/or
18  * modify it under the terms of the GNU General Public License as
19  * published by the Free Software Foundation; either version 2 of
20  * the License, or (at your option) any later version.
21  *
22  * This program is distributed in the hope that it will be useful,
23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
25  * GNU General Public License for more details.
26  *
27  * You should have received a copy of the GNU General Public License
28  * along with this program; if not, write to the Free Software
29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30  * MA 02111-1307 USA
31  *
32  */
33
34 /* The DEBUG define must be before common to enable debugging */
35 /* #define DEBUG        */
36
37 #include <common.h>
38 #include <asm/processor.h>
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 #include <asm/unaligned.h>
42 #include <environment.h>
43 #include <mtd/cfi_flash.h>
44 #include <watchdog.h>
45
46 /*
47  * This file implements a Common Flash Interface (CFI) driver for
48  * U-Boot.
49  *
50  * The width of the port and the width of the chips are determined at
51  * initialization.  These widths are used to calculate the address for
52  * access CFI data structures.
53  *
54  * References
55  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
56  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
57  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
58  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
59  * AMD CFI Specification, Release 2.0 December 1, 2001
60  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
61  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
62  *
63  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
64  * reading and writing ... (yes there is such a Hardware).
65  */
66
67 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
68 #ifdef CONFIG_FLASH_CFI_MTD
69 static uint flash_verbose = 1;
70 #else
71 #define flash_verbose 1
72 #endif
73
74 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
75
76 /*
77  * Check if chip width is defined. If not, start detecting with 8bit.
78  */
79 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
80 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
81 #endif
82
83 /*
84  * 0xffff is an undefined value for the configuration register. When
85  * this value is returned, the configuration register shall not be
86  * written at all (default mode).
87  */
88 static u16 cfi_flash_config_reg(int i)
89 {
90 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
91         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
92 #else
93         return 0xffff;
94 #endif
95 }
96
97 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
98 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
99 #endif
100
101 static phys_addr_t __cfi_flash_bank_addr(int i)
102 {
103         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
104 }
105 phys_addr_t cfi_flash_bank_addr(int i)
106         __attribute__((weak, alias("__cfi_flash_bank_addr")));
107
108 static unsigned long __cfi_flash_bank_size(int i)
109 {
110 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
111         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
112 #else
113         return 0;
114 #endif
115 }
116 unsigned long cfi_flash_bank_size(int i)
117         __attribute__((weak, alias("__cfi_flash_bank_size")));
118
119 static void __flash_write8(u8 value, void *addr)
120 {
121         __raw_writeb(value, addr);
122 }
123
124 static void __flash_write16(u16 value, void *addr)
125 {
126         __raw_writew(value, addr);
127 }
128
129 static void __flash_write32(u32 value, void *addr)
130 {
131         __raw_writel(value, addr);
132 }
133
134 static void __flash_write64(u64 value, void *addr)
135 {
136         /* No architectures currently implement __raw_writeq() */
137         *(volatile u64 *)addr = value;
138 }
139
140 static u8 __flash_read8(void *addr)
141 {
142         return __raw_readb(addr);
143 }
144
145 static u16 __flash_read16(void *addr)
146 {
147         return __raw_readw(addr);
148 }
149
150 static u32 __flash_read32(void *addr)
151 {
152         return __raw_readl(addr);
153 }
154
155 static u64 __flash_read64(void *addr)
156 {
157         /* No architectures currently implement __raw_readq() */
158         return *(volatile u64 *)addr;
159 }
160
161 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
162 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
163 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
164 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
165 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
166 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
167 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
168 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
169 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
170 #else
171 #define flash_write8    __flash_write8
172 #define flash_write16   __flash_write16
173 #define flash_write32   __flash_write32
174 #define flash_write64   __flash_write64
175 #define flash_read8     __flash_read8
176 #define flash_read16    __flash_read16
177 #define flash_read32    __flash_read32
178 #define flash_read64    __flash_read64
179 #endif
180
181 /*-----------------------------------------------------------------------
182  */
183 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
184 flash_info_t *flash_get_info(ulong base)
185 {
186         int i;
187         flash_info_t *info;
188
189         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
190                 info = &flash_info[i];
191                 if (info->size && info->start[0] <= base &&
192                     base <= info->start[0] + info->size - 1)
193                         return info;
194         }
195
196         return NULL;
197 }
198 #endif
199
200 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
201 {
202         if (sect != (info->sector_count - 1))
203                 return info->start[sect + 1] - info->start[sect];
204         else
205                 return info->start[0] + info->size - info->start[sect];
206 }
207
208 /*-----------------------------------------------------------------------
209  * create an address based on the offset and the port width
210  */
211 static inline void *
212 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
213 {
214         unsigned int byte_offset = offset * info->portwidth;
215
216         return (void *)(info->start[sect] + byte_offset);
217 }
218
219 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
220                 unsigned int offset, void *addr)
221 {
222 }
223
224 /*-----------------------------------------------------------------------
225  * make a proper sized command based on the port and chip widths
226  */
227 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
228 {
229         int i;
230         int cword_offset;
231         int cp_offset;
232 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
233         u32 cmd_le = cpu_to_le32(cmd);
234 #endif
235         uchar val;
236         uchar *cp = (uchar *) cmdbuf;
237
238         for (i = info->portwidth; i > 0; i--){
239                 cword_offset = (info->portwidth-i)%info->chipwidth;
240 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
241                 cp_offset = info->portwidth - i;
242                 val = *((uchar*)&cmd_le + cword_offset);
243 #else
244                 cp_offset = i - 1;
245                 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
246 #endif
247                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
248         }
249 }
250
251 #ifdef DEBUG
252 /*-----------------------------------------------------------------------
253  * Debug support
254  */
255 static void print_longlong (char *str, unsigned long long data)
256 {
257         int i;
258         char *cp;
259
260         cp = (char *) &data;
261         for (i = 0; i < 8; i++)
262                 sprintf (&str[i * 2], "%2.2x", *cp++);
263 }
264
265 static void flash_printqry (struct cfi_qry *qry)
266 {
267         u8 *p = (u8 *)qry;
268         int x, y;
269
270         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
271                 debug("%02x : ", x);
272                 for (y = 0; y < 16; y++)
273                         debug("%2.2x ", p[x + y]);
274                 debug(" ");
275                 for (y = 0; y < 16; y++) {
276                         unsigned char c = p[x + y];
277                         if (c >= 0x20 && c <= 0x7e)
278                                 debug("%c", c);
279                         else
280                                 debug(".");
281                 }
282                 debug("\n");
283         }
284 }
285 #endif
286
287
288 /*-----------------------------------------------------------------------
289  * read a character at a port width address
290  */
291 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
292 {
293         uchar *cp;
294         uchar retval;
295
296         cp = flash_map (info, 0, offset);
297 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
298         retval = flash_read8(cp);
299 #else
300         retval = flash_read8(cp + info->portwidth - 1);
301 #endif
302         flash_unmap (info, 0, offset, cp);
303         return retval;
304 }
305
306 /*-----------------------------------------------------------------------
307  * read a word at a port width address, assume 16bit bus
308  */
309 static inline ushort flash_read_word (flash_info_t * info, uint offset)
310 {
311         ushort *addr, retval;
312
313         addr = flash_map (info, 0, offset);
314         retval = flash_read16 (addr);
315         flash_unmap (info, 0, offset, addr);
316         return retval;
317 }
318
319
320 /*-----------------------------------------------------------------------
321  * read a long word by picking the least significant byte of each maximum
322  * port size word. Swap for ppc format.
323  */
324 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
325                               uint offset)
326 {
327         uchar *addr;
328         ulong retval;
329
330 #ifdef DEBUG
331         int x;
332 #endif
333         addr = flash_map (info, sect, offset);
334
335 #ifdef DEBUG
336         debug ("long addr is at %p info->portwidth = %d\n", addr,
337                info->portwidth);
338         for (x = 0; x < 4 * info->portwidth; x++) {
339                 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
340         }
341 #endif
342 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
343         retval = ((flash_read8(addr) << 16) |
344                   (flash_read8(addr + info->portwidth) << 24) |
345                   (flash_read8(addr + 2 * info->portwidth)) |
346                   (flash_read8(addr + 3 * info->portwidth) << 8));
347 #else
348         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
349                   (flash_read8(addr + info->portwidth - 1) << 16) |
350                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
351                   (flash_read8(addr + 3 * info->portwidth - 1)));
352 #endif
353         flash_unmap(info, sect, offset, addr);
354
355         return retval;
356 }
357
358 /*
359  * Write a proper sized command to the correct address
360  */
361 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
362                       uint offset, u32 cmd)
363 {
364
365         void *addr;
366         cfiword_t cword;
367
368         addr = flash_map (info, sect, offset);
369         flash_make_cmd (info, cmd, &cword);
370         switch (info->portwidth) {
371         case FLASH_CFI_8BIT:
372                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
373                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
374                 flash_write8(cword.c, addr);
375                 break;
376         case FLASH_CFI_16BIT:
377                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
378                        cmd, cword.w,
379                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
380                 flash_write16(cword.w, addr);
381                 break;
382         case FLASH_CFI_32BIT:
383                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
384                        cmd, cword.l,
385                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
386                 flash_write32(cword.l, addr);
387                 break;
388         case FLASH_CFI_64BIT:
389 #ifdef DEBUG
390                 {
391                         char str[20];
392
393                         print_longlong (str, cword.ll);
394
395                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
396                                addr, cmd, str,
397                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
398                 }
399 #endif
400                 flash_write64(cword.ll, addr);
401                 break;
402         }
403
404         /* Ensure all the instructions are fully finished */
405         sync();
406
407         flash_unmap(info, sect, offset, addr);
408 }
409
410 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
411 {
412         flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
413         flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
414 }
415
416 /*-----------------------------------------------------------------------
417  */
418 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
419                           uint offset, uchar cmd)
420 {
421         void *addr;
422         cfiword_t cword;
423         int retval;
424
425         addr = flash_map (info, sect, offset);
426         flash_make_cmd (info, cmd, &cword);
427
428         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
429         switch (info->portwidth) {
430         case FLASH_CFI_8BIT:
431                 debug ("is= %x %x\n", flash_read8(addr), cword.c);
432                 retval = (flash_read8(addr) == cword.c);
433                 break;
434         case FLASH_CFI_16BIT:
435                 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
436                 retval = (flash_read16(addr) == cword.w);
437                 break;
438         case FLASH_CFI_32BIT:
439                 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
440                 retval = (flash_read32(addr) == cword.l);
441                 break;
442         case FLASH_CFI_64BIT:
443 #ifdef DEBUG
444                 {
445                         char str1[20];
446                         char str2[20];
447
448                         print_longlong (str1, flash_read64(addr));
449                         print_longlong (str2, cword.ll);
450                         debug ("is= %s %s\n", str1, str2);
451                 }
452 #endif
453                 retval = (flash_read64(addr) == cword.ll);
454                 break;
455         default:
456                 retval = 0;
457                 break;
458         }
459         flash_unmap(info, sect, offset, addr);
460
461         return retval;
462 }
463
464 /*-----------------------------------------------------------------------
465  */
466 static int flash_isset (flash_info_t * info, flash_sect_t sect,
467                         uint offset, uchar cmd)
468 {
469         void *addr;
470         cfiword_t cword;
471         int retval;
472
473         addr = flash_map (info, sect, offset);
474         flash_make_cmd (info, cmd, &cword);
475         switch (info->portwidth) {
476         case FLASH_CFI_8BIT:
477                 retval = ((flash_read8(addr) & cword.c) == cword.c);
478                 break;
479         case FLASH_CFI_16BIT:
480                 retval = ((flash_read16(addr) & cword.w) == cword.w);
481                 break;
482         case FLASH_CFI_32BIT:
483                 retval = ((flash_read32(addr) & cword.l) == cword.l);
484                 break;
485         case FLASH_CFI_64BIT:
486                 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
487                 break;
488         default:
489                 retval = 0;
490                 break;
491         }
492         flash_unmap(info, sect, offset, addr);
493
494         return retval;
495 }
496
497 /*-----------------------------------------------------------------------
498  */
499 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
500                          uint offset, uchar cmd)
501 {
502         void *addr;
503         cfiword_t cword;
504         int retval;
505
506         addr = flash_map (info, sect, offset);
507         flash_make_cmd (info, cmd, &cword);
508         switch (info->portwidth) {
509         case FLASH_CFI_8BIT:
510                 retval = flash_read8(addr) != flash_read8(addr);
511                 break;
512         case FLASH_CFI_16BIT:
513                 retval = flash_read16(addr) != flash_read16(addr);
514                 break;
515         case FLASH_CFI_32BIT:
516                 retval = flash_read32(addr) != flash_read32(addr);
517                 break;
518         case FLASH_CFI_64BIT:
519                 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
520                            (flash_read32(addr+4) != flash_read32(addr+4)) );
521                 break;
522         default:
523                 retval = 0;
524                 break;
525         }
526         flash_unmap(info, sect, offset, addr);
527
528         return retval;
529 }
530
531 /*
532  * flash_is_busy - check to see if the flash is busy
533  *
534  * This routine checks the status of the chip and returns true if the
535  * chip is busy.
536  */
537 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
538 {
539         int retval;
540
541         switch (info->vendor) {
542         case CFI_CMDSET_INTEL_PROG_REGIONS:
543         case CFI_CMDSET_INTEL_STANDARD:
544         case CFI_CMDSET_INTEL_EXTENDED:
545                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
546                 break;
547         case CFI_CMDSET_AMD_STANDARD:
548         case CFI_CMDSET_AMD_EXTENDED:
549 #ifdef CONFIG_FLASH_CFI_LEGACY
550         case CFI_CMDSET_AMD_LEGACY:
551 #endif
552                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
553                 break;
554         default:
555                 retval = 0;
556         }
557         debug ("flash_is_busy: %d\n", retval);
558         return retval;
559 }
560
561 /*-----------------------------------------------------------------------
562  *  wait for XSR.7 to be set. Time out with an error if it does not.
563  *  This routine does not set the flash to read-array mode.
564  */
565 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
566                                ulong tout, char *prompt)
567 {
568         ulong start;
569
570 #if CONFIG_SYS_HZ != 1000
571         if ((ulong)CONFIG_SYS_HZ > 100000)
572                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
573         else
574                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
575 #endif
576
577         /* Wait for command completion */
578 #ifdef CONFIG_SYS_LOW_RES_TIMER
579         reset_timer();
580 #endif
581         start = get_timer (0);
582         WATCHDOG_RESET();
583         while (flash_is_busy (info, sector)) {
584                 if (get_timer (start) > tout) {
585                         printf ("Flash %s timeout at address %lx data %lx\n",
586                                 prompt, info->start[sector],
587                                 flash_read_long (info, sector, 0));
588                         flash_write_cmd (info, sector, 0, info->cmd_reset);
589                         udelay(1);
590                         return ERR_TIMOUT;
591                 }
592                 udelay (1);             /* also triggers watchdog */
593         }
594         return ERR_OK;
595 }
596
597 /*-----------------------------------------------------------------------
598  * Wait for XSR.7 to be set, if it times out print an error, otherwise
599  * do a full status check.
600  *
601  * This routine sets the flash to read-array mode.
602  */
603 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
604                                     ulong tout, char *prompt)
605 {
606         int retcode;
607
608         retcode = flash_status_check (info, sector, tout, prompt);
609         switch (info->vendor) {
610         case CFI_CMDSET_INTEL_PROG_REGIONS:
611         case CFI_CMDSET_INTEL_EXTENDED:
612         case CFI_CMDSET_INTEL_STANDARD:
613                 if ((retcode != ERR_OK)
614                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
615                         retcode = ERR_INVAL;
616                         printf ("Flash %s error at address %lx\n", prompt,
617                                 info->start[sector]);
618                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
619                                          FLASH_STATUS_PSLBS)) {
620                                 puts ("Command Sequence Error.\n");
621                         } else if (flash_isset (info, sector, 0,
622                                                 FLASH_STATUS_ECLBS)) {
623                                 puts ("Block Erase Error.\n");
624                                 retcode = ERR_NOT_ERASED;
625                         } else if (flash_isset (info, sector, 0,
626                                                 FLASH_STATUS_PSLBS)) {
627                                 puts ("Locking Error\n");
628                         }
629                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
630                                 puts ("Block locked.\n");
631                                 retcode = ERR_PROTECTED;
632                         }
633                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
634                                 puts ("Vpp Low Error.\n");
635                 }
636                 flash_write_cmd (info, sector, 0, info->cmd_reset);
637                 udelay(1);
638                 break;
639         default:
640                 break;
641         }
642         return retcode;
643 }
644
645 static int use_flash_status_poll(flash_info_t *info)
646 {
647 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
648         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
649             info->vendor == CFI_CMDSET_AMD_STANDARD)
650                 return 1;
651 #endif
652         return 0;
653 }
654
655 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
656                              ulong tout, char *prompt)
657 {
658 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
659         ulong start;
660         int ready;
661
662 #if CONFIG_SYS_HZ != 1000
663         if ((ulong)CONFIG_SYS_HZ > 100000)
664                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
665         else
666                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
667 #endif
668
669         /* Wait for command completion */
670 #ifdef CONFIG_SYS_LOW_RES_TIMER
671         reset_timer();
672 #endif
673         start = get_timer(0);
674         WATCHDOG_RESET();
675         while (1) {
676                 switch (info->portwidth) {
677                 case FLASH_CFI_8BIT:
678                         ready = flash_read8(dst) == flash_read8(src);
679                         break;
680                 case FLASH_CFI_16BIT:
681                         ready = flash_read16(dst) == flash_read16(src);
682                         break;
683                 case FLASH_CFI_32BIT:
684                         ready = flash_read32(dst) == flash_read32(src);
685                         break;
686                 case FLASH_CFI_64BIT:
687                         ready = flash_read64(dst) == flash_read64(src);
688                         break;
689                 default:
690                         ready = 0;
691                         break;
692                 }
693                 if (ready)
694                         break;
695                 if (get_timer(start) > tout) {
696                         printf("Flash %s timeout at address %lx data %lx\n",
697                                prompt, (ulong)dst, (ulong)flash_read8(dst));
698                         return ERR_TIMOUT;
699                 }
700                 udelay(1);              /* also triggers watchdog */
701         }
702 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
703         return ERR_OK;
704 }
705
706 /*-----------------------------------------------------------------------
707  */
708 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
709 {
710 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
711         unsigned short  w;
712         unsigned int    l;
713         unsigned long long ll;
714 #endif
715
716         switch (info->portwidth) {
717         case FLASH_CFI_8BIT:
718                 cword->c = c;
719                 break;
720         case FLASH_CFI_16BIT:
721 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
722                 w = c;
723                 w <<= 8;
724                 cword->w = (cword->w >> 8) | w;
725 #else
726                 cword->w = (cword->w << 8) | c;
727 #endif
728                 break;
729         case FLASH_CFI_32BIT:
730 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
731                 l = c;
732                 l <<= 24;
733                 cword->l = (cword->l >> 8) | l;
734 #else
735                 cword->l = (cword->l << 8) | c;
736 #endif
737                 break;
738         case FLASH_CFI_64BIT:
739 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
740                 ll = c;
741                 ll <<= 56;
742                 cword->ll = (cword->ll >> 8) | ll;
743 #else
744                 cword->ll = (cword->ll << 8) | c;
745 #endif
746                 break;
747         }
748 }
749
750 /*
751  * Loop through the sector table starting from the previously found sector.
752  * Searches forwards or backwards, dependent on the passed address.
753  */
754 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
755 {
756         static flash_sect_t saved_sector; /* previously found sector */
757         static flash_info_t *saved_info; /* previously used flash bank */
758         flash_sect_t sector = saved_sector;
759
760         if ((info != saved_info) || (sector >= info->sector_count))
761                 sector = 0;
762
763         while ((info->start[sector] < addr)
764                         && (sector < info->sector_count - 1))
765                 sector++;
766         while ((info->start[sector] > addr) && (sector > 0))
767                 /*
768                  * also decrements the sector in case of an overshot
769                  * in the first loop
770                  */
771                 sector--;
772
773         saved_sector = sector;
774         saved_info = info;
775         return sector;
776 }
777
778 /*-----------------------------------------------------------------------
779  */
780 static int flash_write_cfiword (flash_info_t * info, ulong dest,
781                                 cfiword_t cword)
782 {
783         void *dstaddr = (void *)dest;
784         int flag;
785         flash_sect_t sect = 0;
786         char sect_found = 0;
787
788         /* Check if Flash is (sufficiently) erased */
789         switch (info->portwidth) {
790         case FLASH_CFI_8BIT:
791                 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
792                 break;
793         case FLASH_CFI_16BIT:
794                 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
795                 break;
796         case FLASH_CFI_32BIT:
797                 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
798                 break;
799         case FLASH_CFI_64BIT:
800                 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
801                 break;
802         default:
803                 flag = 0;
804                 break;
805         }
806         if (!flag)
807                 return ERR_NOT_ERASED;
808
809         /* Disable interrupts which might cause a timeout here */
810         flag = disable_interrupts ();
811
812         switch (info->vendor) {
813         case CFI_CMDSET_INTEL_PROG_REGIONS:
814         case CFI_CMDSET_INTEL_EXTENDED:
815         case CFI_CMDSET_INTEL_STANDARD:
816                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
817                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
818                 break;
819         case CFI_CMDSET_AMD_EXTENDED:
820         case CFI_CMDSET_AMD_STANDARD:
821                 sect = find_sector(info, dest);
822                 flash_unlock_seq (info, sect);
823                 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
824                 sect_found = 1;
825                 break;
826 #ifdef CONFIG_FLASH_CFI_LEGACY
827         case CFI_CMDSET_AMD_LEGACY:
828                 sect = find_sector(info, dest);
829                 flash_unlock_seq (info, 0);
830                 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
831                 sect_found = 1;
832                 break;
833 #endif
834         }
835
836         switch (info->portwidth) {
837         case FLASH_CFI_8BIT:
838                 flash_write8(cword.c, dstaddr);
839                 break;
840         case FLASH_CFI_16BIT:
841                 flash_write16(cword.w, dstaddr);
842                 break;
843         case FLASH_CFI_32BIT:
844                 flash_write32(cword.l, dstaddr);
845                 break;
846         case FLASH_CFI_64BIT:
847                 flash_write64(cword.ll, dstaddr);
848                 break;
849         }
850
851         /* re-enable interrupts if necessary */
852         if (flag)
853                 enable_interrupts ();
854
855         if (!sect_found)
856                 sect = find_sector (info, dest);
857
858         if (use_flash_status_poll(info))
859                 return flash_status_poll(info, &cword, dstaddr,
860                                          info->write_tout, "write");
861         else
862                 return flash_full_status_check(info, sect,
863                                                info->write_tout, "write");
864 }
865
866 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
867
868 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
869                                   int len)
870 {
871         flash_sect_t sector;
872         int cnt;
873         int retcode;
874         void *src = cp;
875         void *dst = (void *)dest;
876         void *dst2 = dst;
877         int flag = 1;
878         uint offset = 0;
879         unsigned int shift;
880         uchar write_cmd;
881
882         switch (info->portwidth) {
883         case FLASH_CFI_8BIT:
884                 shift = 0;
885                 break;
886         case FLASH_CFI_16BIT:
887                 shift = 1;
888                 break;
889         case FLASH_CFI_32BIT:
890                 shift = 2;
891                 break;
892         case FLASH_CFI_64BIT:
893                 shift = 3;
894                 break;
895         default:
896                 retcode = ERR_INVAL;
897                 goto out_unmap;
898         }
899
900         cnt = len >> shift;
901
902         while ((cnt-- > 0) && (flag == 1)) {
903                 switch (info->portwidth) {
904                 case FLASH_CFI_8BIT:
905                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
906                                 flash_read8(src));
907                         src += 1, dst2 += 1;
908                         break;
909                 case FLASH_CFI_16BIT:
910                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
911                                 flash_read16(src));
912                         src += 2, dst2 += 2;
913                         break;
914                 case FLASH_CFI_32BIT:
915                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
916                                 flash_read32(src));
917                         src += 4, dst2 += 4;
918                         break;
919                 case FLASH_CFI_64BIT:
920                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
921                                 flash_read64(src));
922                         src += 8, dst2 += 8;
923                         break;
924                 }
925         }
926         if (!flag) {
927                 retcode = ERR_NOT_ERASED;
928                 goto out_unmap;
929         }
930
931         src = cp;
932         sector = find_sector (info, dest);
933
934         switch (info->vendor) {
935         case CFI_CMDSET_INTEL_PROG_REGIONS:
936         case CFI_CMDSET_INTEL_STANDARD:
937         case CFI_CMDSET_INTEL_EXTENDED:
938                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
939                                         FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
940                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
941                 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
942                 flash_write_cmd (info, sector, 0, write_cmd);
943                 retcode = flash_status_check (info, sector,
944                                               info->buffer_write_tout,
945                                               "write to buffer");
946                 if (retcode == ERR_OK) {
947                         /* reduce the number of loops by the width of
948                          * the port */
949                         cnt = len >> shift;
950                         flash_write_cmd (info, sector, 0, cnt - 1);
951                         while (cnt-- > 0) {
952                                 switch (info->portwidth) {
953                                 case FLASH_CFI_8BIT:
954                                         flash_write8(flash_read8(src), dst);
955                                         src += 1, dst += 1;
956                                         break;
957                                 case FLASH_CFI_16BIT:
958                                         flash_write16(flash_read16(src), dst);
959                                         src += 2, dst += 2;
960                                         break;
961                                 case FLASH_CFI_32BIT:
962                                         flash_write32(flash_read32(src), dst);
963                                         src += 4, dst += 4;
964                                         break;
965                                 case FLASH_CFI_64BIT:
966                                         flash_write64(flash_read64(src), dst);
967                                         src += 8, dst += 8;
968                                         break;
969                                 default:
970                                         retcode = ERR_INVAL;
971                                         goto out_unmap;
972                                 }
973                         }
974                         flash_write_cmd (info, sector, 0,
975                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
976                         retcode = flash_full_status_check (
977                                 info, sector, info->buffer_write_tout,
978                                 "buffer write");
979                 }
980
981                 break;
982
983         case CFI_CMDSET_AMD_STANDARD:
984         case CFI_CMDSET_AMD_EXTENDED:
985                 flash_unlock_seq(info,0);
986
987 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
988                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
989 #endif
990                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
991                 cnt = len >> shift;
992                 flash_write_cmd(info, sector, offset, cnt - 1);
993
994                 switch (info->portwidth) {
995                 case FLASH_CFI_8BIT:
996                         while (cnt-- > 0) {
997                                 flash_write8(flash_read8(src), dst);
998                                 src += 1, dst += 1;
999                         }
1000                         break;
1001                 case FLASH_CFI_16BIT:
1002                         while (cnt-- > 0) {
1003                                 flash_write16(flash_read16(src), dst);
1004                                 src += 2, dst += 2;
1005                         }
1006                         break;
1007                 case FLASH_CFI_32BIT:
1008                         while (cnt-- > 0) {
1009                                 flash_write32(flash_read32(src), dst);
1010                                 src += 4, dst += 4;
1011                         }
1012                         break;
1013                 case FLASH_CFI_64BIT:
1014                         while (cnt-- > 0) {
1015                                 flash_write64(flash_read64(src), dst);
1016                                 src += 8, dst += 8;
1017                         }
1018                         break;
1019                 default:
1020                         retcode = ERR_INVAL;
1021                         goto out_unmap;
1022                 }
1023
1024                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1025                 if (use_flash_status_poll(info))
1026                         retcode = flash_status_poll(info, src - (1 << shift),
1027                                                     dst - (1 << shift),
1028                                                     info->buffer_write_tout,
1029                                                     "buffer write");
1030                 else
1031                         retcode = flash_full_status_check(info, sector,
1032                                                           info->buffer_write_tout,
1033                                                           "buffer write");
1034                 break;
1035
1036         default:
1037                 debug ("Unknown Command Set\n");
1038                 retcode = ERR_INVAL;
1039                 break;
1040         }
1041
1042 out_unmap:
1043         return retcode;
1044 }
1045 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1046
1047
1048 /*-----------------------------------------------------------------------
1049  */
1050 int flash_erase (flash_info_t * info, int s_first, int s_last)
1051 {
1052         int rcode = 0;
1053         int prot;
1054         flash_sect_t sect;
1055         int st;
1056
1057         if (info->flash_id != FLASH_MAN_CFI) {
1058                 puts ("Can't erase unknown flash type - aborted\n");
1059                 return 1;
1060         }
1061         if ((s_first < 0) || (s_first > s_last)) {
1062                 puts ("- no sectors to erase\n");
1063                 return 1;
1064         }
1065
1066         prot = 0;
1067         for (sect = s_first; sect <= s_last; ++sect) {
1068                 if (info->protect[sect]) {
1069                         prot++;
1070                 }
1071         }
1072         if (prot) {
1073                 printf ("- Warning: %d protected sectors will not be erased!\n",
1074                         prot);
1075         } else if (flash_verbose) {
1076                 putc ('\n');
1077         }
1078
1079
1080         for (sect = s_first; sect <= s_last; sect++) {
1081                 if (ctrlc()) {
1082                         printf("\n");
1083                         return 1;
1084                 }
1085
1086                 if (info->protect[sect] == 0) { /* not protected */
1087 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1088                         int k;
1089                         int size;
1090                         int erased;
1091                         u32 *flash;
1092
1093                         /*
1094                          * Check if whole sector is erased
1095                          */
1096                         size = flash_sector_size(info, sect);
1097                         erased = 1;
1098                         flash = (u32 *)info->start[sect];
1099                         /* divide by 4 for longword access */
1100                         size = size >> 2;
1101                         for (k = 0; k < size; k++) {
1102                                 if (flash_read32(flash++) != 0xffffffff) {
1103                                         erased = 0;
1104                                         break;
1105                                 }
1106                         }
1107                         if (erased) {
1108                                 if (flash_verbose)
1109                                         putc(',');
1110                                 continue;
1111                         }
1112 #endif
1113                         switch (info->vendor) {
1114                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1115                         case CFI_CMDSET_INTEL_STANDARD:
1116                         case CFI_CMDSET_INTEL_EXTENDED:
1117                                 flash_write_cmd (info, sect, 0,
1118                                                  FLASH_CMD_CLEAR_STATUS);
1119                                 flash_write_cmd (info, sect, 0,
1120                                                  FLASH_CMD_BLOCK_ERASE);
1121                                 flash_write_cmd (info, sect, 0,
1122                                                  FLASH_CMD_ERASE_CONFIRM);
1123                                 break;
1124                         case CFI_CMDSET_AMD_STANDARD:
1125                         case CFI_CMDSET_AMD_EXTENDED:
1126                                 flash_unlock_seq (info, sect);
1127                                 flash_write_cmd (info, sect,
1128                                                 info->addr_unlock1,
1129                                                 AMD_CMD_ERASE_START);
1130                                 flash_unlock_seq (info, sect);
1131                                 flash_write_cmd (info, sect, 0,
1132                                                  info->cmd_erase_sector);
1133                                 break;
1134 #ifdef CONFIG_FLASH_CFI_LEGACY
1135                         case CFI_CMDSET_AMD_LEGACY:
1136                                 flash_unlock_seq (info, 0);
1137                                 flash_write_cmd (info, 0, info->addr_unlock1,
1138                                                 AMD_CMD_ERASE_START);
1139                                 flash_unlock_seq (info, 0);
1140                                 flash_write_cmd (info, sect, 0,
1141                                                 AMD_CMD_ERASE_SECTOR);
1142                                 break;
1143 #endif
1144                         default:
1145                                 debug ("Unkown flash vendor %d\n",
1146                                        info->vendor);
1147                                 break;
1148                         }
1149
1150                         if (use_flash_status_poll(info)) {
1151                                 cfiword_t cword;
1152                                 void *dest;
1153                                 cword.ll = 0xffffffffffffffffULL;
1154                                 dest = flash_map(info, sect, 0);
1155                                 st = flash_status_poll(info, &cword, dest,
1156                                                        info->erase_blk_tout, "erase");
1157                                 flash_unmap(info, sect, 0, dest);
1158                         } else
1159                                 st = flash_full_status_check(info, sect,
1160                                                              info->erase_blk_tout,
1161                                                              "erase");
1162                         if (st)
1163                                 rcode = 1;
1164                         else if (flash_verbose)
1165                                 putc ('.');
1166                 }
1167         }
1168
1169         if (flash_verbose)
1170                 puts (" done\n");
1171
1172         return rcode;
1173 }
1174
1175 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1176 static int sector_erased(flash_info_t *info, int i)
1177 {
1178         int k;
1179         int size;
1180         u32 *flash;
1181
1182         /*
1183          * Check if whole sector is erased
1184          */
1185         size = flash_sector_size(info, i);
1186         flash = (u32 *)info->start[i];
1187         /* divide by 4 for longword access */
1188         size = size >> 2;
1189
1190         for (k = 0; k < size; k++) {
1191                 if (flash_read32(flash++) != 0xffffffff)
1192                         return 0;       /* not erased */
1193         }
1194
1195         return 1;                       /* erased */
1196 }
1197 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1198
1199 void flash_print_info (flash_info_t * info)
1200 {
1201         int i;
1202
1203         if (info->flash_id != FLASH_MAN_CFI) {
1204                 puts ("missing or unknown FLASH type\n");
1205                 return;
1206         }
1207
1208         printf ("%s flash (%d x %d)",
1209                 info->name,
1210                 (info->portwidth << 3), (info->chipwidth << 3));
1211         if (info->size < 1024*1024)
1212                 printf ("  Size: %ld kB in %d Sectors\n",
1213                         info->size >> 10, info->sector_count);
1214         else
1215                 printf ("  Size: %ld MB in %d Sectors\n",
1216                         info->size >> 20, info->sector_count);
1217         printf ("  ");
1218         switch (info->vendor) {
1219                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1220                         printf ("Intel Prog Regions");
1221                         break;
1222                 case CFI_CMDSET_INTEL_STANDARD:
1223                         printf ("Intel Standard");
1224                         break;
1225                 case CFI_CMDSET_INTEL_EXTENDED:
1226                         printf ("Intel Extended");
1227                         break;
1228                 case CFI_CMDSET_AMD_STANDARD:
1229                         printf ("AMD Standard");
1230                         break;
1231                 case CFI_CMDSET_AMD_EXTENDED:
1232                         printf ("AMD Extended");
1233                         break;
1234 #ifdef CONFIG_FLASH_CFI_LEGACY
1235                 case CFI_CMDSET_AMD_LEGACY:
1236                         printf ("AMD Legacy");
1237                         break;
1238 #endif
1239                 default:
1240                         printf ("Unknown (%d)", info->vendor);
1241                         break;
1242         }
1243         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1244                 info->manufacturer_id);
1245         printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1246                 info->device_id);
1247         if ((info->device_id & 0xff) == 0x7E) {
1248                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1249                 info->device_id2);
1250         }
1251         if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
1252                 printf("\n  Advanced Sector Protection (PPB) enabled");
1253         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1254                 info->erase_blk_tout,
1255                 info->write_tout);
1256         if (info->buffer_size > 1) {
1257                 printf ("  Buffer write timeout: %ld ms, "
1258                         "buffer size: %d bytes\n",
1259                 info->buffer_write_tout,
1260                 info->buffer_size);
1261         }
1262
1263         puts ("\n  Sector Start Addresses:");
1264         for (i = 0; i < info->sector_count; ++i) {
1265                 if (ctrlc())
1266                         break;
1267                 if ((i % 5) == 0)
1268                         putc('\n');
1269 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1270                 /* print empty and read-only info */
1271                 printf ("  %08lX %c %s ",
1272                         info->start[i],
1273                         sector_erased(info, i) ? 'E' : ' ',
1274                         info->protect[i] ? "RO" : "  ");
1275 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1276                 printf ("  %08lX   %s ",
1277                         info->start[i],
1278                         info->protect[i] ? "RO" : "  ");
1279 #endif
1280         }
1281         putc ('\n');
1282         return;
1283 }
1284
1285 /*-----------------------------------------------------------------------
1286  * This is used in a few places in write_buf() to show programming
1287  * progress.  Making it a function is nasty because it needs to do side
1288  * effect updates to digit and dots.  Repeated code is nasty too, so
1289  * we define it once here.
1290  */
1291 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1292 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1293         if (flash_verbose) { \
1294                 dots -= dots_sub; \
1295                 if ((scale > 0) && (dots <= 0)) { \
1296                         if ((digit % 5) == 0) \
1297                                 printf ("%d", digit / 5); \
1298                         else \
1299                                 putc ('.'); \
1300                         digit--; \
1301                         dots += scale; \
1302                 } \
1303         }
1304 #else
1305 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1306 #endif
1307
1308 /*-----------------------------------------------------------------------
1309  * Copy memory to flash, returns:
1310  * 0 - OK
1311  * 1 - write timeout
1312  * 2 - Flash not erased
1313  */
1314 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1315 {
1316         ulong wp;
1317         uchar *p;
1318         int aln;
1319         cfiword_t cword;
1320         int i, rc;
1321 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1322         int buffered_size;
1323 #endif
1324 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1325         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1326         int scale = 0;
1327         int dots  = 0;
1328
1329         /*
1330          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1331          */
1332         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1333                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1334                         CONFIG_FLASH_SHOW_PROGRESS);
1335         }
1336 #endif
1337
1338         /* get lower aligned address */
1339         wp = (addr & ~(info->portwidth - 1));
1340
1341         /* handle unaligned start */
1342         if ((aln = addr - wp) != 0) {
1343                 cword.l = 0;
1344                 p = (uchar *)wp;
1345                 for (i = 0; i < aln; ++i)
1346                         flash_add_byte (info, &cword, flash_read8(p + i));
1347
1348                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1349                         flash_add_byte (info, &cword, *src++);
1350                         cnt--;
1351                 }
1352                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1353                         flash_add_byte (info, &cword, flash_read8(p + i));
1354
1355                 rc = flash_write_cfiword (info, wp, cword);
1356                 if (rc != 0)
1357                         return rc;
1358
1359                 wp += i;
1360                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1361         }
1362
1363         /* handle the aligned part */
1364 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1365         buffered_size = (info->portwidth / info->chipwidth);
1366         buffered_size *= info->buffer_size;
1367         while (cnt >= info->portwidth) {
1368                 /* prohibit buffer write when buffer_size is 1 */
1369                 if (info->buffer_size == 1) {
1370                         cword.l = 0;
1371                         for (i = 0; i < info->portwidth; i++)
1372                                 flash_add_byte (info, &cword, *src++);
1373                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1374                                 return rc;
1375                         wp += info->portwidth;
1376                         cnt -= info->portwidth;
1377                         continue;
1378                 }
1379
1380                 /* write buffer until next buffered_size aligned boundary */
1381                 i = buffered_size - (wp % buffered_size);
1382                 if (i > cnt)
1383                         i = cnt;
1384                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1385                         return rc;
1386                 i -= i & (info->portwidth - 1);
1387                 wp += i;
1388                 src += i;
1389                 cnt -= i;
1390                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1391                 /* Only check every once in a while */
1392                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1393                         return ERR_ABORTED;
1394         }
1395 #else
1396         while (cnt >= info->portwidth) {
1397                 cword.l = 0;
1398                 for (i = 0; i < info->portwidth; i++) {
1399                         flash_add_byte (info, &cword, *src++);
1400                 }
1401                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1402                         return rc;
1403                 wp += info->portwidth;
1404                 cnt -= info->portwidth;
1405                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1406                 /* Only check every once in a while */
1407                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1408                         return ERR_ABORTED;
1409         }
1410 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1411
1412         if (cnt == 0) {
1413                 return (0);
1414         }
1415
1416         /*
1417          * handle unaligned tail bytes
1418          */
1419         cword.l = 0;
1420         p = (uchar *)wp;
1421         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1422                 flash_add_byte (info, &cword, *src++);
1423                 --cnt;
1424         }
1425         for (; i < info->portwidth; ++i)
1426                 flash_add_byte (info, &cword, flash_read8(p + i));
1427
1428         return flash_write_cfiword (info, wp, cword);
1429 }
1430
1431 static inline int manufact_match(flash_info_t *info, u32 manu)
1432 {
1433         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1434 }
1435
1436 /*-----------------------------------------------------------------------
1437  */
1438 #ifdef CONFIG_SYS_FLASH_PROTECTION
1439
1440 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1441 {
1442         if (manufact_match(info, INTEL_MANUFACT)
1443             && info->device_id == NUMONYX_256MBIT) {
1444                 /*
1445                  * see errata called
1446                  * "Numonyx Axcell P33/P30 Specification Update" :)
1447                  */
1448                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1449                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1450                                    prot)) {
1451                         /*
1452                          * cmd must come before FLASH_CMD_PROTECT + 20us
1453                          * Disable interrupts which might cause a timeout here.
1454                          */
1455                         int flag = disable_interrupts();
1456                         unsigned short cmd;
1457
1458                         if (prot)
1459                                 cmd = FLASH_CMD_PROTECT_SET;
1460                         else
1461                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1462                                 flash_write_cmd(info, sector, 0,
1463                                           FLASH_CMD_PROTECT);
1464                         flash_write_cmd(info, sector, 0, cmd);
1465                         /* re-enable interrupts if necessary */
1466                         if (flag)
1467                                 enable_interrupts();
1468                 }
1469                 return 1;
1470         }
1471         return 0;
1472 }
1473
1474 int flash_real_protect (flash_info_t * info, long sector, int prot)
1475 {
1476         int retcode = 0;
1477
1478         switch (info->vendor) {
1479                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1480                 case CFI_CMDSET_INTEL_STANDARD:
1481                 case CFI_CMDSET_INTEL_EXTENDED:
1482                         if (!cfi_protect_bugfix(info, sector, prot)) {
1483                                 flash_write_cmd(info, sector, 0,
1484                                          FLASH_CMD_CLEAR_STATUS);
1485                                 flash_write_cmd(info, sector, 0,
1486                                         FLASH_CMD_PROTECT);
1487                                 if (prot)
1488                                         flash_write_cmd(info, sector, 0,
1489                                                 FLASH_CMD_PROTECT_SET);
1490                                 else
1491                                         flash_write_cmd(info, sector, 0,
1492                                                 FLASH_CMD_PROTECT_CLEAR);
1493
1494                         }
1495                         break;
1496                 case CFI_CMDSET_AMD_EXTENDED:
1497                 case CFI_CMDSET_AMD_STANDARD:
1498                         /* U-Boot only checks the first byte */
1499                         if (manufact_match(info, ATM_MANUFACT)) {
1500                                 if (prot) {
1501                                         flash_unlock_seq (info, 0);
1502                                         flash_write_cmd (info, 0,
1503                                                         info->addr_unlock1,
1504                                                         ATM_CMD_SOFTLOCK_START);
1505                                         flash_unlock_seq (info, 0);
1506                                         flash_write_cmd (info, sector, 0,
1507                                                         ATM_CMD_LOCK_SECT);
1508                                 } else {
1509                                         flash_write_cmd (info, 0,
1510                                                         info->addr_unlock1,
1511                                                         AMD_CMD_UNLOCK_START);
1512                                         if (info->device_id == ATM_ID_BV6416)
1513                                                 flash_write_cmd (info, sector,
1514                                                         0, ATM_CMD_UNLOCK_SECT);
1515                                 }
1516                         }
1517                         if (info->legacy_unlock) {
1518                                 int flag = disable_interrupts();
1519                                 int lock_flag;
1520
1521                                 flash_unlock_seq(info, 0);
1522                                 flash_write_cmd(info, 0, info->addr_unlock1,
1523                                                 AMD_CMD_SET_PPB_ENTRY);
1524                                 lock_flag = flash_isset(info, sector, 0, 0x01);
1525                                 if (prot) {
1526                                         if (lock_flag) {
1527                                                 flash_write_cmd(info, sector, 0,
1528                                                         AMD_CMD_PPB_LOCK_BC1);
1529                                                 flash_write_cmd(info, sector, 0,
1530                                                         AMD_CMD_PPB_LOCK_BC2);
1531                                         }
1532                                         debug("sector %ld %slocked\n", sector,
1533                                                 lock_flag ? "" : "already ");
1534                                 } else {
1535                                         if (!lock_flag) {
1536                                                 debug("unlock %ld\n", sector);
1537                                                 flash_write_cmd(info, 0, 0,
1538                                                         AMD_CMD_PPB_UNLOCK_BC1);
1539                                                 flash_write_cmd(info, 0, 0,
1540                                                         AMD_CMD_PPB_UNLOCK_BC2);
1541                                         }
1542                                         debug("sector %ld %sunlocked\n", sector,
1543                                                 !lock_flag ? "" : "already ");
1544                                 }
1545                                 if (flag)
1546                                         enable_interrupts();
1547
1548                                 if (flash_status_check(info, sector,
1549                                                 info->erase_blk_tout,
1550                                                 prot ? "protect" : "unprotect"))
1551                                         printf("status check error\n");
1552
1553                                 flash_write_cmd(info, 0, 0,
1554                                                 AMD_CMD_SET_PPB_EXIT_BC1);
1555                                 flash_write_cmd(info, 0, 0,
1556                                                 AMD_CMD_SET_PPB_EXIT_BC2);
1557                         }
1558                         break;
1559 #ifdef CONFIG_FLASH_CFI_LEGACY
1560                 case CFI_CMDSET_AMD_LEGACY:
1561                         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1562                         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1563                         if (prot)
1564                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1565                         else
1566                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1567 #endif
1568         };
1569
1570         /*
1571          * Flash needs to be in status register read mode for
1572          * flash_full_status_check() to work correctly
1573          */
1574         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1575         if ((retcode =
1576              flash_full_status_check (info, sector, info->erase_blk_tout,
1577                                       prot ? "protect" : "unprotect")) == 0) {
1578
1579                 info->protect[sector] = prot;
1580
1581                 /*
1582                  * On some of Intel's flash chips (marked via legacy_unlock)
1583                  * unprotect unprotects all locking.
1584                  */
1585                 if ((prot == 0) && (info->legacy_unlock)) {
1586                         flash_sect_t i;
1587
1588                         for (i = 0; i < info->sector_count; i++) {
1589                                 if (info->protect[i])
1590                                         flash_real_protect (info, i, 1);
1591                         }
1592                 }
1593         }
1594         return retcode;
1595 }
1596
1597 /*-----------------------------------------------------------------------
1598  * flash_read_user_serial - read the OneTimeProgramming cells
1599  */
1600 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1601                              int len)
1602 {
1603         uchar *src;
1604         uchar *dst;
1605
1606         dst = buffer;
1607         src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1608         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1609         memcpy (dst, src + offset, len);
1610         flash_write_cmd (info, 0, 0, info->cmd_reset);
1611         udelay(1);
1612         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1613 }
1614
1615 /*
1616  * flash_read_factory_serial - read the device Id from the protection area
1617  */
1618 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1619                                 int len)
1620 {
1621         uchar *src;
1622
1623         src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1624         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1625         memcpy (buffer, src + offset, len);
1626         flash_write_cmd (info, 0, 0, info->cmd_reset);
1627         udelay(1);
1628         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1629 }
1630
1631 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1632
1633 /*-----------------------------------------------------------------------
1634  * Reverse the order of the erase regions in the CFI QRY structure.
1635  * This is needed for chips that are either a) correctly detected as
1636  * top-boot, or b) buggy.
1637  */
1638 static void cfi_reverse_geometry(struct cfi_qry *qry)
1639 {
1640         unsigned int i, j;
1641         u32 tmp;
1642
1643         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1644                 tmp = get_unaligned(&(qry->erase_region_info[i]));
1645                 put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
1646                               &(qry->erase_region_info[i]));
1647                 put_unaligned(tmp, &(qry->erase_region_info[j]));
1648         }
1649 }
1650
1651 /*-----------------------------------------------------------------------
1652  * read jedec ids from device and set corresponding fields in info struct
1653  *
1654  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1655  *
1656  */
1657 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1658 {
1659         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1660         udelay(1);
1661         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1662         udelay(1000); /* some flash are slow to respond */
1663         info->manufacturer_id = flash_read_uchar (info,
1664                                         FLASH_OFFSET_MANUFACTURER_ID);
1665         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1666                         flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1667                         flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1668         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1669 }
1670
1671 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1672 {
1673         info->cmd_reset = FLASH_CMD_RESET;
1674
1675         cmdset_intel_read_jedec_ids(info);
1676         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1677
1678 #ifdef CONFIG_SYS_FLASH_PROTECTION
1679         /* read legacy lock/unlock bit from intel flash */
1680         if (info->ext_addr) {
1681                 info->legacy_unlock = flash_read_uchar (info,
1682                                 info->ext_addr + 5) & 0x08;
1683         }
1684 #endif
1685
1686         return 0;
1687 }
1688
1689 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1690 {
1691         ushort bankId = 0;
1692         uchar  manuId;
1693
1694         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1695         flash_unlock_seq(info, 0);
1696         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1697         udelay(1000); /* some flash are slow to respond */
1698
1699         manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1700         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1701         while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1702                 bankId += 0x100;
1703                 manuId = flash_read_uchar (info,
1704                         bankId | FLASH_OFFSET_MANUFACTURER_ID);
1705         }
1706         info->manufacturer_id = manuId;
1707
1708         switch (info->chipwidth){
1709         case FLASH_CFI_8BIT:
1710                 info->device_id = flash_read_uchar (info,
1711                                                 FLASH_OFFSET_DEVICE_ID);
1712                 if (info->device_id == 0x7E) {
1713                         /* AMD 3-byte (expanded) device ids */
1714                         info->device_id2 = flash_read_uchar (info,
1715                                                 FLASH_OFFSET_DEVICE_ID2);
1716                         info->device_id2 <<= 8;
1717                         info->device_id2 |= flash_read_uchar (info,
1718                                                 FLASH_OFFSET_DEVICE_ID3);
1719                 }
1720                 break;
1721         case FLASH_CFI_16BIT:
1722                 info->device_id = flash_read_word (info,
1723                                                 FLASH_OFFSET_DEVICE_ID);
1724                 if ((info->device_id & 0xff) == 0x7E) {
1725                         /* AMD 3-byte (expanded) device ids */
1726                         info->device_id2 = flash_read_uchar (info,
1727                                                 FLASH_OFFSET_DEVICE_ID2);
1728                         info->device_id2 <<= 8;
1729                         info->device_id2 |= flash_read_uchar (info,
1730                                                 FLASH_OFFSET_DEVICE_ID3);
1731                 }
1732                 break;
1733         default:
1734                 break;
1735         }
1736         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1737         udelay(1);
1738 }
1739
1740 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1741 {
1742         info->cmd_reset = AMD_CMD_RESET;
1743         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1744
1745         cmdset_amd_read_jedec_ids(info);
1746         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1747
1748 #ifdef CONFIG_SYS_FLASH_PROTECTION
1749         if (info->ext_addr) {
1750                 /* read sector protect/unprotect scheme (at 0x49) */
1751                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1752                         info->legacy_unlock = 1;
1753         }
1754 #endif
1755
1756         return 0;
1757 }
1758
1759 #ifdef CONFIG_FLASH_CFI_LEGACY
1760 static void flash_read_jedec_ids (flash_info_t * info)
1761 {
1762         info->manufacturer_id = 0;
1763         info->device_id       = 0;
1764         info->device_id2      = 0;
1765
1766         switch (info->vendor) {
1767         case CFI_CMDSET_INTEL_PROG_REGIONS:
1768         case CFI_CMDSET_INTEL_STANDARD:
1769         case CFI_CMDSET_INTEL_EXTENDED:
1770                 cmdset_intel_read_jedec_ids(info);
1771                 break;
1772         case CFI_CMDSET_AMD_STANDARD:
1773         case CFI_CMDSET_AMD_EXTENDED:
1774                 cmdset_amd_read_jedec_ids(info);
1775                 break;
1776         default:
1777                 break;
1778         }
1779 }
1780
1781 /*-----------------------------------------------------------------------
1782  * Call board code to request info about non-CFI flash.
1783  * board_flash_get_legacy needs to fill in at least:
1784  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1785  */
1786 static int flash_detect_legacy(phys_addr_t base, int banknum)
1787 {
1788         flash_info_t *info = &flash_info[banknum];
1789
1790         if (board_flash_get_legacy(base, banknum, info)) {
1791                 /* board code may have filled info completely. If not, we
1792                    use JEDEC ID probing. */
1793                 if (!info->vendor) {
1794                         int modes[] = {
1795                                 CFI_CMDSET_AMD_STANDARD,
1796                                 CFI_CMDSET_INTEL_STANDARD
1797                         };
1798                         int i;
1799
1800                         for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1801                                 info->vendor = modes[i];
1802                                 info->start[0] =
1803                                         (ulong)map_physmem(base,
1804                                                            info->portwidth,
1805                                                            MAP_NOCACHE);
1806                                 if (info->portwidth == FLASH_CFI_8BIT
1807                                         && info->interface == FLASH_CFI_X8X16) {
1808                                         info->addr_unlock1 = 0x2AAA;
1809                                         info->addr_unlock2 = 0x5555;
1810                                 } else {
1811                                         info->addr_unlock1 = 0x5555;
1812                                         info->addr_unlock2 = 0x2AAA;
1813                                 }
1814                                 flash_read_jedec_ids(info);
1815                                 debug("JEDEC PROBE: ID %x %x %x\n",
1816                                                 info->manufacturer_id,
1817                                                 info->device_id,
1818                                                 info->device_id2);
1819                                 if (jedec_flash_match(info, info->start[0]))
1820                                         break;
1821                                 else
1822                                         unmap_physmem((void *)info->start[0],
1823                                                       MAP_NOCACHE);
1824                         }
1825                 }
1826
1827                 switch(info->vendor) {
1828                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1829                 case CFI_CMDSET_INTEL_STANDARD:
1830                 case CFI_CMDSET_INTEL_EXTENDED:
1831                         info->cmd_reset = FLASH_CMD_RESET;
1832                         break;
1833                 case CFI_CMDSET_AMD_STANDARD:
1834                 case CFI_CMDSET_AMD_EXTENDED:
1835                 case CFI_CMDSET_AMD_LEGACY:
1836                         info->cmd_reset = AMD_CMD_RESET;
1837                         break;
1838                 }
1839                 info->flash_id = FLASH_MAN_CFI;
1840                 return 1;
1841         }
1842         return 0; /* use CFI */
1843 }
1844 #else
1845 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1846 {
1847         return 0; /* use CFI */
1848 }
1849 #endif
1850
1851 /*-----------------------------------------------------------------------
1852  * detect if flash is compatible with the Common Flash Interface (CFI)
1853  * http://www.jedec.org/download/search/jesd68.pdf
1854  */
1855 static void flash_read_cfi (flash_info_t *info, void *buf,
1856                 unsigned int start, size_t len)
1857 {
1858         u8 *p = buf;
1859         unsigned int i;
1860
1861         for (i = 0; i < len; i++)
1862                 p[i] = flash_read_uchar(info, start + i);
1863 }
1864
1865 static void __flash_cmd_reset(flash_info_t *info)
1866 {
1867         /*
1868          * We do not yet know what kind of commandset to use, so we issue
1869          * the reset command in both Intel and AMD variants, in the hope
1870          * that AMD flash roms ignore the Intel command.
1871          */
1872         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1873         udelay(1);
1874         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1875 }
1876 void flash_cmd_reset(flash_info_t *info)
1877         __attribute__((weak,alias("__flash_cmd_reset")));
1878
1879 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1880 {
1881         int cfi_offset;
1882
1883         /* Issue FLASH reset command */
1884         flash_cmd_reset(info);
1885
1886         for (cfi_offset=0;
1887              cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1888              cfi_offset++) {
1889                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1890                                  FLASH_CMD_CFI);
1891                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1892                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1893                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1894                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1895                                         sizeof(struct cfi_qry));
1896                         info->interface = le16_to_cpu(qry->interface_desc);
1897
1898                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1899                         debug ("device interface is %d\n",
1900                                info->interface);
1901                         debug ("found port %d chip %d ",
1902                                info->portwidth, info->chipwidth);
1903                         debug ("port %d bits chip %d bits\n",
1904                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1905                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1906
1907                         /* calculate command offsets as in the Linux driver */
1908                         info->addr_unlock1 = 0x555;
1909                         info->addr_unlock2 = 0x2aa;
1910
1911                         /*
1912                          * modify the unlock address if we are
1913                          * in compatibility mode
1914                          */
1915                         if (    /* x8/x16 in x8 mode */
1916                                 ((info->chipwidth == FLASH_CFI_BY8) &&
1917                                         (info->interface == FLASH_CFI_X8X16)) ||
1918                                 /* x16/x32 in x16 mode */
1919                                 ((info->chipwidth == FLASH_CFI_BY16) &&
1920                                         (info->interface == FLASH_CFI_X16X32)))
1921                         {
1922                                 info->addr_unlock1 = 0xaaa;
1923                                 info->addr_unlock2 = 0x555;
1924                         }
1925
1926                         info->name = "CFI conformant";
1927                         return 1;
1928                 }
1929         }
1930
1931         return 0;
1932 }
1933
1934 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1935 {
1936         debug ("flash detect cfi\n");
1937
1938         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1939              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1940                 for (info->chipwidth = FLASH_CFI_BY8;
1941                      info->chipwidth <= info->portwidth;
1942                      info->chipwidth <<= 1)
1943                         if (__flash_detect_cfi(info, qry))
1944                                 return 1;
1945         }
1946         debug ("not found\n");
1947         return 0;
1948 }
1949
1950 /*
1951  * Manufacturer-specific quirks. Add workarounds for geometry
1952  * reversal, etc. here.
1953  */
1954 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1955 {
1956         /* check if flash geometry needs reversal */
1957         if (qry->num_erase_regions > 1) {
1958                 /* reverse geometry if top boot part */
1959                 if (info->cfi_version < 0x3131) {
1960                         /* CFI < 1.1, try to guess from device id */
1961                         if ((info->device_id & 0x80) != 0)
1962                                 cfi_reverse_geometry(qry);
1963                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1964                         /* CFI >= 1.1, deduct from top/bottom flag */
1965                         /* note: ext_addr is valid since cfi_version > 0 */
1966                         cfi_reverse_geometry(qry);
1967                 }
1968         }
1969 }
1970
1971 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1972 {
1973         int reverse_geometry = 0;
1974
1975         /* Check the "top boot" bit in the PRI */
1976         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1977                 reverse_geometry = 1;
1978
1979         /* AT49BV6416(T) list the erase regions in the wrong order.
1980          * However, the device ID is identical with the non-broken
1981          * AT49BV642D they differ in the high byte.
1982          */
1983         if (info->device_id == 0xd6 || info->device_id == 0xd2)
1984                 reverse_geometry = !reverse_geometry;
1985
1986         if (reverse_geometry)
1987                 cfi_reverse_geometry(qry);
1988 }
1989
1990 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1991 {
1992         /* check if flash geometry needs reversal */
1993         if (qry->num_erase_regions > 1) {
1994                 /* reverse geometry if top boot part */
1995                 if (info->cfi_version < 0x3131) {
1996                         /* CFI < 1.1, guess by device id */
1997                         if (info->device_id == 0x22CA || /* M29W320DT */
1998                             info->device_id == 0x2256 || /* M29W320ET */
1999                             info->device_id == 0x22D7) { /* M29W800DT */
2000                                 cfi_reverse_geometry(qry);
2001                         }
2002                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2003                         /* CFI >= 1.1, deduct from top/bottom flag */
2004                         /* note: ext_addr is valid since cfi_version > 0 */
2005                         cfi_reverse_geometry(qry);
2006                 }
2007         }
2008 }
2009
2010 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2011 {
2012         /*
2013          * SST, for many recent nor parallel flashes, says they are
2014          * CFI-conformant. This is not true, since qry struct.
2015          * reports a std. AMD command set (0x0002), while SST allows to
2016          * erase two different sector sizes for the same memory.
2017          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2018          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2019          * Since CFI query detect the 4KB number of sectors, users expects
2020          * a sector granularity of 4KB, and it is here set.
2021          */
2022         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2023             info->device_id == 0x5C23) { /* SST39VF3202B */
2024                 /* set sector granularity to 4KB */
2025                 info->cmd_erase_sector=0x50;
2026         }
2027 }
2028
2029 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2030 {
2031         /*
2032          * The M29EW devices seem to report the CFI information wrong
2033          * when it's in 8 bit mode.
2034          * There's an app note from Numonyx on this issue.
2035          * So adjust the buffer size for M29EW while operating in 8-bit mode
2036          */
2037         if (((qry->max_buf_write_size) > 0x8) &&
2038                         (info->device_id == 0x7E) &&
2039                         (info->device_id2 == 0x2201 ||
2040                         info->device_id2 == 0x2301 ||
2041                         info->device_id2 == 0x2801 ||
2042                         info->device_id2 == 0x4801)) {
2043                 debug("Adjusted buffer size on Numonyx flash"
2044                         " M29EW family in 8 bit mode\n");
2045                 qry->max_buf_write_size = 0x8;
2046         }
2047 }
2048
2049 /*
2050  * The following code cannot be run from FLASH!
2051  *
2052  */
2053 ulong flash_get_size (phys_addr_t base, int banknum)
2054 {
2055         flash_info_t *info = &flash_info[banknum];
2056         int i, j;
2057         flash_sect_t sect_cnt;
2058         phys_addr_t sector;
2059         unsigned long tmp;
2060         int size_ratio;
2061         uchar num_erase_regions;
2062         int erase_region_size;
2063         int erase_region_count;
2064         struct cfi_qry qry;
2065         unsigned long max_size;
2066
2067         memset(&qry, 0, sizeof(qry));
2068
2069         info->ext_addr = 0;
2070         info->cfi_version = 0;
2071 #ifdef CONFIG_SYS_FLASH_PROTECTION
2072         info->legacy_unlock = 0;
2073 #endif
2074
2075         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2076
2077         if (flash_detect_cfi (info, &qry)) {
2078                 info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
2079                 info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
2080                 num_erase_regions = qry.num_erase_regions;
2081
2082                 if (info->ext_addr) {
2083                         info->cfi_version = (ushort) flash_read_uchar (info,
2084                                                 info->ext_addr + 3) << 8;
2085                         info->cfi_version |= (ushort) flash_read_uchar (info,
2086                                                 info->ext_addr + 4);
2087                 }
2088
2089 #ifdef DEBUG
2090                 flash_printqry (&qry);
2091 #endif
2092
2093                 switch (info->vendor) {
2094                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2095                 case CFI_CMDSET_INTEL_STANDARD:
2096                 case CFI_CMDSET_INTEL_EXTENDED:
2097                         cmdset_intel_init(info, &qry);
2098                         break;
2099                 case CFI_CMDSET_AMD_STANDARD:
2100                 case CFI_CMDSET_AMD_EXTENDED:
2101                         cmdset_amd_init(info, &qry);
2102                         break;
2103                 default:
2104                         printf("CFI: Unknown command set 0x%x\n",
2105                                         info->vendor);
2106                         /*
2107                          * Unfortunately, this means we don't know how
2108                          * to get the chip back to Read mode. Might
2109                          * as well try an Intel-style reset...
2110                          */
2111                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2112                         return 0;
2113                 }
2114
2115                 /* Do manufacturer-specific fixups */
2116                 switch (info->manufacturer_id) {
2117                 case 0x0001: /* AMD */
2118                 case 0x0037: /* AMIC */
2119                         flash_fixup_amd(info, &qry);
2120                         break;
2121                 case 0x001f:
2122                         flash_fixup_atmel(info, &qry);
2123                         break;
2124                 case 0x0020:
2125                         flash_fixup_stm(info, &qry);
2126                         break;
2127                 case 0x00bf: /* SST */
2128                         flash_fixup_sst(info, &qry);
2129                         break;
2130                 case 0x0089: /* Numonyx */
2131                         flash_fixup_num(info, &qry);
2132                         break;
2133                 }
2134
2135                 debug ("manufacturer is %d\n", info->vendor);
2136                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
2137                 debug ("device id is 0x%x\n", info->device_id);
2138                 debug ("device id2 is 0x%x\n", info->device_id2);
2139                 debug ("cfi version is 0x%04x\n", info->cfi_version);
2140
2141                 size_ratio = info->portwidth / info->chipwidth;
2142                 /* if the chip is x8/x16 reduce the ratio by half */
2143                 if ((info->interface == FLASH_CFI_X8X16)
2144                     && (info->chipwidth == FLASH_CFI_BY8)) {
2145                         size_ratio >>= 1;
2146                 }
2147                 debug ("size_ratio %d port %d bits chip %d bits\n",
2148                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2149                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2150                 info->size = 1 << qry.dev_size;
2151                 /* multiply the size by the number of chips */
2152                 info->size *= size_ratio;
2153                 max_size = cfi_flash_bank_size(banknum);
2154                 if (max_size && (info->size > max_size)) {
2155                         debug("[truncated from %ldMiB]", info->size >> 20);
2156                         info->size = max_size;
2157                 }
2158                 debug ("found %d erase regions\n", num_erase_regions);
2159                 sect_cnt = 0;
2160                 sector = base;
2161                 for (i = 0; i < num_erase_regions; i++) {
2162                         if (i > NUM_ERASE_REGIONS) {
2163                                 printf ("%d erase regions found, only %d used\n",
2164                                         num_erase_regions, NUM_ERASE_REGIONS);
2165                                 break;
2166                         }
2167
2168                         tmp = le32_to_cpu(get_unaligned(
2169                                                 &(qry.erase_region_info[i])));
2170                         debug("erase region %u: 0x%08lx\n", i, tmp);
2171
2172                         erase_region_count = (tmp & 0xffff) + 1;
2173                         tmp >>= 16;
2174                         erase_region_size =
2175                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2176                         debug ("erase_region_count = %d erase_region_size = %d\n",
2177                                 erase_region_count, erase_region_size);
2178                         for (j = 0; j < erase_region_count; j++) {
2179                                 if (sector - base >= info->size)
2180                                         break;
2181                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2182                                         printf("ERROR: too many flash sectors\n");
2183                                         break;
2184                                 }
2185                                 info->start[sect_cnt] =
2186                                         (ulong)map_physmem(sector,
2187                                                            info->portwidth,
2188                                                            MAP_NOCACHE);
2189                                 sector += (erase_region_size * size_ratio);
2190
2191                                 /*
2192                                  * Only read protection status from
2193                                  * supported devices (intel...)
2194                                  */
2195                                 switch (info->vendor) {
2196                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2197                                 case CFI_CMDSET_INTEL_EXTENDED:
2198                                 case CFI_CMDSET_INTEL_STANDARD:
2199                                         /*
2200                                          * Set flash to read-id mode. Otherwise
2201                                          * reading protected status is not
2202                                          * guaranteed.
2203                                          */
2204                                         flash_write_cmd(info, sect_cnt, 0,
2205                                                         FLASH_CMD_READ_ID);
2206                                         info->protect[sect_cnt] =
2207                                                 flash_isset (info, sect_cnt,
2208                                                              FLASH_OFFSET_PROTECT,
2209                                                              FLASH_STATUS_PROTECT);
2210                                         break;
2211                                 case CFI_CMDSET_AMD_EXTENDED:
2212                                 case CFI_CMDSET_AMD_STANDARD:
2213                                         if (!info->legacy_unlock) {
2214                                                 /* default: not protected */
2215                                                 info->protect[sect_cnt] = 0;
2216                                                 break;
2217                                         }
2218
2219                                         /* Read protection (PPB) from sector */
2220                                         flash_write_cmd(info, 0, 0,
2221                                                         info->cmd_reset);
2222                                         flash_unlock_seq(info, 0);
2223                                         flash_write_cmd(info, 0,
2224                                                         info->addr_unlock1,
2225                                                         FLASH_CMD_READ_ID);
2226                                         info->protect[sect_cnt] =
2227                                                 flash_isset(
2228                                                         info, sect_cnt,
2229                                                         FLASH_OFFSET_PROTECT,
2230                                                         FLASH_STATUS_PROTECT);
2231                                         break;
2232                                 default:
2233                                         /* default: not protected */
2234                                         info->protect[sect_cnt] = 0;
2235                                 }
2236
2237                                 sect_cnt++;
2238                         }
2239                 }
2240
2241                 info->sector_count = sect_cnt;
2242                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2243                 tmp = 1 << qry.block_erase_timeout_typ;
2244                 info->erase_blk_tout = tmp *
2245                         (1 << qry.block_erase_timeout_max);
2246                 tmp = (1 << qry.buf_write_timeout_typ) *
2247                         (1 << qry.buf_write_timeout_max);
2248
2249                 /* round up when converting to ms */
2250                 info->buffer_write_tout = (tmp + 999) / 1000;
2251                 tmp = (1 << qry.word_write_timeout_typ) *
2252                         (1 << qry.word_write_timeout_max);
2253                 /* round up when converting to ms */
2254                 info->write_tout = (tmp + 999) / 1000;
2255                 info->flash_id = FLASH_MAN_CFI;
2256                 if ((info->interface == FLASH_CFI_X8X16) &&
2257                     (info->chipwidth == FLASH_CFI_BY8)) {
2258                         /* XXX - Need to test on x8/x16 in parallel. */
2259                         info->portwidth >>= 1;
2260                 }
2261
2262                 flash_write_cmd (info, 0, 0, info->cmd_reset);
2263         }
2264
2265         return (info->size);
2266 }
2267
2268 #ifdef CONFIG_FLASH_CFI_MTD
2269 void flash_set_verbose(uint v)
2270 {
2271         flash_verbose = v;
2272 }
2273 #endif
2274
2275 static void cfi_flash_set_config_reg(u32 base, u16 val)
2276 {
2277 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2278         /*
2279          * Only set this config register if really defined
2280          * to a valid value (0xffff is invalid)
2281          */
2282         if (val == 0xffff)
2283                 return;
2284
2285         /*
2286          * Set configuration register. Data is "encrypted" in the 16 lower
2287          * address bits.
2288          */
2289         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2290         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2291
2292         /*
2293          * Finally issue reset-command to bring device back to
2294          * read-array mode
2295          */
2296         flash_write16(FLASH_CMD_RESET, (void *)base);
2297 #endif
2298 }
2299
2300 /*-----------------------------------------------------------------------
2301  */
2302
2303 void flash_protect_default(void)
2304 {
2305 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2306         int i;
2307         struct apl_s {
2308                 ulong start;
2309                 ulong size;
2310         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2311 #endif
2312
2313         /* Monitor protection ON by default */
2314 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2315         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2316         flash_protect(FLAG_PROTECT_SET,
2317                        CONFIG_SYS_MONITOR_BASE,
2318                        CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2319                        flash_get_info(CONFIG_SYS_MONITOR_BASE));
2320 #endif
2321
2322         /* Environment protection ON by default */
2323 #ifdef CONFIG_ENV_IS_IN_FLASH
2324         flash_protect(FLAG_PROTECT_SET,
2325                        CONFIG_ENV_ADDR,
2326                        CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2327                        flash_get_info(CONFIG_ENV_ADDR));
2328 #endif
2329
2330         /* Redundant environment protection ON by default */
2331 #ifdef CONFIG_ENV_ADDR_REDUND
2332         flash_protect(FLAG_PROTECT_SET,
2333                        CONFIG_ENV_ADDR_REDUND,
2334                        CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2335                        flash_get_info(CONFIG_ENV_ADDR_REDUND));
2336 #endif
2337
2338 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2339         for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2340                 debug("autoprotecting from %08lx to %08lx\n",
2341                       apl[i].start, apl[i].start + apl[i].size - 1);
2342                 flash_protect(FLAG_PROTECT_SET,
2343                                apl[i].start,
2344                                apl[i].start + apl[i].size - 1,
2345                                flash_get_info(apl[i].start));
2346         }
2347 #endif
2348 }
2349
2350 unsigned long flash_init (void)
2351 {
2352         unsigned long size = 0;
2353         int i;
2354
2355 #ifdef CONFIG_SYS_FLASH_PROTECTION
2356         /* read environment from EEPROM */
2357         char s[64];
2358         getenv_f("unlock", s, sizeof(s));
2359 #endif
2360
2361         /* Init: no FLASHes known */
2362         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2363                 flash_info[i].flash_id = FLASH_UNKNOWN;
2364
2365                 /* Optionally write flash configuration register */
2366                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2367                                          cfi_flash_config_reg(i));
2368
2369                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2370                         flash_get_size(cfi_flash_bank_addr(i), i);
2371                 size += flash_info[i].size;
2372                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2373 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2374                         printf ("## Unknown flash on Bank %d "
2375                                 "- Size = 0x%08lx = %ld MB\n",
2376                                 i+1, flash_info[i].size,
2377                                 flash_info[i].size >> 20);
2378 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2379                 }
2380 #ifdef CONFIG_SYS_FLASH_PROTECTION
2381                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2382                         /*
2383                          * Only the U-Boot image and it's environment
2384                          * is protected, all other sectors are
2385                          * unprotected (unlocked) if flash hardware
2386                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2387                          * and the environment variable "unlock" is
2388                          * set to "yes".
2389                          */
2390                         if (flash_info[i].legacy_unlock) {
2391                                 int k;
2392
2393                                 /*
2394                                  * Disable legacy_unlock temporarily,
2395                                  * since flash_real_protect would
2396                                  * relock all other sectors again
2397                                  * otherwise.
2398                                  */
2399                                 flash_info[i].legacy_unlock = 0;
2400
2401                                 /*
2402                                  * Legacy unlocking (e.g. Intel J3) ->
2403                                  * unlock only one sector. This will
2404                                  * unlock all sectors.
2405                                  */
2406                                 flash_real_protect (&flash_info[i], 0, 0);
2407
2408                                 flash_info[i].legacy_unlock = 1;
2409
2410                                 /*
2411                                  * Manually mark other sectors as
2412                                  * unlocked (unprotected)
2413                                  */
2414                                 for (k = 1; k < flash_info[i].sector_count; k++)
2415                                         flash_info[i].protect[k] = 0;
2416                         } else {
2417                                 /*
2418                                  * No legancy unlocking -> unlock all sectors
2419                                  */
2420                                 flash_protect (FLAG_PROTECT_CLEAR,
2421                                                flash_info[i].start[0],
2422                                                flash_info[i].start[0]
2423                                                + flash_info[i].size - 1,
2424                                                &flash_info[i]);
2425                         }
2426                 }
2427 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2428         }
2429
2430         flash_protect_default();
2431 #ifdef CONFIG_FLASH_CFI_MTD
2432         cfi_mtd_init();
2433 #endif
2434
2435         return (size);
2436 }