2 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
16 #include <asm-arm/arch/mx31-regs.h>
19 * Define delays in microsec for NAND device operations
21 #define TROP_US_DELAY 2000
24 * Macros to get byte and bit positions of ECC
26 #define COLPOS(x) ((x) >> 4)
27 #define BITPOS(x) ((x) & 0xf)
29 /* Define single bit Error positions in Main & Spare area */
30 #define MAIN_SINGLEBIT_ERROR 0x4
31 #define SPARE_SINGLEBIT_ERROR 0x1
40 static struct nand_info nandinfo;
41 static int ecc_disabled;
44 * OOB placement block for use with hardware ecc generation
46 static struct nand_ecclayout nand_hw_eccoob_8 = {
48 .eccpos = {6, 7, 8, 9, 10},
55 static struct nand_ecclayout nand_hw_eccoob_2k = {
57 .eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
58 38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
68 /* Define some generic bad / good block scan pattern which are used
69 * while scanning a device for factory marked good / bad blocks. */
70 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
72 static struct nand_bbt_descr smallpage_memorybased = {
73 .options = NAND_BBT_SCAN2NDPAGE,
76 .pattern = scan_ff_pattern
79 static struct nand_bbt_descr largepage_memorybased = {
83 .pattern = scan_ff_pattern
86 /* Generic flash bbt decriptors */
87 static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' };
88 static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' };
90 static struct nand_bbt_descr bbt_main_descr = {
91 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
92 | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
97 .pattern = bbt_pattern
100 static struct nand_bbt_descr bbt_mirror_descr = {
101 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
102 | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
107 .pattern = mirror_pattern
111 * memcpy variant that copies 32 bit words. This is needed since the
112 * NFC only allows 32 bit accesses. Added for U-boot.
114 static void *memcpy_32(void *dest, const void *src, size_t n)
116 u32 *dst_32 = (u32 *) dest;
117 const u32 *src_32 = (u32 *) src;
120 *dst_32++ = *src_32++;
128 * This function polls the NANDFC to wait for the basic operation to
129 * complete by checking the INT bit of config2 register.
131 * @param max_retries number of retry attempts (separated by 1 us)
133 static void wait_op_done(int max_retries)
135 while (max_retries-- > 0) {
136 if (NFC_CONFIG2 & NFC_INT) {
137 NFC_CONFIG2 &= ~NFC_INT;
142 if (max_retries <= 0)
143 MTDDEBUG(MTD_DEBUG_LEVEL0, "wait: INT not set\n");
147 * This function issues the specified command to the NAND device and
148 * waits for completion.
150 * @param cmd command for NAND Flash
152 static void send_cmd(u16 cmd)
154 MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(0x%x)\n", cmd);
156 NFC_FLASH_CMD = (u16) cmd;
157 NFC_CONFIG2 = NFC_CMD;
159 /* Wait for operation to complete */
160 wait_op_done(TROP_US_DELAY);
164 * This function sends an address (or partial address) to the
165 * NAND device. The address is used to select the source/destination for
168 * @param addr address to be written to NFC.
169 * @param islast 1 if this is the last address cycle for command
171 static void send_addr(u16 addr)
173 MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(0x%x %d)\n", addr);
175 NFC_FLASH_ADDR = addr;
176 NFC_CONFIG2 = NFC_ADDR;
178 /* Wait for operation to complete */
179 wait_op_done(TROP_US_DELAY);
183 * This function requests the NANDFC to initate the transfer
184 * of data currently in the NANDFC RAM buffer to the NAND device.
186 * @param buf_id Specify Internal RAM Buffer number (0-3)
187 * @param oob set to 1 if only the spare area is transferred
189 static void send_prog_page(u8 buf_id)
191 MTDDEBUG(MTD_DEBUG_LEVEL3, "send_prog_page (%d)\n", nandinfo.oob);
193 /* NANDFC buffer 0 is used for page read/write */
195 NFC_BUF_ADDR = buf_id;
197 /* Configure spare or page+spare access */
198 if (!nandinfo.largepage) {
200 NFC_CONFIG1 |= NFC_SP_EN;
202 NFC_CONFIG1 &= ~NFC_SP_EN;
204 NFC_CONFIG2 = NFC_INPUT;
206 /* Wait for operation to complete */
207 wait_op_done(TROP_US_DELAY);
211 * This function will correct the single bit ECC error
213 * @param buf_id Specify Internal RAM Buffer number (0-3)
214 * @param eccpos Ecc byte and bit position
215 * @param oob set to 1 if only spare area needs correction
217 static void mxc_nd_correct_error(u8 buf_id, u16 eccpos, int oob)
223 /* Get col & bit position of error
224 these macros works for both 8 & 16 bits */
225 col = COLPOS(eccpos); /* Get half-word position */
226 pos = BITPOS(eccpos); /* Get bit position */
228 MTDDEBUG(MTD_DEBUG_LEVEL3,
229 "mxc_nd_correct_error (col=%d pos=%d)\n", col, pos);
231 /* Set the pointer for main / spare area */
233 buf = (u16 *)(MAIN_AREA0 + col + (256 * buf_id));
235 buf = (u16 *)(SPARE_AREA0 + col + (8 * buf_id));
242 * This function will maintains state of single bit Error
243 * in Main & spare area
245 * @param buf_id Specify Internal RAM Buffer number (0-3)
246 * @param spare set to 1 if only spare area needs correction
248 static void mxc_nd_correct_ecc(u8 buf_id, int spare)
250 u16 value, ecc_status;
252 /* Read the ECC result */
253 ecc_status = NFC_ECC_STATUS_RESULT;
254 MTDDEBUG(MTD_DEBUG_LEVEL3,
255 "mxc_nd_correct_ecc (Ecc status=%x)\n", ecc_status);
257 if (((ecc_status & 0xC) == MAIN_SINGLEBIT_ERROR)
258 || ((ecc_status & 0x3) == SPARE_SINGLEBIT_ERROR)) {
260 if ((ecc_status & 0xC) == MAIN_SINGLEBIT_ERROR) {
261 value = NFC_RSLTMAIN_AREA;
262 /* Correct single bit error in Mainarea
263 NFC will not correct the error in
265 mxc_nd_correct_error(buf_id, value, 0);
267 if ((ecc_status & 0x3) == SPARE_SINGLEBIT_ERROR) {
268 value = NFC_RSLTSPARE_AREA;
269 /* Correct single bit error in Mainarea
270 NFC will not correct the error in
272 mxc_nd_correct_error(buf_id, value, 1);
277 NFC_CONFIG1 &= ~NFC_ECC_EN;
280 } else if (ecc_status == 0) {
283 NFC_CONFIG1 |= NFC_ECC_EN;
286 } /* else 2-bit Error. Do nothing */
290 * This function requests the NANDFC to initated the transfer
291 * of data from the NAND device into in the NANDFC ram buffer.
293 * @param buf_id Specify Internal RAM Buffer number (0-3)
294 * @param oob set 1 if only the spare area is
297 static void send_read_page(u8 buf_id)
299 MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", nandinfo.oob);
301 /* NANDFC buffer 0 is used for page read/write */
302 NFC_BUF_ADDR = buf_id;
304 /* Configure spare or page+spare access */
305 if (!nandinfo.largepage) {
307 NFC_CONFIG1 |= NFC_SP_EN;
309 NFC_CONFIG1 &= ~NFC_SP_EN;
312 NFC_CONFIG2 = NFC_OUTPUT;
314 /* Wait for operation to complete */
315 wait_op_done(TROP_US_DELAY);
317 /* If there are single bit errors in
318 two consecutive page reads then
319 the error is not corrected by the
320 NFC for the second page.
321 Correct single bit error in driver */
323 mxc_nd_correct_ecc(buf_id, nandinfo.oob);
327 * This function requests the NANDFC to perform a read of the
330 static void send_read_id(void)
332 /* NANDFC buffer 0 is used for device ID output */
335 /* Read ID into main buffer */
336 NFC_CONFIG1 &= ~NFC_SP_EN;
337 NFC_CONFIG2 = NFC_ID;
339 /* Wait for operation to complete */
340 wait_op_done(TROP_US_DELAY);
344 * This function requests the NANDFC to perform a read of the
345 * NAND device status and returns the current status.
347 * @return device status
349 static u16 get_dev_status(void)
351 volatile u16 *mainbuf = MAIN_AREA1;
354 /* Issue status request to NAND device */
356 /* store the main area1 first word, later do recovery */
357 store = *((u32 *) mainbuf);
359 * NANDFC buffer 1 is used for device status to prevent
360 * corruption of read/write buffer on status requests.
364 /* Read status into main buffer */
365 NFC_CONFIG1 &= ~NFC_SP_EN;
366 NFC_CONFIG2 = NFC_STATUS;
368 /* Wait for operation to complete */
369 wait_op_done(TROP_US_DELAY);
371 /* Status is placed in first word of main buffer */
372 /* get status, then recovery area 1 data */
374 *((u32 *) mainbuf) = store;
379 static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
382 * If HW ECC is enabled, we turn it on during init. There is
383 * no need to enable again here.
387 static int mxc_nand_correct_data(struct mtd_info *mtd, unsigned char *dat,
388 unsigned char *read_ecc, unsigned char *calc_ecc)
391 * 1-Bit errors are automatically corrected in HW. No need for
392 * additional correction. 2-Bit errors cannot be corrected by
393 * HW ECC, so we need to return failure
395 u16 ecc_status = NFC_ECC_STATUS_RESULT;
397 if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
398 MTDDEBUG(MTD_DEBUG_LEVEL0,
399 "MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
406 static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const unsigned char *dat,
407 unsigned char *ecc_code)
410 * Just return success. HW ECC does not read/write the NFC spare
411 * buffer. Only the FLASH spare area contains the calcuated ECC.
417 * This function reads byte from the NAND Flash
419 * @param mtd MTD structure for the NAND Flash
421 * @return data read from the NAND Flash
423 static unsigned char mxc_nand_read_byte(struct mtd_info *mtd)
425 unsigned char ret_val = 0;
427 volatile u16 *mainbuf = MAIN_AREA0;
428 volatile u16 *sparebuf = SPARE_AREA0;
430 /* Check for status request */
431 if (nandinfo.read_status)
432 return get_dev_status() & 0xFF;
434 /* Get column for 16-bit access */
435 col = nandinfo.col >> 1;
437 /* If we are accessing the spare region */
439 rd_word = sparebuf[col];
441 rd_word = mainbuf[col];
443 /* Pick upper/lower byte of word from RAM buffer */
444 if (nandinfo.col & 0x1)
445 ret_val = (rd_word >> 8) & 0xFF;
447 ret_val = rd_word & 0xFF;
449 /* Update saved column address */
456 * This function reads word from the NAND Flash
458 * @param mtd MTD structure for the NAND Flash
460 * @return data read from the NAND Flash
462 static u16 mxc_nand_read_word(struct mtd_info *mtd)
465 u16 rd_word, ret_val;
468 MTDDEBUG(MTD_DEBUG_LEVEL3, "mxc_nand_read_word(col = %d)\n", nandinfo.col);
471 /* Adjust saved column address */
472 if (col < mtd->writesize && nandinfo.oob)
473 col += mtd->writesize;
475 if (col < mtd->writesize)
476 p = (MAIN_AREA0) + (col >> 1);
478 p = (SPARE_AREA0) + ((col - mtd->writesize) >> 1);
482 ret_val = (rd_word >> 8) & 0xff;
484 ret_val |= (rd_word << 8) & 0xff00;
489 /* Update saved column address */
490 nandinfo.col = col + 2;
496 * This function writes data of length \b len to buffer \b buf. The data
497 * to be written on NAND Flash is first copied to RAMbuffer. After the
498 * Data Input Operation by the NFC, the data is written to NAND Flash.
500 * @param mtd MTD structure for the NAND Flash
501 * @param buf data to be written to NAND Flash
502 * @param len number of bytes to be written
504 static void mxc_nand_write_buf(struct mtd_info *mtd,
505 const unsigned char *buf, int len)
511 MTDDEBUG(MTD_DEBUG_LEVEL3,
512 "mxc_nand_write_buf(col = %d, len = %d)\n", nandinfo.col, len);
516 /* Adjust saved column address */
517 if (col < mtd->writesize && nandinfo.oob)
518 col += mtd->writesize;
520 n = mtd->writesize + mtd->oobsize - col;
521 if (len > mtd->writesize + mtd->oobsize - col)
522 MTDDEBUG(MTD_DEBUG_LEVEL1, "Error: too much data.\n");
526 MTDDEBUG(MTD_DEBUG_LEVEL3,
527 "%s:%d: col = %d, n = %d\n", __FUNCTION__, __LINE__, col, n);
531 if (col < mtd->writesize)
532 p = (volatile u32 *)((ulong) (MAIN_AREA0) + (col & ~3));
534 p = (volatile u32 *)((ulong) (SPARE_AREA0) -
535 mtd->writesize + (col & ~3));
537 MTDDEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n",
538 __FUNCTION__, __LINE__, p);
540 if (((col | (int)&buf[i]) & 3) || n < 16) {
543 if (col & 3 || n < 4)
549 data = (data & 0xffffff00) |
556 data = (data & 0xffff00ff) |
563 data = (data & 0xff00ffff) |
570 data = (data & 0x00ffffff) |
579 int m = mtd->writesize - col;
581 if (col >= mtd->writesize)
586 MTDDEBUG(MTD_DEBUG_LEVEL3,
587 "%s:%d: n = %d, m = %d, i = %d, col = %d\n",
588 __FUNCTION__, __LINE__, n, m, i, col);
590 memcpy_32((void *)(p), &buf[i], m);
596 /* Update saved column address */
601 * This function id is used to read the data buffer from the NAND Flash. To
602 * read the data from NAND Flash first the data output cycle is initiated by
603 * the NFC, which copies the data to RAMbuffer. This data of length \b len is
604 * then copied to buffer \b buf.
606 * @param mtd MTD structure for the NAND Flash
607 * @param buf data to be read from NAND Flash
608 * @param len number of bytes to be read
610 static void mxc_nand_read_buf(struct mtd_info *mtd, unsigned char *buf, int len)
616 MTDDEBUG(MTD_DEBUG_LEVEL3,
617 "mxc_nand_read_buf(col = %d, len = %d)\n", nandinfo.col, len);
621 * Adjust saved column address
622 * for nand_read_oob will pass col within oobsize
624 if (col < mtd->writesize && nandinfo.oob)
625 col += mtd->writesize;
627 n = mtd->writesize + mtd->oobsize - col;
633 if (col < mtd->writesize)
634 p = (volatile u32 *)((ulong) (MAIN_AREA0) + (col & ~3));
636 p = (volatile u32 *)((ulong) (SPARE_AREA0) -
637 mtd->writesize + (col & ~3));
639 if (((col | (int)&buf[i]) & 3) || n < 16) {
646 buf[i++] = (u8) (data);
652 buf[i++] = (u8) (data >> 8);
658 buf[i++] = (u8) (data >> 16);
664 buf[i++] = (u8) (data >> 24);
670 int m = mtd->writesize - col;
672 if (col >= mtd->writesize)
676 memcpy_32(&buf[i], (void *)(p), m);
682 /* Update saved column address */
687 * This function is used by the upper layer to verify the data in NAND Flash
688 * with the data in the \b buf.
690 * @param mtd MTD structure for the NAND Flash
691 * @param buf data to be verified
692 * @param len length of the data to be verified
694 * @return -EFAULT if error else 0
697 mxc_nand_verify_buf(struct mtd_info *mtd, const unsigned char *buf, int len)
699 return -1; /* Was -EFAULT */
703 * This function is used by upper layer for select and deselect of the NAND
706 * @param mtd MTD structure for the NAND Flash
707 * @param chip val indicating select or deselect
709 static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
714 * This function is used by the upper layer to write command to NAND Flash
715 * for different operations to be carried out on NAND Flash
717 * @param mtd MTD structure for the NAND Flash
718 * @param command command for NAND Flash
719 * @param column column offset for the page read
720 * @param page_addr page to be read from NAND Flash
722 static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
723 int column, int page_addr)
725 MTDDEBUG(MTD_DEBUG_LEVEL3,
726 "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
727 command, column, page_addr);
729 /* Reset command state information */
730 nandinfo.read_status = 0;
733 /* Command pre-processing step */
736 case NAND_CMD_STATUS:
738 nandinfo.read_status = 1;
742 nandinfo.col = column;
745 case NAND_CMD_READOOB:
746 nandinfo.col = column;
748 if (nandinfo.largepage)
749 command = NAND_CMD_READ0;
753 if (column >= mtd->writesize) {
754 /* write oob routine caller */
755 if (nandinfo.largepage) {
757 * FIXME: before send SEQIN command for
758 * write OOB, we must read one page out.
759 * For 2K nand has no READ1 command to set
760 * current HW pointer to spare area, we must
761 * write the whole page including OOB together.
763 /* call itself to read a page */
764 mxc_nand_command(mtd, NAND_CMD_READ0, 0,
767 nandinfo.col = column - mtd->writesize;
769 /* Set program pointer to spare region */
770 if (!nandinfo.largepage)
771 send_cmd(NAND_CMD_READOOB);
774 nandinfo.col = column;
775 /* Set program pointer to page start */
776 if (!nandinfo.largepage)
777 send_cmd(NAND_CMD_READ0);
781 case NAND_CMD_PAGEPROG:
783 /* Enable Ecc for page writes */
784 NFC_CONFIG1 |= NFC_ECC_EN;
788 if (nandinfo.largepage) {
789 /* data in 4 areas datas */
797 case NAND_CMD_ERASE1:
802 * Write out the command to the device.
807 * Write out column address, if necessary
811 * MXC NANDFC can only perform full page+spare or
812 * spare-only read/write. When the upper layers
813 * layers perform a read/write buf operation,
814 * we will used the saved column adress to index into
818 if (nandinfo.largepage)
819 /* another col addr cycle for 2k page */
824 * Write out page address, if necessary
826 if (page_addr != -1) {
827 /* paddr_0 - p_addr_7 */
828 send_addr((page_addr & 0xff));
830 if (nandinfo.largepage) {
831 /* One more address cycle for higher
834 if (mtd->size >= 0x10000000) {
835 /* paddr_8 - paddr_15 */
836 send_addr((page_addr >> 8) & 0xff);
837 send_addr((page_addr >> 16) & 0xff);
839 /* paddr_8 - paddr_15 */
840 send_addr((page_addr >> 8) & 0xff);
842 /* One more address cycle for higher
845 if (mtd->size >= 0x4000000) {
846 /* paddr_8 - paddr_15 */
847 send_addr((page_addr >> 8) & 0xff);
848 send_addr((page_addr >> 16) & 0xff);
850 /* paddr_8 - paddr_15 */
851 send_addr((page_addr >> 8) & 0xff);
856 * Command post-processing step
863 case NAND_CMD_READOOB:
865 if (nandinfo.largepage) {
866 /* send read confirm command */
867 send_cmd(NAND_CMD_READSTART);
868 /* read for each AREA */
877 case NAND_CMD_READID:
879 nandinfo.col = column;
882 case NAND_CMD_PAGEPROG:
884 /* Disable Ecc after page writes */
885 NFC_CONFIG1 &= ~NFC_ECC_EN;
889 case NAND_CMD_ERASE2:
894 static int mxc_nand_scan_bbt(struct mtd_info *mtd)
896 struct nand_chip *this = mtd->priv;
898 /* Config before scanning */
899 /* Do not rely on NFMS_BIT, set/clear NFMS bit based
900 * on mtd->writesize */
901 if (mtd->writesize == 2048)
902 NFMS |= 1 << NFMS_BIT;
903 else if ((NFMS >> NFMS_BIT) & 0x1)
904 NFMS &= ~(1 << NFMS_BIT);
906 /* use flash based bbt */
907 this->bbt_td = &bbt_main_descr;
908 this->bbt_md = &bbt_mirror_descr;
910 /* update flash based bbt */
911 this->options |= NAND_USE_FLASH_BBT;
913 if (!this->badblock_pattern) {
914 if (nandinfo.largepage)
915 this->badblock_pattern = &smallpage_memorybased;
917 this->badblock_pattern = (mtd->writesize > 512) ?
918 &largepage_memorybased : &smallpage_memorybased;
920 /* Build bad block table */
921 return nand_scan_bbt(mtd, this->badblock_pattern);
924 int board_nand_init(struct nand_chip *nand)
926 nand->chip_delay = 0;
928 nand->cmdfunc = mxc_nand_command;
929 nand->select_chip = mxc_nand_select_chip;
930 nand->read_byte = mxc_nand_read_byte;
931 nand->read_word = mxc_nand_read_word;
932 nand->write_buf = mxc_nand_write_buf;
933 nand->read_buf = mxc_nand_read_buf;
934 nand->verify_buf = mxc_nand_verify_buf;
935 nand->scan_bbt = mxc_nand_scan_bbt;
936 nand->ecc.calculate = mxc_nand_calculate_ecc;
937 nand->ecc.correct = mxc_nand_correct_data;
938 nand->ecc.hwctl = mxc_nand_enable_hwecc;
939 nand->ecc.mode = NAND_ECC_HW;
941 nand->ecc.size = 512;
944 NFC_CONFIG1 |= NFC_INT_MSK | NFC_RST | NFC_ECC_EN;
946 /* Unlock the internal RAM buffer */
949 /* Block to be unlocked */
950 NFC_UNLOCKSTART_BLKADDR = 0x0;
951 NFC_UNLOCKEND_BLKADDR = 0x4000;
953 /* Unlock Block Command for given address range */
956 /* Only 8 bit bus support for now */
959 if ((NFMS >> NFMS_BIT) & 1) {
960 nandinfo.largepage = 1;
961 nand->ecc.layout = &nand_hw_eccoob_2k;
963 nandinfo.largepage = 0;
964 nand->ecc.layout = &nand_hw_eccoob_8;