drivers/mtd/spi/imx_spi_nor_sst.c

   1 /*
   2  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #include <config.h>
  24 #include <common.h>
  25 #include <spi.h>
  26 #include <spi_flash.h>
  27 #include <asm/errno.h>
  28 #include <linux/types.h>
  29 #include <malloc.h>
  30
  31 #include <imx_spi.h>
  32 #include <imx_spi_nor.h>
  33
  34 static u8 g_tx_buf[256];
  35 static u8 g_rx_buf[256];
  36
  37 #define WRITE_ENABLE(a)                  spi_nor_cmd_1byte(a, WREN)
  38 #define WRITE_DISABLE(a)                 spi_nor_cmd_1byte(a, WRDI)
  39 #define ENABLE_WRITE_STATUS(a)   spi_nor_cmd_1byte(a, EWSR)
  40
  41 struct imx_spi_flash_params {
  42         u8              idcode1;
  43         u32             block_size;
  44         u32             block_count;
  45         u32             device_size;
  46         const char      *name;
  47 };
  48
  49 struct imx_spi_flash {
  50         const struct imx_spi_flash_params *params;
  51         struct spi_flash flash;
  52 };
  53
  54 static inline struct imx_spi_flash *
  55 to_imx_spi_flash(struct spi_flash *flash)
  56 {
  57         return container_of(flash, struct imx_spi_flash, flash);
  58 }
  59
  60 static const struct imx_spi_flash_params imx_spi_flash_table[] = {
  61         {
  62                 .idcode1                = 0x25,
  63                 .block_size             = SZ_64K,
  64                 .block_count            = 32,
  65                 .device_size            = SZ_64K * 32,
  66                 .name                   = "SST25VF016B - 2MB",
  67         },
  68 };
  69
  70 static s32 spi_nor_flash_query(struct spi_flash *flash, void* data)
  71 {
  72         u8 au8Tmp[4] = { 0 };
  73         u8 *pData = (u8 *)data;
  74
  75         g_tx_buf[3] = JEDEC_ID;
  76
  77         if (spi_xfer(flash->spi, (4 << 3), g_tx_buf, au8Tmp,
  78                                 SPI_XFER_BEGIN | SPI_XFER_END)) {
  79                 return -1;
  80         }
  81
  82         printf("JEDEC ID: 0x%02x:0x%02x:0x%02x\n",
  83                         au8Tmp[2], au8Tmp[1], au8Tmp[0]);
  84
  85         pData[0] = au8Tmp[2];
  86         pData[1] = au8Tmp[1];
  87         pData[2] = au8Tmp[0];
  88
  89         return 0;
  90 }
  91
  92 static s32 spi_nor_cmd_1byte(struct spi_flash *flash, u8 cmd)
  93 {
  94         g_tx_buf[0] = cmd;
  95
  96         if (spi_xfer(flash->spi, (1 << 3), g_tx_buf, g_rx_buf,
  97                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
  98                 printf("Error: %s(): %d\n", __func__, __LINE__);
  99                 return -1;
 100         }
 101         return 0;
 102 }
 103
 104 static s32 spi_nor_status(struct spi_flash *flash)
 105 {
 106         g_tx_buf[1] = RDSR;
 107
 108         if (spi_xfer(flash->spi, 2 << 3, g_tx_buf, g_rx_buf,
 109                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 110                 printf("Error: %s(): %d\n", __func__, __LINE__);
 111                 return 0;
 112         }
 113         return g_rx_buf[0];
 114 }
 115
 116 static int spi_nor_program_1byte(struct spi_flash *flash,
 117                 u8 data, void *addr)
 118 {
 119         u32 addr_val = (u32)addr;
 120
 121         /* need to do write-enable command */
 122         if (WRITE_ENABLE(flash) != 0) {
 123                 printf("Error : %d\n", __LINE__);
 124                 return -1;
 125         }
 126         g_tx_buf[0] = BYTE_PROG; /* need to skip bytes 1, 2, 3 */
 127         g_tx_buf[4] = data;
 128         g_tx_buf[5] = addr_val & 0xFF;
 129         g_tx_buf[6] = (addr_val >> 8) & 0xFF;
 130         g_tx_buf[7] = (addr_val >> 16) & 0xFF;
 131
 132         debug("0x%x: 0x%x\n", *(u32 *)g_tx_buf, *(u32 *)(g_tx_buf + 4));
 133         debug("addr=0x%x\n", addr_val);
 134
 135         if (spi_xfer(flash->spi, 5 << 3, g_tx_buf, g_rx_buf,
 136                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 137                 printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
 138                 return -1;
 139         }
 140
 141         while (spi_nor_status(flash) & RDSR_BUSY)
 142                 ;
 143
 144         return 0;
 145 }
 146
 147 /*!
 148  * Write 'val' to flash WRSR (write status register)
 149  */
 150 static int spi_nor_write_status(struct spi_flash *flash, u8 val)
 151 {
 152         g_tx_buf[0] = val;
 153         g_tx_buf[1] = WRSR;
 154
 155         if (spi_xfer(flash->spi, 2 << 3, g_tx_buf, g_rx_buf,
 156                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 157                 printf("Error: %s(): %d\n", __func__, __LINE__);
 158                 return -1;
 159         }
 160         return 0;
 161 }
 162
 163 /*!
 164  * Erase a block_size data from block_addr offset in the flash
 165  */
 166 static int spi_nor_erase_block(struct spi_flash *flash,
 167                                 void *block_addr, u32 block_size)
 168 {
 169         u32 *cmd = (u32 *)g_tx_buf;
 170         u32 addr = (u32) block_addr;
 171
 172         if (block_size != SZ_64K &&
 173                 block_size != SZ_32K &&
 174                 block_size != SZ_4K) {
 175                 printf("Error - block_size is not "
 176                                 "4kB, 32kB or 64kB: 0x%x\n",
 177                                 block_size);
 178                 return -1;
 179         }
 180
 181         if ((addr & (block_size - 1)) != 0) {
 182                 printf("Error - block_addr is not "
 183                                 "4kB, 32kB or 64kB aligned: %p\n",
 184                                 block_addr);
 185                 return -1;
 186         }
 187
 188         if (ENABLE_WRITE_STATUS(flash) != 0 ||
 189                         spi_nor_write_status(flash, 0) != 0) {
 190                 printf("Error: %s: %d\n", __func__, __LINE__);
 191                 return -1;
 192         }
 193
 194         /* need to do write-enable command */
 195         if (WRITE_ENABLE(flash) != 0) {
 196                 printf("Error : %d\n", __LINE__);
 197                 return -1;
 198         }
 199
 200         if (block_size == SZ_64K)
 201                 *cmd = (ERASE_64K << 24) | (addr & 0x00FFFFFF);
 202         else if (block_size == SZ_32K)
 203                 *cmd = (ERASE_32K << 24) | (addr & 0x00FFFFFF);
 204         else if (block_size == SZ_4K)
 205                 *cmd = (ERASE_4K << 24) | (addr & 0x00FFFFFF);
 206
 207         /* now do the block erase */
 208         if (spi_xfer(flash->spi, 4 << 3, g_tx_buf, g_rx_buf,
 209                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 210                 return -1;
 211         }
 212
 213         while (spi_nor_status(flash) & RDSR_BUSY)
 214                 ;
 215
 216         return 0;
 217 }
 218
 219 static int spi_nor_flash_read(struct spi_flash *flash, u32 offset,
 220                 size_t len, void *buf)
 221 {
 222         struct imx_spi_flash *imx_sf = to_imx_spi_flash(flash);
 223         u32 *cmd = (u32 *)g_tx_buf;
 224         u32 max_rx_sz = (MAX_SPI_BYTES) - 4;
 225         u8 *d_buf = (u8 *)buf;
 226         u8 *s_buf;
 227         s32 s32remain_size = len;
 228         int i;
 229
 230         if (!(flash->spi))
 231                 return -1;
 232
 233         printf("Reading SPI NOR flash 0x%x [0x%x bytes] -> ram 0x%p\n",
 234                 offset, len, buf);
 235         debug("%s(from flash=0x%08x to ram=%p len=0x%x)\n",
 236                 __func__,
 237                 offset, buf, len);
 238
 239         if (len == 0)
 240                 return 0;
 241
 242         *cmd = (READ << 24) | ((u32)offset & 0x00FFFFFF);
 243
 244         for (; s32remain_size > 0; s32remain_size -= max_rx_sz, *cmd += max_rx_sz) {
 245                 debug("Addr:0x%p=>Offset:0x%08x, %d bytes transferred\n",
 246                                 d_buf,
 247                                 (*cmd & 0x00FFFFFF),
 248                                 (len - s32remain_size));
 249                 debug("%d%% completed\n", ((len - s32remain_size) * 100 / len));
 250
 251                 if (s32remain_size < max_rx_sz) {
 252                         debug("100%% completed\n");
 253
 254                         if (spi_xfer(flash->spi, (s32remain_size + 4) << 3,
 255                                 g_tx_buf, g_rx_buf,
 256                                 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 257                                 printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
 258                                 return -1;
 259                         }
 260                         /* throw away 4 bytes (5th received bytes is real) */
 261                         s_buf = g_rx_buf + 4;
 262
 263                         /* now adjust the endianness */
 264                         for (i = s32remain_size; i >= 0; i -= 4, s_buf += 4) {
 265                                 if (i < 4) {
 266                                         if (i == 1) {
 267                                                 *d_buf = s_buf[0];
 268                                         } else if (i == 2) {
 269                                                 *d_buf++ = s_buf[1];
 270                                                 *d_buf++ = s_buf[0];
 271                                         } else if (i == 3) {
 272                                                 *d_buf++ = s_buf[2];
 273                                                 *d_buf++ = s_buf[1];
 274                                                 *d_buf++ = s_buf[0];
 275                                         }
 276                                         printf("SUCCESS\n\n");
 277                                         return 0;
 278                                 }
 279                                 /* copy 4 bytes */
 280                                 *d_buf++ = s_buf[3];
 281                                 *d_buf++ = s_buf[2];
 282                                 *d_buf++ = s_buf[1];
 283                                 *d_buf++ = s_buf[0];
 284                         }
 285                 }
 286
 287                 /* now grab max_rx_sz data (+4 is
 288                 *needed due to 4-throw away bytes */
 289                 if (spi_xfer(flash->spi, (max_rx_sz + 4) << 3,
 290                         g_tx_buf, g_rx_buf, SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 291                         printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
 292                         return -1;
 293                 }
 294                 /* throw away 4 bytes (5th received bytes is real) */
 295                 s_buf = g_rx_buf + 4;
 296                 /* now adjust the endianness */
 297                 for (i = 0; i < max_rx_sz; i += 4, s_buf += 4) {
 298                         *d_buf++ = s_buf[3];
 299                         *d_buf++ = s_buf[2];
 300                         *d_buf++ = s_buf[1];
 301                         *d_buf++ = s_buf[0];
 302                 }
 303
 304                 if ((s32remain_size % imx_sf->params->block_size) == 0)
 305                         printf(".");
 306         }
 307         printf("SUCCESS\n\n");
 308
 309         return -1;
 310 }
 311
 312 static int spi_nor_flash_write(struct spi_flash *flash, u32 offset,
 313                 size_t len, const void *buf)
 314 {
 315         struct imx_spi_flash *imx_sf = to_imx_spi_flash(flash);
 316         u32 d_addr = offset;
 317         u8 *s_buf = (u8 *)buf;
 318         s32 s32remain_size = len;
 319
 320         if (!(flash->spi))
 321                 return -1;
 322
 323         if (len == 0)
 324                 return 0;
 325
 326         printf("Writing SPI NOR flash 0x%x [0x%x bytes] <- ram 0x%p\n",
 327                 offset, len, buf);
 328         debug("%s(flash addr=0x%08x, ram=%p, len=0x%x)\n",
 329                         __func__, offset, buf, len);
 330
 331         if (ENABLE_WRITE_STATUS(flash) != 0 ||
 332                         spi_nor_write_status(flash, 0) != 0) {
 333                 printf("Error: %s: %d\n", __func__, __LINE__);
 334                 return -1;
 335         }
 336
 337         if ((d_addr & 1) != 0) {
 338                 /* program 1st byte */
 339                 if (spi_nor_program_1byte(flash, s_buf[0],
 340                                         (void *)d_addr) != 0) {
 341                         printf("Error: %s(%d)\n", __func__, __LINE__);
 342                         return -1;
 343                 }
 344                 if (--s32remain_size == 0)
 345                         return 0;
 346                 d_addr++;
 347                 s_buf++;
 348         }
 349
 350         /* need to do write-enable command */
 351         if (WRITE_ENABLE(flash) != 0) {
 352                 printf("Error : %d\n", __LINE__);
 353                 return -1;
 354         }
 355
 356         /*
 357         These two bytes write will be copied to txfifo first with
 358         g_tx_buf[1] being shifted out and followed by g_tx_buf[0].
 359         The reason for this is we will specify burst len=6. So SPI will
 360         do this kind of data movement.
 361         */
 362         g_tx_buf[0] = d_addr >> 16;
 363         g_tx_buf[1] = AAI_PROG;    /* need to skip bytes 1, 2 */
 364         /* byte shifted order is: 7, 6, 5, 4 */
 365         g_tx_buf[4] = s_buf[1];
 366         g_tx_buf[5] = s_buf[0];
 367         g_tx_buf[6] = d_addr;
 368         g_tx_buf[7] = d_addr >> 8;
 369         if (spi_xfer(flash->spi, 6 << 3, g_tx_buf, g_rx_buf,
 370                         SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 371                 printf("Error: %s(%d): failed\n",
 372                                 __FILE__, __LINE__);
 373                 return -1;
 374         }
 375
 376         while (spi_nor_status(flash) & RDSR_BUSY)
 377                 ;
 378
 379         for (d_addr += 2, s_buf += 2, s32remain_size -= 2;
 380                 s32remain_size > 1;
 381                 d_addr += 2, s_buf += 2, s32remain_size -= 2) {
 382                 debug("%d%% transferred\n",
 383                         ((len - s32remain_size) * 100 / len));
 384                 /* byte shifted order is: 2,1,0 */
 385                 g_tx_buf[2] = AAI_PROG;
 386                 g_tx_buf[1] = s_buf[0];
 387                 g_tx_buf[0] = s_buf[1];
 388
 389                 if (spi_xfer(flash->spi, 3 << 3, g_tx_buf, g_rx_buf,
 390                                 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 391                         printf("Error: %s(%d): failed\n",
 392                                         __FILE__, __LINE__);
 393                         return -1;
 394                 }
 395
 396                 while (spi_nor_status(flash) & RDSR_BUSY)
 397                         ;
 398
 399                 if ((s32remain_size % imx_sf->params->block_size) == 0)
 400                         printf(".");
 401         }
 402         printf("SUCCESS\n\n");
 403         debug("100%% transferred\n");
 404
 405         WRITE_DISABLE(flash);
 406         while (spi_nor_status(flash) & RDSR_BUSY)
 407                 ;
 408
 409         if (WRITE_ENABLE(flash) != 0) {
 410                 printf("Error : %d\n", __LINE__);
 411                 return -1;
 412         }
 413
 414         if (len == 1) {
 415                 /* need to do write-enable command */
 416                 /* only 1 byte left */
 417                 if (spi_nor_program_1byte(flash, s_buf[0],
 418                                         (void *)d_addr) != 0) {
 419                         printf("Error: %s(%d)\n",
 420                                         __func__, __LINE__);
 421                         return -1;
 422                 }
 423         }
 424         return 0;
 425 }
 426
 427 static int spi_nor_flash_erase(struct spi_flash *flash, u32 offset,
 428                 size_t len)
 429 {
 430         s32 s32remain_size = len;
 431
 432         if (!(flash->spi))
 433                 return -1;
 434
 435         printf("Erasing SPI NOR flash 0x%x [0x%x bytes]\n",
 436                 offset, len);
 437
 438         if ((len % SZ_4K) != 0 || len == 0) {
 439                 printf("Error: size (0x%x) is not integer multiples of 4kB(0x1000)\n",
 440                         len);
 441                 return -1;
 442         }
 443         if ((offset & (SZ_4K - 1)) != 0) {
 444                 printf("Error - addr is not 4kB(0x1000) aligned: 0x%08x\n",
 445                         offset);
 446                 return -1;
 447         }
 448         for (; s32remain_size > 0; s32remain_size -= SZ_4K, offset += SZ_4K) {
 449                 debug("Erasing 0x%08x, %d%% erased\n",
 450                                 offset,
 451                                 ((len - s32remain_size) * 100 / len));
 452                 if (spi_nor_erase_block(flash,
 453                                 (void *)offset, SZ_4K) != 0) {
 454                         printf("Error: spi_nor_flash_erase(): %d\n", __LINE__);
 455                         return -1;
 456                 }
 457                 printf(".");
 458         }
 459         printf("SUCCESS\n\n");
 460         debug("100%% erased\n");
 461         return 0;
 462 }
 463
 464 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode)
 465 {
 466         struct spi_slave *spi = NULL;
 467         const struct imx_spi_flash_params *params = NULL;
 468         struct imx_spi_flash *imx_sf = NULL;
 469         u8  idcode[4] = { 0 };
 470         u32 i = 0;
 471         s32 ret = 0;
 472
 473         if (CONFIG_SPI_FLASH_CS != cs) {
 474                 printf("Invalid cs for SPI NOR.\n");
 475                 return NULL;
 476         }
 477
 478         spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
 479
 480         if (!spi) {
 481                 debug("SF: Failed to set up slave\n");
 482                 return NULL;
 483         }
 484
 485         ret = spi_claim_bus(spi);
 486         if (ret) {
 487                 debug("SF: Failed to claim SPI bus: %d\n", ret);
 488                 goto err_claim_bus;
 489         }
 490
 491         imx_sf = (struct imx_spi_flash *)malloc(sizeof(struct imx_spi_flash));
 492
 493         if (!imx_sf) {
 494                 debug("SF: Failed to allocate memory\n");
 495                 spi_free_slave(spi);
 496                 return NULL;
 497         }
 498
 499         imx_sf->flash.spi = spi;
 500
 501         /* Read the ID codes */
 502         ret = spi_nor_flash_query(&(imx_sf->flash), idcode);
 503         if (ret)
 504                 goto err_read_id;
 505
 506         for (i = 0; i < ARRAY_SIZE(imx_spi_flash_table); ++i) {
 507                 params = &imx_spi_flash_table[i];
 508                 if (params->idcode1 == idcode[1])
 509                         break;
 510         }
 511
 512         if (i == ARRAY_SIZE(imx_spi_flash_table)) {
 513                 debug("SF: Unsupported DataFlash ID %02x\n",
 514                                 idcode[1]);
 515
 516                 goto err_invalid_dev;
 517         }
 518
 519         imx_sf->params = params;
 520
 521         imx_sf->flash.name = params->name;
 522         imx_sf->flash.size = params->device_size;
 523
 524         imx_sf->flash.read  = spi_nor_flash_read;
 525         imx_sf->flash.write = spi_nor_flash_write;
 526         imx_sf->flash.erase = spi_nor_flash_erase;
 527
 528         debug("SF: Detected %s with block size %lu, "
 529                         "block count %lu, total %u bytes\n",
 530                         params->name,
 531                         params->block_size,
 532                         params->block_count,
 533                         params->device_size);
 534
 535         return &(imx_sf->flash);
 536
 537 err_read_id:
 538         spi_release_bus(spi);
 539 err_invalid_dev:
 540         if (imx_sf)
 541                 free(imx_sf);
 542 err_claim_bus:
 543         if (spi)
 544                 spi_free_slave(spi);
 545         return NULL;
 546 }
 547
 548 void spi_flash_free(struct spi_flash *flash)
 549 {
 550         struct imx_spi_flash *imx_sf = NULL;
 551
 552         if (!flash)
 553                 return;
 554
 555         imx_sf = to_imx_spi_flash(flash);
 556
 557         if (flash->spi) {
 558                 spi_free_slave(flash->spi);
 559                 flash->spi = NULL;
 560         }
 561
 562         free(imx_sf);
 563 }
 564