drivers/mtd/st_smi.c

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <flash.h>
  26 #include <linux/err.h>
  27 #include <linux/mtd/st_smi.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/arch/hardware.h>
  31
  32 #if !defined(CONFIG_SYS_NO_FLASH)
  33
  34 static struct smi_regs *const smicntl =
  35     (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
  36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
  37     CONFIG_SYS_FLASH_ADDR_BASE;
  38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  39
  40 /* data structure to maintain flash ids from different vendors */
  41 struct flash_device {
  42         char *name;
  43         u8 erase_cmd;
  44         u32 device_id;
  45         u32 pagesize;
  46         unsigned long sectorsize;
  47         unsigned long size_in_bytes;
  48 };
  49
  50 #define FLASH_ID(n, es, id, psize, ssize, size) \
  51 {                               \
  52         .name = n,              \
  53         .erase_cmd = es,        \
  54         .device_id = id,        \
  55         .pagesize = psize,      \
  56         .sectorsize = ssize,    \
  57         .size_in_bytes = size   \
  58 }
  59
  60 /*
  61  * List of supported flash devices.
  62  * Currently the erase_cmd field is not used in this driver.
  63  */
  64 static struct flash_device flash_devices[] = {
  65         FLASH_ID("st m25p16"     , 0xd8, 0x00152020, 0x100, 0x10000, 0x200000),
  66         FLASH_ID("st m25p32"     , 0xd8, 0x00162020, 0x100, 0x10000, 0x400000),
  67         FLASH_ID("st m25p64"     , 0xd8, 0x00172020, 0x100, 0x10000, 0x800000),
  68         FLASH_ID("st m25p128"    , 0xd8, 0x00182020, 0x100, 0x40000, 0x1000000),
  69         FLASH_ID("st m25p05"     , 0xd8, 0x00102020, 0x80 , 0x8000 , 0x10000),
  70         FLASH_ID("st m25p10"     , 0xd8, 0x00112020, 0x80 , 0x8000 , 0x20000),
  71         FLASH_ID("st m25p20"     , 0xd8, 0x00122020, 0x100, 0x10000, 0x40000),
  72         FLASH_ID("st m25p40"     , 0xd8, 0x00132020, 0x100, 0x10000, 0x80000),
  73         FLASH_ID("st m25p80"     , 0xd8, 0x00142020, 0x100, 0x10000, 0x100000),
  74         FLASH_ID("st m45pe10"    , 0xd8, 0x00114020, 0x100, 0x10000, 0x20000),
  75         FLASH_ID("st m45pe20"    , 0xd8, 0x00124020, 0x100, 0x10000, 0x40000),
  76         FLASH_ID("st m45pe40"    , 0xd8, 0x00134020, 0x100, 0x10000, 0x80000),
  77         FLASH_ID("st m45pe80"    , 0xd8, 0x00144020, 0x100, 0x10000, 0x100000),
  78         FLASH_ID("sp s25fl004"   , 0xd8, 0x00120201, 0x100, 0x10000, 0x80000),
  79         FLASH_ID("sp s25fl008"   , 0xd8, 0x00130201, 0x100, 0x10000, 0x100000),
  80         FLASH_ID("sp s25fl016"   , 0xd8, 0x00140201, 0x100, 0x10000, 0x200000),
  81         FLASH_ID("sp s25fl032"   , 0xd8, 0x00150201, 0x100, 0x10000, 0x400000),
  82         FLASH_ID("sp s25fl064"   , 0xd8, 0x00160201, 0x100, 0x10000, 0x800000),
  83         FLASH_ID("mac 25l512"    , 0xd8, 0x001020C2, 0x010, 0x10000, 0x10000),
  84         FLASH_ID("mac 25l1005"   , 0xd8, 0x001120C2, 0x010, 0x10000, 0x20000),
  85         FLASH_ID("mac 25l2005"   , 0xd8, 0x001220C2, 0x010, 0x10000, 0x40000),
  86         FLASH_ID("mac 25l4005"   , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
  87         FLASH_ID("mac 25l4005a"  , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
  88         FLASH_ID("mac 25l8005"   , 0xd8, 0x001420C2, 0x010, 0x10000, 0x100000),
  89         FLASH_ID("mac 25l1605"   , 0xd8, 0x001520C2, 0x100, 0x10000, 0x200000),
  90         FLASH_ID("mac 25l1605a"  , 0xd8, 0x001520C2, 0x010, 0x10000, 0x200000),
  91         FLASH_ID("mac 25l3205"   , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
  92         FLASH_ID("mac 25l3205a"  , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
  93         FLASH_ID("mac 25l6405"   , 0xd8, 0x001720C2, 0x100, 0x10000, 0x800000),
  94         FLASH_ID("wbd w25q128" , 0xd8, 0x001840EF, 0x100, 0x10000, 0x1000000),
  95 };
  96
  97 /*
  98  * smi_wait_xfer_finish - Wait until TFF is set in status register
  99  * @timeout:     timeout in milliseconds
 100  *
 101  * Wait until TFF is set in status register
 102  */
 103 static int smi_wait_xfer_finish(int timeout)
 104 {
 105         ulong start = get_timer(0);
 106
 107         while (get_timer(start) < timeout) {
 108                 if (readl(&smicntl->smi_sr) & TFF)
 109                         return 0;
 110
 111                 /* Try after 10 ms */
 112                 udelay(10);
 113         };
 114
 115         return -1;
 116 }
 117
 118 /*
 119  * smi_read_id - Read flash id
 120  * @info:        flash_info structure pointer
 121  * @banknum:     bank number
 122  *
 123  * Read the flash id present at bank #banknum
 124  */
 125 static unsigned int smi_read_id(flash_info_t *info, int banknum)
 126 {
 127         unsigned int value;
 128
 129         writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
 130         writel(READ_ID, &smicntl->smi_tr);
 131         writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
 132                &smicntl->smi_cr2);
 133
 134         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 135                 return -EIO;
 136
 137         value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
 138
 139         writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
 140         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
 141
 142         return value;
 143 }
 144
 145 /*
 146  * flash_get_size - Detect the SMI flash by reading the ID.
 147  * @base:        Base address of the flash area bank #banknum
 148  * @banknum:     Bank number
 149  *
 150  * Detect the SMI flash by reading the ID. Initializes the flash_info structure
 151  * with size, sector count etc.
 152  */
 153 static ulong flash_get_size(ulong base, int banknum)
 154 {
 155         flash_info_t *info = &flash_info[banknum];
 156         int value;
 157         int i;
 158
 159         value = smi_read_id(info, banknum);
 160
 161         if (value < 0) {
 162                 printf("Flash id could not be read\n");
 163                 return 0;
 164         }
 165
 166         /* Matches chip-id to entire list of 'serial-nor flash' ids */
 167         for (i = 0; i < ARRAY_SIZE(flash_devices); i++) {
 168                 if (flash_devices[i].device_id == value) {
 169                         info->size = flash_devices[i].size_in_bytes;
 170                         info->flash_id = value;
 171                         info->start[0] = base;
 172                         info->sector_count =
 173                                         info->size/flash_devices[i].sectorsize;
 174
 175                         return info->size;
 176                 }
 177         }
 178
 179         return 0;
 180 }
 181
 182 /*
 183  * smi_read_sr - Read status register of SMI
 184  * @bank:        bank number
 185  *
 186  * This routine will get the status register of the flash chip present at the
 187  * given bank
 188  */
 189 static int smi_read_sr(int bank)
 190 {
 191         u32 ctrlreg1, val;
 192
 193         /* store the CTRL REG1 state */
 194         ctrlreg1 = readl(&smicntl->smi_cr1);
 195
 196         /* Program SMI in HW Mode */
 197         writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
 198                &smicntl->smi_cr1);
 199
 200         /* Performing a RSR instruction in HW mode */
 201         writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
 202
 203         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 204                 return -1;
 205
 206         val = readl(&smicntl->smi_sr);
 207
 208         /* Restore the CTRL REG1 state */
 209         writel(ctrlreg1, &smicntl->smi_cr1);
 210
 211         return val;
 212 }
 213
 214 /*
 215  * smi_wait_till_ready - Wait till last operation is over.
 216  * @bank:        bank number shifted.
 217  * @timeout:     timeout in milliseconds.
 218  *
 219  * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
 220  * The routine checks for #timeout loops, each at interval of 1 milli-second.
 221  * If successful the routine returns 0.
 222  */
 223 static int smi_wait_till_ready(int bank, int timeout)
 224 {
 225         int sr;
 226         ulong start = get_timer(0);
 227
 228         /* One chip guarantees max 5 msec wait here after page writes,
 229            but potentially three seconds (!) after page erase. */
 230         while (get_timer(start) < timeout) {
 231                 sr = smi_read_sr(bank);
 232                 if ((sr >= 0) && (!(sr & WIP_BIT)))
 233                         return 0;
 234
 235                 /* Try again after 10 usec */
 236                 udelay(10);
 237         } while (timeout--);
 238
 239         printf("SMI controller is still in wait, timeout=%d\n", timeout);
 240         return -EIO;
 241 }
 242
 243 /*
 244  * smi_write_enable - Enable the flash to do write operation
 245  * @bank:        bank number
 246  *
 247  * Set write enable latch with Write Enable command.
 248  * Returns negative if error occurred.
 249  */
 250 static int smi_write_enable(int bank)
 251 {
 252         u32 ctrlreg1;
 253         u32 start;
 254         int timeout = WMODE_TOUT;
 255         int sr;
 256
 257         /* Store the CTRL REG1 state */
 258         ctrlreg1 = readl(&smicntl->smi_cr1);
 259
 260         /* Program SMI in H/W Mode */
 261         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
 262
 263         /* Give the Flash, Write Enable command */
 264         writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
 265
 266         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 267                 return -1;
 268
 269         /* Restore the CTRL REG1 state */
 270         writel(ctrlreg1, &smicntl->smi_cr1);
 271
 272         start = get_timer(0);
 273         while (get_timer(start) < timeout) {
 274                 sr = smi_read_sr(bank);
 275                 if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT))))
 276                         return 0;
 277
 278                 /* Try again after 10 usec */
 279                 udelay(10);
 280         };
 281
 282         return -1;
 283 }
 284
 285 /*
 286  * smi_init - SMI initialization routine
 287  *
 288  * SMI initialization routine. Sets SMI control register1.
 289  */
 290 void smi_init(void)
 291 {
 292         /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
 293         writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
 294                &smicntl->smi_cr1);
 295 }
 296
 297 /*
 298  * smi_sector_erase - Erase flash sector
 299  * @info:        flash_info structure pointer
 300  * @sector:      sector number
 301  *
 302  * Set write enable latch with Write Enable command.
 303  * Returns negative if error occurred.
 304  */
 305 static int smi_sector_erase(flash_info_t *info, unsigned int sector)
 306 {
 307         int bank;
 308         unsigned int sect_add;
 309         unsigned int instruction;
 310
 311         switch (info->start[0]) {
 312         case SMIBANK0_BASE:
 313                 bank = BANK0;
 314                 break;
 315         case SMIBANK1_BASE:
 316                 bank = BANK1;
 317                 break;
 318         case SMIBANK2_BASE:
 319                 bank = BANK2;
 320                 break;
 321         case SMIBANK3_BASE:
 322                 bank = BANK3;
 323                 break;
 324         default:
 325                 return -1;
 326         }
 327
 328         sect_add = sector * (info->size / info->sector_count);
 329         instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
 330
 331         writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
 332
 333         /* Wait until finished previous write command. */
 334         if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
 335                 return -EBUSY;
 336
 337         /* Send write enable, before erase commands. */
 338         if (smi_write_enable(bank))
 339                 return -EIO;
 340
 341         /* Put SMI in SW mode */
 342         writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
 343
 344         /* Send Sector Erase command in SW Mode */
 345         writel(instruction, &smicntl->smi_tr);
 346         writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
 347                        &smicntl->smi_cr2);
 348         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 349                 return -EIO;
 350
 351         if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
 352                 return -EBUSY;
 353
 354         /* Put SMI in HW mode */
 355         writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
 356                        &smicntl->smi_cr1);
 357
 358         return 0;
 359 }
 360
 361 /*
 362  * smi_write - Write to SMI flash
 363  * @src_addr:    source buffer
 364  * @dst_addr:    destination buffer
 365  * @length:      length to write in bytes
 366  * @bank:        bank base address
 367  *
 368  * Write to SMI flash
 369  */
 370 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
 371                      unsigned int length, ulong bank_addr)
 372 {
 373         u8 *src_addr8 = (u8 *)src_addr;
 374         u8 *dst_addr8 = (u8 *)dst_addr;
 375         int banknum;
 376         int i;
 377
 378         switch (bank_addr) {
 379         case SMIBANK0_BASE:
 380                 banknum = BANK0;
 381                 break;
 382         case SMIBANK1_BASE:
 383                 banknum = BANK1;
 384                 break;
 385         case SMIBANK2_BASE:
 386                 banknum = BANK2;
 387                 break;
 388         case SMIBANK3_BASE:
 389                 banknum = BANK3;
 390                 break;
 391         default:
 392                 return -1;
 393         }
 394
 395         if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
 396                 return -EBUSY;
 397
 398         /* Set SMI in Hardware Mode */
 399         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
 400
 401         if (smi_write_enable(banknum))
 402                 return -EIO;
 403
 404         /* Perform the write command */
 405         for (i = 0; i < length; i += 4) {
 406                 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
 407                         if (smi_wait_till_ready(banknum,
 408                                                 CONFIG_SYS_FLASH_WRITE_TOUT))
 409                                 return -EBUSY;
 410
 411                         if (smi_write_enable(banknum))
 412                                 return -EIO;
 413                 }
 414
 415                 if (length < 4) {
 416                         int k;
 417
 418                         /*
 419                          * Handle special case, where length < 4 (redundant env)
 420                          */
 421                         for (k = 0; k < length; k++)
 422                                 *dst_addr8++ = *src_addr8++;
 423                 } else {
 424                         /* Normal 32bit write */
 425                         *dst_addr++ = *src_addr++;
 426                 }
 427
 428                 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
 429                         return -EIO;
 430         }
 431
 432         if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
 433                 return -EBUSY;
 434
 435         writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
 436
 437         return 0;
 438 }
 439
 440 /*
 441  * write_buff - Write to SMI flash
 442  * @info:        flash info structure
 443  * @src:         source buffer
 444  * @dest_addr:   destination buffer
 445  * @length:      length to write in words
 446  *
 447  * Write to SMI flash
 448  */
 449 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
 450 {
 451         return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
 452                          length, info->start[0]);
 453 }
 454
 455 /*
 456  * flash_init - SMI flash initialization
 457  *
 458  * SMI flash initialization
 459  */
 460 unsigned long flash_init(void)
 461 {
 462         unsigned long size = 0;
 463         int i, j;
 464
 465         smi_init();
 466
 467         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 468                 flash_info[i].flash_id = FLASH_UNKNOWN;
 469                 size += flash_info[i].size = flash_get_size(bank_base[i], i);
 470         }
 471
 472         for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
 473                 for (i = 1; i < flash_info[j].sector_count; i++)
 474                         flash_info[j].start[i] =
 475                             flash_info[j].start[i - 1] +
 476                             flash_info->size / flash_info->sector_count;
 477
 478         }
 479
 480         return size;
 481 }
 482
 483 /*
 484  * flash_print_info - Print SMI flash information
 485  *
 486  * Print SMI flash information
 487  */
 488 void flash_print_info(flash_info_t *info)
 489 {
 490         int i;
 491         if (info->flash_id == FLASH_UNKNOWN) {
 492                 puts("missing or unknown FLASH type\n");
 493                 return;
 494         }
 495
 496         if (info->size >= 0x100000)
 497                 printf("  Size: %ld MB in %d Sectors\n",
 498                        info->size >> 20, info->sector_count);
 499         else
 500                 printf("  Size: %ld KB in %d Sectors\n",
 501                        info->size >> 10, info->sector_count);
 502
 503         puts("  Sector Start Addresses:");
 504         for (i = 0; i < info->sector_count; ++i) {
 505 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
 506                 int size;
 507                 int erased;
 508                 u32 *flash;
 509
 510                 /*
 511                  * Check if whole sector is erased
 512                  */
 513                 size = (info->size) / (info->sector_count);
 514                 flash = (u32 *) info->start[i];
 515                 size = size / sizeof(int);
 516
 517                 while ((size--) && (*flash++ == ~0))
 518                         ;
 519
 520                 size++;
 521                 if (size)
 522                         erased = 0;
 523                 else
 524                         erased = 1;
 525
 526                 if ((i % 5) == 0)
 527                         printf("\n");
 528
 529                 printf(" %08lX%s%s",
 530                        info->start[i],
 531                        erased ? " E" : "  ", info->protect[i] ? "RO " : "   ");
 532 #else
 533                 if ((i % 5) == 0)
 534                         printf("\n   ");
 535                 printf(" %08lX%s",
 536                        info->start[i], info->protect[i] ? " (RO)  " : "     ");
 537 #endif
 538         }
 539         putc('\n');
 540         return;
 541 }
 542
 543 /*
 544  * flash_erase - Erase SMI flash
 545  *
 546  * Erase SMI flash
 547  */
 548 int flash_erase(flash_info_t *info, int s_first, int s_last)
 549 {
 550         int rcode = 0;
 551         int prot = 0;
 552         flash_sect_t sect;
 553
 554         if ((s_first < 0) || (s_first > s_last)) {
 555                 puts("- no sectors to erase\n");
 556                 return 1;
 557         }
 558
 559         for (sect = s_first; sect <= s_last; ++sect) {
 560                 if (info->protect[sect])
 561                         prot++;
 562         }
 563         if (prot) {
 564                 printf("- Warning: %d protected sectors will not be erased!\n",
 565                        prot);
 566         } else {
 567                 putc('\n');
 568         }
 569
 570         for (sect = s_first; sect <= s_last; sect++) {
 571                 if (info->protect[sect] == 0) {
 572                         if (smi_sector_erase(info, sect))
 573                                 rcode = 1;
 574                         else
 575                                 putc('.');
 576                 }
 577         }
 578         puts(" done\n");
 579         return rcode;
 580 }
 581 #endif