drivers/net/npe/include/IxOsalMemAccess.h

   1 /**
   2  * @file IxOsalMemAccess.h
   3  *
   4  * @brief Header file for memory access
   5  *
   6  * @par
   7  * @version $Revision: 1.0 $
   8  *
   9  * @par
  10  * IXP400 SW Release version 2.0
  11  *
  12  * -- Copyright Notice --
  13  *
  14  * @par
  15  * Copyright 2001-2005, Intel Corporation.
  16  * All rights reserved.
  17  *
  18  * @par
  19  * SPDX-License-Identifier:     BSD-3-Clause
  20  * @par
  21  * -- End of Copyright Notice --
  22  */
  23
  24 #ifndef IxOsalMemAccess_H
  25 #define IxOsalMemAccess_H
  26
  27
  28 /* Global BE switch
  29  *
  30  *  Should be set only in BE mode and only if the component uses I/O memory.
  31  */
  32
  33 #if defined (__BIG_ENDIAN)
  34
  35 #define IX_OSAL_BE_MAPPING
  36
  37 #endif /* Global switch */
  38
  39
  40 /* By default only static memory maps in use;
  41    define IX_OSAL_DYNAMIC_MEMORY_MAP per component if dynamic maps are
  42    used instead in that component */
  43 #define IX_OSAL_STATIC_MEMORY_MAP
  44
  45
  46 /*
  47  * SDRAM coherency mode
  48  * Must be defined to BE, LE_DATA_COHERENT or LE_ADDRESS_COHERENT.
  49  * The mode changes depending on OS
  50  */
  51 #if defined (IX_OSAL_LINUX_BE) || defined (IX_OSAL_VXWORKS_BE)
  52
  53 #define IX_SDRAM_BE
  54
  55 #elif defined (IX_OSAL_VXWORKS_LE)
  56
  57 #define IX_SDRAM_LE_DATA_COHERENT
  58
  59 #elif defined (IX_OSAL_LINUX_LE)
  60
  61 #define IX_SDRAM_LE_DATA_COHERENT
  62
  63 #elif defined (IX_OSAL_WINCE_LE)
  64
  65 #define IX_SDRAM_LE_DATA_COHERENT
  66
  67 #elif defined (IX_OSAL_EBOOT_LE)
  68
  69 #define IX_SDRAM_LE_ADDRESS_COHERENT
  70
  71 #endif
  72
  73
  74
  75
  76 /**************************************
  77  * Retrieve current component mapping *
  78  **************************************/
  79
  80 /*
  81  * Only use customized mapping for LE.
  82  *
  83  */
  84 #if defined (IX_OSAL_VXWORKS_LE) || defined (IX_OSAL_LINUX_LE) || defined (IX_OSAL_WINCE_LE) || defined (IX_OSAL_EBOOT_LE)
  85
  86 #include "IxOsalOsIxp400CustomizedMapping.h"
  87
  88 #endif
  89
  90
  91 /*******************************************************************
  92  * Turn off IX_STATIC_MEMORY map for components using dynamic maps *
  93  *******************************************************************/
  94 #ifdef IX_OSAL_DYNAMIC_MEMORY_MAP
  95
  96 #undef IX_OSAL_STATIC_MEMORY_MAP
  97
  98 #endif
  99
 100
 101 /************************************************************
 102  * Turn off BE access for components using LE or no mapping *
 103  ************************************************************/
 104
 105 #if ( defined (IX_OSAL_LE_AC_MAPPING) || defined (IX_OSAL_LE_DC_MAPPING) || defined (IX_OSAL_NO_MAPPING) )
 106
 107 #undef IX_OSAL_BE_MAPPING
 108
 109 #endif
 110
 111
 112 /*****************
 113  * Safety checks *
 114  *****************/
 115
 116 /* Default to no_mapping */
 117 #if !defined (IX_OSAL_BE_MAPPING) && !defined (IX_OSAL_LE_AC_MAPPING) && !defined (IX_OSAL_LE_DC_MAPPING) && !defined (IX_OSAL_NO_MAPPING)
 118
 119 #define IX_OSAL_NO_MAPPING
 120
 121 #endif /* check at least one mapping */
 122
 123 /* No more than one mapping can be defined for a component */
 124 #if   (defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_LE_AC_MAPPING))  \
 125     ||(defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_LE_DC_MAPPING))  \
 126     ||(defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_NO_MAPPING))     \
 127     ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_NO_MAPPING))     \
 128     ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_LE_AC_MAPPING))      \
 129     ||(defined (IX_OSAL_LE_AC_MAPPING) && defined (IX_OSAL_NO_MAPPING))
 130
 131
 132 #ifdef IX_OSAL_BE_MAPPING
 133 #warning IX_OSAL_BE_MAPPING is defined
 134 #endif
 135
 136 #ifdef IX_OSAL_LE_AC_MAPPING
 137 #warning IX_OSAL_LE_AC_MAPPING is defined
 138 #endif
 139
 140 #ifdef IX_OSAL_LE_DC_MAPPING
 141 #warning IX_OSAL_LE_DC_MAPPING is defined
 142 #endif
 143
 144 #ifdef IX_OSAL_NO_MAPPING
 145 #warning IX_OSAL_NO_MAPPING is defined
 146 #endif
 147
 148 #error More than one I/O mapping is defined, please check your component mapping
 149
 150 #endif /* check at most one mapping */
 151
 152
 153 /* Now set IX_OSAL_COMPONENT_MAPPING */
 154
 155 #ifdef IX_OSAL_BE_MAPPING
 156 #define IX_OSAL_COMPONENT_MAPPING IX_OSAL_BE
 157 #endif
 158
 159 #ifdef IX_OSAL_LE_AC_MAPPING
 160 #define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_AC
 161 #endif
 162
 163 #ifdef IX_OSAL_LE_DC_MAPPING
 164 #define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_DC
 165 #endif
 166
 167 #ifdef IX_OSAL_NO_MAPPING
 168 #define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE
 169 #endif
 170
 171
 172 /* SDRAM coherency should be defined */
 173 #if !defined (IX_SDRAM_BE) && !defined (IX_SDRAM_LE_DATA_COHERENT) && !defined (IX_SDRAM_LE_ADDRESS_COHERENT)
 174
 175 #error SDRAM coherency must be defined
 176
 177 #endif /* SDRAM coherency must be defined */
 178
 179 /* SDRAM coherency cannot be defined in several ways */
 180 #if (defined (IX_SDRAM_BE) && (defined (IX_SDRAM_LE_DATA_COHERENT) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
 181     || (defined (IX_SDRAM_LE_DATA_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
 182     || (defined (IX_SDRAM_LE_ADDRESS_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_DATA_COHERENT)))
 183
 184 #error SDRAM coherency cannot be defined in more than one way
 185
 186 #endif /* SDRAM coherency must be defined exactly once */
 187
 188
 189 /*********************
 190  * Read/write macros *
 191  *********************/
 192
 193 /* WARNING - except for addition of special cookie read/write macros (see below)
 194              these macros are NOT user serviceable. Please do not modify */
 195
 196 #define IX_OSAL_READ_LONG_RAW(wAddr)          (*(wAddr))
 197 #define IX_OSAL_READ_SHORT_RAW(sAddr)         (*(sAddr))
 198 #define IX_OSAL_READ_BYTE_RAW(bAddr)          (*(bAddr))
 199 #define IX_OSAL_WRITE_LONG_RAW(wAddr, wData)  (*(wAddr) = (wData))
 200 #define IX_OSAL_WRITE_SHORT_RAW(sAddr,sData)  (*(sAddr) = (sData))
 201 #define IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)  (*(bAddr) = (bData))
 202
 203 #ifdef __linux
 204
 205 /* Linux - specific cookie reads/writes.
 206   Redefine per OS if dynamic memory maps are used
 207   and I/O memory is accessed via functions instead of raw pointer access. */
 208
 209 #define IX_OSAL_READ_LONG_COOKIE(wCookie)           (readl((UINT32) (wCookie) ))
 210 #define IX_OSAL_READ_SHORT_COOKIE(sCookie)          (readw((UINT32) (sCookie) ))
 211 #define IX_OSAL_READ_BYTE_COOKIE(bCookie)           (readb((UINT32) (bCookie) ))
 212 #define IX_OSAL_WRITE_LONG_COOKIE(wCookie, wData)   (writel(wData, (UINT32) (wCookie) ))
 213 #define IX_OSAL_WRITE_SHORT_COOKIE(sCookie, sData)  (writew(sData, (UINT32) (sCookie) ))
 214 #define IX_OSAL_WRITE_BYTE_COOKIE(bCookie, bData)   (writeb(bData, (UINT32) (bCookie) ))
 215
 216 #endif /* linux */
 217
 218 #ifdef __wince
 219
 220 /* WinCE - specific cookie reads/writes. */
 221
 222 static __inline__ UINT32
 223 ixOsalWinCEReadLCookie (volatile UINT32 * lCookie)
 224 {
 225     return *lCookie;
 226 }
 227
 228 static __inline__ UINT16
 229 ixOsalWinCEReadWCookie (volatile UINT16 * wCookie)
 230 {
 231 #if 0
 232     UINT32 auxVal = *((volatile UINT32 *) wCookie);
 233     if ((unsigned) wCookie & 3)
 234         return (UINT16) (auxVal >> 16);
 235     else
 236         return (UINT16) (auxVal & 0xffff);
 237 #else
 238     return *wCookie;
 239 #endif
 240 }
 241
 242 static __inline__ UINT8
 243 ixOsalWinCEReadBCookie (volatile UINT8 * bCookie)
 244 {
 245 #if 0
 246     UINT32 auxVal = *((volatile UINT32 *) bCookie);
 247     return (UINT8) ((auxVal >> (3 - (((unsigned) bCookie & 3) << 3)) & 0xff));
 248 #else
 249     return *bCookie;
 250 #endif
 251 }
 252
 253 static __inline__ void
 254 ixOsalWinCEWriteLCookie (volatile UINT32 * lCookie, UINT32 lVal)
 255 {
 256     *lCookie = lVal;
 257 }
 258
 259 static __inline__ void
 260 ixOsalWinCEWriteWCookie (volatile UINT16 * wCookie, UINT16 wVal)
 261 {
 262 #if 0
 263     volatile UINT32 *auxCookie =
 264         (volatile UINT32 *) ((unsigned) wCookie & ~3);
 265     if ((unsigned) wCookie & 3)
 266     {
 267         *auxCookie &= 0xffff;
 268         *auxCookie |= (UINT32) wVal << 16;
 269     }
 270     else
 271     {
 272         *auxCookie &= ~0xffff;
 273         *auxCookie |= (UINT32) wVal & 0xffff;
 274     }
 275 #else
 276     *wCookie = wVal;
 277 #endif
 278 }
 279
 280 static __inline__ void
 281 ixOsalWinCEWriteBCookie (volatile UINT8 * bCookie, UINT8 bVal)
 282 {
 283 #if 0
 284     volatile UINT32 *auxCookie =
 285         (volatile UINT32 *) ((unsigned) bCookie & ~3);
 286     *auxCookie &= 0xff << (3 - (((unsigned) bCookie & 3) << 3));
 287     *auxCookie |= (UINT32) bVal << (3 - (((unsigned) bCookie & 3) << 3));
 288 #else
 289     *bCookie = bVal;
 290 #endif
 291 }
 292
 293
 294 #define IX_OSAL_READ_LONG_COOKIE(wCookie)           (ixOsalWinCEReadLCookie(wCookie))
 295 #define IX_OSAL_READ_SHORT_COOKIE(sCookie)          (ixOsalWinCEReadWCookie(sCookie))
 296 #define IX_OSAL_READ_BYTE_COOKIE(bCookie)           (ixOsalWinCEReadBCookie(bCookie))
 297 #define IX_OSAL_WRITE_LONG_COOKIE(wCookie, wData)   (ixOsalWinCEWriteLCookie(wCookie, wData))
 298 #define IX_OSAL_WRITE_SHORT_COOKIE(sCookie, sData)  (ixOsalWinCEWriteWCookie(sCookie, sData))
 299 #define IX_OSAL_WRITE_BYTE_COOKIE(bCookie, bData)   (ixOsalWinCEWriteBCookie(bCookie, bData))
 300
 301 #endif /* wince */
 302
 303 #if defined (__vxworks) || (defined (__linux) && defined (IX_OSAL_STATIC_MEMORY_MAP)) || \
 304                            (defined (__wince) && defined (IX_OSAL_STATIC_MEMORY_MAP))
 305
 306 #define IX_OSAL_READ_LONG_IO(wAddr)            IX_OSAL_READ_LONG_RAW(wAddr)
 307 #define IX_OSAL_READ_SHORT_IO(sAddr)           IX_OSAL_READ_SHORT_RAW(sAddr)
 308 #define IX_OSAL_READ_BYTE_IO(bAddr)            IX_OSAL_READ_BYTE_RAW(bAddr)
 309 #define IX_OSAL_WRITE_LONG_IO(wAddr, wData)    IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
 310 #define IX_OSAL_WRITE_SHORT_IO(sAddr, sData)   IX_OSAL_WRITE_SHORT_RAW(sAddr, sData)
 311 #define IX_OSAL_WRITE_BYTE_IO(bAddr, bData)    IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
 312
 313 #elif (defined (__linux) && !defined (IX_OSAL_STATIC_MEMORY_MAP)) || \
 314       (defined (__wince) && !defined (IX_OSAL_STATIC_MEMORY_MAP))
 315
 316 #ifndef __wince
 317 #include <asm/io.h>
 318 #endif /* ndef __wince */
 319
 320 #define IX_OSAL_READ_LONG_IO(wAddr)            IX_OSAL_READ_LONG_COOKIE(wAddr)
 321 #define IX_OSAL_READ_SHORT_IO(sAddr)           IX_OSAL_READ_SHORT_COOKIE(sAddr)
 322 #define IX_OSAL_READ_BYTE_IO(bAddr)            IX_OSAL_READ_BYTE_COOKIE(bAddr)
 323 #define IX_OSAL_WRITE_LONG_IO(wAddr, wData)    IX_OSAL_WRITE_LONG_COOKIE(wAddr, wData)
 324 #define IX_OSAL_WRITE_SHORT_IO(sAddr, sData)   IX_OSAL_WRITE_SHORT_COOKIE(sAddr, sData)
 325 #define IX_OSAL_WRITE_BYTE_IO(bAddr, bData)    IX_OSAL_WRITE_BYTE_COOKIE(bAddr, bData)
 326
 327 #endif
 328
 329 /* Define BE macros */
 330 #define IX_OSAL_READ_LONG_BE(wAddr)          IX_OSAL_BE_BUSTOXSL(IX_OSAL_READ_LONG_IO((volatile UINT32 *) (wAddr) ))
 331 #define IX_OSAL_READ_SHORT_BE(sAddr)         IX_OSAL_BE_BUSTOXSS(IX_OSAL_READ_SHORT_IO((volatile UINT16 *) (sAddr) ))
 332 #define IX_OSAL_READ_BYTE_BE(bAddr)          IX_OSAL_BE_BUSTOXSB(IX_OSAL_READ_BYTE_IO((volatile UINT8 *) (bAddr) ))
 333 #define IX_OSAL_WRITE_LONG_BE(wAddr, wData)  IX_OSAL_WRITE_LONG_IO((volatile UINT32 *) (wAddr), IX_OSAL_BE_XSTOBUSL((UINT32) (wData) ))
 334 #define IX_OSAL_WRITE_SHORT_BE(sAddr, sData) IX_OSAL_WRITE_SHORT_IO((volatile UINT16 *) (sAddr), IX_OSAL_BE_XSTOBUSS((UINT16) (sData) ))
 335 #define IX_OSAL_WRITE_BYTE_BE(bAddr, bData)  IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) (bAddr), IX_OSAL_BE_XSTOBUSB((UINT8) (bData) ))
 336
 337 /* Define LE AC macros */
 338 #define IX_OSAL_READ_LONG_LE_AC(wAddr)          IX_OSAL_READ_LONG_IO((volatile UINT32 *) IX_OSAL_LE_AC_BUSTOXSL((UINT32) (wAddr) ))
 339 #define IX_OSAL_READ_SHORT_LE_AC(sAddr)         IX_OSAL_READ_SHORT_IO((volatile UINT16 *) IX_OSAL_LE_AC_BUSTOXSS((UINT32) (sAddr) ))
 340 #define IX_OSAL_READ_BYTE_LE_AC(bAddr)          IX_OSAL_READ_BYTE_IO((volatile UINT8 *) IX_OSAL_LE_AC_BUSTOXSB((UINT32) (bAddr) ))
 341 #define IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData)  IX_OSAL_WRITE_LONG_IO((volatile UINT32 *) IX_OSAL_LE_AC_XSTOBUSL((UINT32) (wAddr) ), (UINT32) (wData))
 342 #define IX_OSAL_WRITE_SHORT_LE_AC(sAddr, sData) IX_OSAL_WRITE_SHORT_IO((volatile UINT16 *) IX_OSAL_LE_AC_XSTOBUSS((UINT32) (sAddr) ), (UINT16) (sData))
 343 #define IX_OSAL_WRITE_BYTE_LE_AC(bAddr, bData)  IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) IX_OSAL_LE_AC_XSTOBUSB((UINT32) (bAddr) ), (UINT8) (bData))
 344
 345
 346 /* Inline functions are required here to avoid reading the same I/O location 2 or 4 times for the byte swap */
 347 static __inline__ UINT32
 348 ixOsalDataCoherentLongReadSwap (volatile UINT32 * wAddr)
 349 {
 350     UINT32 wData = IX_OSAL_READ_LONG_IO (wAddr);
 351     return IX_OSAL_LE_DC_BUSTOXSL (wData);
 352 }
 353
 354 static __inline__ UINT16
 355 ixOsalDataCoherentShortReadSwap (volatile UINT16 * sAddr)
 356 {
 357     UINT16 sData = IX_OSAL_READ_SHORT_IO (sAddr);
 358     return IX_OSAL_LE_DC_BUSTOXSS (sData);
 359 }
 360
 361 static __inline__ void
 362 ixOsalDataCoherentLongWriteSwap (volatile UINT32 * wAddr, UINT32 wData)
 363 {
 364     wData = IX_OSAL_LE_DC_XSTOBUSL (wData);
 365     IX_OSAL_WRITE_LONG_IO (wAddr, wData);
 366 }
 367
 368 static __inline__ void
 369 ixOsalDataCoherentShortWriteSwap (volatile UINT16 * sAddr, UINT16 sData)
 370 {
 371     sData = IX_OSAL_LE_DC_XSTOBUSS (sData);
 372     IX_OSAL_WRITE_SHORT_IO (sAddr, sData);
 373 }
 374
 375 /* Define LE DC macros */
 376
 377 #define IX_OSAL_READ_LONG_LE_DC(wAddr)          ixOsalDataCoherentLongReadSwap((volatile UINT32 *) (wAddr) )
 378 #define IX_OSAL_READ_SHORT_LE_DC(sAddr)         ixOsalDataCoherentShortReadSwap((volatile UINT16 *) (sAddr) )
 379 #define IX_OSAL_READ_BYTE_LE_DC(bAddr)          IX_OSAL_LE_DC_BUSTOXSB(IX_OSAL_READ_BYTE_IO((volatile UINT8 *) (bAddr) ))
 380 #define IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData)  ixOsalDataCoherentLongWriteSwap((volatile UINT32 *) (wAddr), (UINT32) (wData))
 381 #define IX_OSAL_WRITE_SHORT_LE_DC(sAddr, sData) ixOsalDataCoherentShortWriteSwap((volatile UINT16 *) (sAddr), (UINT16) (sData))
 382 #define IX_OSAL_WRITE_BYTE_LE_DC(bAddr, bData)  IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) (bAddr), IX_OSAL_LE_DC_XSTOBUSB((UINT8) (bData)))
 383
 384 #if defined (IX_OSAL_BE_MAPPING)
 385
 386 #define IX_OSAL_READ_LONG(wAddr)            IX_OSAL_READ_LONG_BE(wAddr)
 387 #define IX_OSAL_READ_SHORT(sAddr)               IX_OSAL_READ_SHORT_BE(sAddr)
 388 #define IX_OSAL_READ_BYTE(bAddr)                IX_OSAL_READ_BYTE_BE(bAddr)
 389 #define IX_OSAL_WRITE_LONG(wAddr, wData)        IX_OSAL_WRITE_LONG_BE(wAddr, wData)
 390 #define IX_OSAL_WRITE_SHORT(sAddr, sData)       IX_OSAL_WRITE_SHORT_BE(sAddr, sData)
 391 #define IX_OSAL_WRITE_BYTE(bAddr, bData)        IX_OSAL_WRITE_BYTE_BE(bAddr, bData)
 392
 393 #elif defined (IX_OSAL_LE_AC_MAPPING)
 394
 395 #define IX_OSAL_READ_LONG(wAddr)            IX_OSAL_READ_LONG_LE_AC(wAddr)
 396 #define IX_OSAL_READ_SHORT(sAddr)               IX_OSAL_READ_SHORT_LE_AC(sAddr)
 397 #define IX_OSAL_READ_BYTE(bAddr)                IX_OSAL_READ_BYTE_LE_AC(bAddr)
 398 #define IX_OSAL_WRITE_LONG(wAddr, wData)        IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData)
 399 #define IX_OSAL_WRITE_SHORT(sAddr, sData)       IX_OSAL_WRITE_SHORT_LE_AC(sAddr, sData)
 400 #define IX_OSAL_WRITE_BYTE(bAddr, bData)        IX_OSAL_WRITE_BYTE_LE_AC(bAddr, bData)
 401
 402 #elif defined (IX_OSAL_LE_DC_MAPPING)
 403
 404 #define IX_OSAL_READ_LONG(wAddr)            IX_OSAL_READ_LONG_LE_DC(wAddr)
 405 #define IX_OSAL_READ_SHORT(sAddr)               IX_OSAL_READ_SHORT_LE_DC(sAddr)
 406 #define IX_OSAL_READ_BYTE(bAddr)                IX_OSAL_READ_BYTE_LE_DC(bAddr)
 407 #define IX_OSAL_WRITE_LONG(wAddr, wData)        IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData)
 408 #define IX_OSAL_WRITE_SHORT(sAddr, sData)       IX_OSAL_WRITE_SHORT_LE_DC(sAddr, sData)
 409 #define IX_OSAL_WRITE_BYTE(bAddr, bData)        IX_OSAL_WRITE_BYTE_LE_DC(bAddr, bData)
 410
 411 #endif   /* End of BE and LE coherency mode switch */
 412
 413
 414 /* Reads/writes to and from memory shared with NPEs - depends on the SDRAM coherency */
 415
 416 #if defined (IX_SDRAM_BE)
 417
 418 #define IX_OSAL_READ_BE_SHARED_LONG(wAddr)            IX_OSAL_READ_LONG_RAW(wAddr)
 419 #define IX_OSAL_READ_BE_SHARED_SHORT(sAddr)           IX_OSAL_READ_SHORT_RAW(sAddr)
 420 #define IX_OSAL_READ_BE_SHARED_BYTE(bAddr)            IX_OSAL_READ_BYTE_RAW(bAddr)
 421
 422 #define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData)    IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
 423 #define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData)   IX_OSAL_WRITE_SHORT_RAW(sAddr, sData)
 424 #define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData)    IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
 425
 426 #define IX_OSAL_SWAP_BE_SHARED_LONG(wData)            (wData)
 427 #define IX_OSAL_SWAP_BE_SHARED_SHORT(sData)           (sData)
 428 #define IX_OSAL_SWAP_BE_SHARED_BYTE(bData)            (bData)
 429
 430 #elif defined (IX_SDRAM_LE_ADDRESS_COHERENT)
 431
 432 #define IX_OSAL_READ_BE_SHARED_LONG(wAddr)            IX_OSAL_READ_LONG_RAW(wAddr)
 433 #define IX_OSAL_READ_BE_SHARED_SHORT(sAddr)           IX_OSAL_READ_SHORT_RAW(IX_OSAL_SWAP_SHORT_ADDRESS(sAddr))
 434 #define IX_OSAL_READ_BE_SHARED_BYTE(bAddr)            IX_OSAL_READ_BYTE_RAW(IX_OSAL_SWAP_BYTE_ADDRESS(bAddr))
 435
 436 #define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData)    IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
 437 #define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData)   IX_OSAL_WRITE_SHORT_RAW(IX_OSAL_SWAP_SHORT_ADDRESS(sAddr), sData)
 438 #define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData)    IX_OSAL_WRITE_BYTE_RAW(IX_OSAL_SWAP_BYTE_ADDRESS(bAddr), bData)
 439
 440 #define IX_OSAL_SWAP_BE_SHARED_LONG(wData)            (wData)
 441 #define IX_OSAL_SWAP_BE_SHARED_SHORT(sData)           (sData)
 442 #define IX_OSAL_SWAP_BE_SHARED_BYTE(bData)            (bData)
 443
 444 #elif defined (IX_SDRAM_LE_DATA_COHERENT)
 445
 446 #define IX_OSAL_READ_BE_SHARED_LONG(wAddr)            IX_OSAL_SWAP_LONG(IX_OSAL_READ_LONG_RAW(wAddr))
 447 #define IX_OSAL_READ_BE_SHARED_SHORT(sAddr)           IX_OSAL_SWAP_SHORT(IX_OSAL_READ_SHORT_RAW(sAddr))
 448 #define IX_OSAL_READ_BE_SHARED_BYTE(bAddr)            IX_OSAL_READ_BYTE_RAW(bAddr)
 449
 450 #define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData)    IX_OSAL_WRITE_LONG_RAW(wAddr, IX_OSAL_SWAP_LONG(wData))
 451 #define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData)   IX_OSAL_WRITE_SHORT_RAW(sAddr, IX_OSAL_SWAP_SHORT(sData))
 452 #define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData)    IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
 453
 454 #define IX_OSAL_SWAP_BE_SHARED_LONG(wData)            IX_OSAL_SWAP_LONG(wData)
 455 #define IX_OSAL_SWAP_BE_SHARED_SHORT(sData)           IX_OSAL_SWAP_SHORT(sData)
 456
 457 #endif
 458
 459
 460 #define IX_OSAL_COPY_BE_SHARED_LONG_ARRAY(wDestAddr, wSrcAddr, wCount) \
 461   { \
 462     UINT32 i; \
 463     \
 464     for ( i = 0 ; i < wCount ; i++ ) \
 465     { \
 466       * (((UINT32 *) wDestAddr) + i) = IX_OSAL_READ_BE_SHARED_LONG(((UINT32 *) wSrcAddr) + i); \
 467     }; \
 468   };
 469
 470 #endif /* IxOsalMemAccess_H */