drivers/pci_indirect.c

   1 /*
   2  * Support for indirect PCI bridges.
   3  *
   4  * Copyright (C) 1998 Gabriel Paubert.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <common.h>
  13
  14 #ifdef CONFIG_PCI
  15 #ifndef __I386__
  16
  17 #include <asm/processor.h>
  18 #include <asm/io.h>
  19 #include <pci.h>
  20
  21 #define cfg_read(val, addr, type, op)   *val = op((type)(addr))
  22 #define cfg_write(val, addr, type, op)  op((type *)(addr), (val))
  23
  24 #if defined(CONFIG_MPC8260)
  25 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  26 static int                                                               \
  27 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  28                               pci_dev_t dev, int offset, type val)       \
  29 {                                                                        \
  30         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  31         sync();                                                          \
  32         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  33         return 0;                                                        \
  34 }
  35 #elif defined(CONFIG_E500)
  36 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  37 static int                                                               \
  38 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  39                               pci_dev_t dev, int offset, type val)       \
  40 {                                                                        \
  41         *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000;          \
  42         sync();                                                          \
  43         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  44         return 0;                                                        \
  45 }
  46 #elif defined(CONFIG_440_GX)
  47 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  48 static int                                                               \
  49 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  50                               pci_dev_t dev, int offset, type val)       \
  51 {                                                                        \
  52         if (PCI_BUS(dev) > 0)                                            \
  53                 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
  54         else                                                             \
  55                 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
  56         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  57         return 0;                                                        \
  58 }
  59 #else
  60 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  61 static int                                                               \
  62 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  63                               pci_dev_t dev, int offset, type val)       \
  64 {                                                                        \
  65         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  66         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  67         return 0;                                                        \
  68 }
  69 #endif
  70
  71 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask)                \
  72 static int                                                               \
  73 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  74                               pci_dev_t dev, int offset, type val)       \
  75 {                                                                        \
  76         unsigned int msr = mfmsr();                                      \
  77         mtmsr(msr & ~(MSR_EE | MSR_CE));                                 \
  78         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  79         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  80         out_le32(hose->cfg_addr, 0x00000000);                            \
  81         mtmsr(msr);                                                      \
  82         return 0;                                                        \
  83 }
  84
  85 INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
  86 INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
  87 INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
  88 #ifdef CONFIG_405GP
  89 INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
  90 INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
  91 INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
  92 #else
  93 INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
  94 INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
  95 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
  96 #endif
  97
  98 void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  99 {
 100         pci_set_ops(hose,
 101                     indirect_read_config_byte,
 102                     indirect_read_config_word,
 103                     indirect_read_config_dword,
 104                     indirect_write_config_byte,
 105                     indirect_write_config_word,
 106                     indirect_write_config_dword);
 107
 108         hose->cfg_addr = (unsigned int *) cfg_addr;
 109         hose->cfg_data = (unsigned char *) cfg_data;
 110 }
 111
 112 #endif
 113 #endif