drivers/pci_indirect.c

   1 /*
   2  * Support for indirect PCI bridges.
   3  *
   4  * Copyright (C) 1998 Gabriel Paubert.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <common.h>
  13
  14 #ifdef CONFIG_PCI
  15
  16 #include <asm/processor.h>
  17 #include <asm/io.h>
  18 #include <pci.h>
  19
  20 #define cfg_read(val, addr, type, op)   *val = op((type)(addr))
  21 #define cfg_write(val, addr, type, op)  op((type *)(addr), (val))
  22
  23 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  24 static int                                                               \
  25 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  26                               pci_dev_t dev, int offset, type val)       \
  27 {                                                                        \
  28         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  29         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  30         return 0;                                                        \
  31 }
  32
  33 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask)                \
  34 static int                                                               \
  35 indirect_##rw##_config_##size(struct pci_controller *hose,               \
  36                               pci_dev_t dev, int offset, type val)       \
  37 {                                                                        \
  38         unsigned int msr = mfmsr();                                      \
  39         mtmsr(msr & ~(MSR_EE | MSR_CE));                                 \
  40         out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  41         cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  42         out_le32(hose->cfg_addr, 0x00000000);                            \
  43         mtmsr(msr);                                                      \
  44         return 0;                                                        \
  45 }
  46
  47 INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
  48 INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
  49 INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
  50 #ifdef CONFIG_405GP
  51 INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
  52 INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
  53 INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
  54 #else
  55 INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
  56 INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
  57 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
  58 #endif
  59
  60 void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  61 {
  62         pci_set_ops(hose,
  63                     indirect_read_config_byte,
  64                     indirect_read_config_word,
  65                     indirect_read_config_dword,
  66                     indirect_write_config_byte,
  67                     indirect_write_config_word,
  68                     indirect_write_config_dword);
  69
  70         hose->cfg_addr = (unsigned int *) cfg_addr;
  71         hose->cfg_data = (unsigned char *) cfg_data;
  72 }
  73
  74 #endif