abf362a8458512e4c627d929dd0af79fe5032ded
[karo-tx-uboot.git] / drivers / serial / serial_uniphier.c
1 /*
2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <linux/io.h>
8 #include <linux/serial_reg.h>
9 #include <asm/errno.h>
10 #include <dm/device.h>
11 #include <dm/platform_data/serial-uniphier.h>
12 #include <mapmem.h>
13 #include <serial.h>
14 #include <fdtdec.h>
15
16 /*
17  * Note: Register map is slightly different from that of 16550.
18  */
19 struct uniphier_serial {
20         u32 rx;                 /* In:  Receive buffer */
21 #define tx rx                   /* Out: Transmit buffer */
22         u32 ier;                /* Interrupt Enable Register */
23         u32 iir;                /* In: Interrupt ID Register */
24         u32 char_fcr;           /* Charactor / FIFO Control Register */
25         u32 lcr_mcr;            /* Line/Modem Control Register */
26 #define LCR_SHIFT       8
27 #define LCR_MASK        (0xff << (LCR_SHIFT))
28         u32 lsr;                /* In: Line Status Register */
29         u32 msr;                /* In: Modem Status Register */
30         u32 __rsv0;
31         u32 __rsv1;
32         u32 dlr;                /* Divisor Latch Register */
33 };
34
35 struct uniphier_serial_private_data {
36         struct uniphier_serial __iomem *membase;
37 };
38
39 #define uniphier_serial_port(dev)       \
40         ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
41
42 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
43 {
44         struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
45         struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
46         const unsigned int mode_x_div = 16;
47         unsigned int divisor;
48
49         divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
50
51         writel(divisor, &port->dlr);
52
53         return 0;
54 }
55
56 static int uniphier_serial_getc(struct udevice *dev)
57 {
58         struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
59
60         if (!(readl(&port->lsr) & UART_LSR_DR))
61                 return -EAGAIN;
62
63         return readl(&port->rx);
64 }
65
66 static int uniphier_serial_putc(struct udevice *dev, const char c)
67 {
68         struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
69
70         if (!(readl(&port->lsr) & UART_LSR_THRE))
71                 return -EAGAIN;
72
73         writel(c, &port->tx);
74
75         return 0;
76 }
77
78 static int uniphier_serial_pending(struct udevice *dev, bool input)
79 {
80         struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
81
82         if (input)
83                 return readl(&port->lsr) & UART_LSR_DR;
84         else
85                 return !(readl(&port->lsr) & UART_LSR_THRE);
86 }
87
88 static int uniphier_serial_probe(struct udevice *dev)
89 {
90         u32 tmp;
91         struct uniphier_serial_private_data *priv = dev_get_priv(dev);
92         struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
93         struct uniphier_serial __iomem *port;
94
95         port = map_sysmem(plat->base, sizeof(struct uniphier_serial));
96         if (!port)
97                 return -ENOMEM;
98
99         priv->membase = port;
100
101         tmp = readl(&port->lcr_mcr);
102         tmp &= ~LCR_MASK;
103         tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
104         writel(tmp, &port->lcr_mcr);
105
106         return 0;
107 }
108
109 static int uniphier_serial_remove(struct udevice *dev)
110 {
111         unmap_sysmem(uniphier_serial_port(dev));
112
113         return 0;
114 }
115
116 #if CONFIG_IS_ENABLED(OF_CONTROL)
117 static const struct udevice_id uniphier_uart_of_match[] = {
118         { .compatible = "socionext,uniphier-uart" },
119         { /* sentinel */ }
120 };
121
122 static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
123 {
124         struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
125         DECLARE_GLOBAL_DATA_PTR;
126
127         plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
128         plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
129                                        "clock-frequency", 0);
130
131         return 0;
132 }
133 #endif
134
135 static const struct dm_serial_ops uniphier_serial_ops = {
136         .setbrg = uniphier_serial_setbrg,
137         .getc = uniphier_serial_getc,
138         .putc = uniphier_serial_putc,
139         .pending = uniphier_serial_pending,
140 };
141
142 U_BOOT_DRIVER(uniphier_serial) = {
143         .name = DRIVER_NAME,
144         .id = UCLASS_SERIAL,
145         .of_match = of_match_ptr(uniphier_uart_of_match),
146         .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
147         .probe = uniphier_serial_probe,
148         .remove = uniphier_serial_remove,
149         .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
150         .platdata_auto_alloc_size =
151                                 sizeof(struct uniphier_serial_platform_data),
152         .ops = &uniphier_serial_ops,
153         .flags = DM_FLAG_PRE_RELOC,
154 };