drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33 #include <dm.h>
  34 #include <errno.h>
  35
  36 #if defined(CONFIG_PCI_OHCI)
  37 # include <pci.h>
  38 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  39 #define CONFIG_PCI_OHCI_DEVNO   0
  40 #endif
  41 #endif
  42
  43 #include <malloc.h>
  44 #include <usb.h>
  45
  46 #include "ohci.h"
  47
  48 #ifdef CONFIG_AT91RM9200
  49 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  50 #endif
  51
  52 #if defined(CONFIG_CPU_ARM920T) || \
  53     defined(CONFIG_S3C24X0) || \
  54     defined(CONFIG_440EP) || \
  55     defined(CONFIG_PCI_OHCI) || \
  56     defined(CONFIG_MPC5200) || \
  57     defined(CONFIG_SYS_OHCI_USE_NPS)
  58 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  59 #endif
  60
  61 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  62 #undef DEBUG
  63 #undef SHOW_INFO
  64 #undef OHCI_FILL_TRACE
  65
  66 /* For initializing controller (mask in an HCFS mode too) */
  67 #define OHCI_CONTROL_INIT \
  68         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  69
  70 #ifdef CONFIG_PCI_OHCI
  71 static struct pci_device_id ohci_pci_ids[] = {
  72         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  73         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  74         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  75         /* Please add supported PCI OHCI controller ids here */
  76         {0, 0}
  77 };
  78 #endif
  79
  80 #ifdef CONFIG_PCI_EHCI_DEVNO
  81 static struct pci_device_id ehci_pci_ids[] = {
  82         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  83         /* Please add supported PCI EHCI controller ids here */
  84         {0, 0}
  85 };
  86 #endif
  87
  88 #ifdef DEBUG
  89 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  90 #else
  91 #define dbg(format, arg...) do {} while (0)
  92 #endif /* DEBUG */
  93 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  94 #ifdef SHOW_INFO
  95 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  96 #else
  97 #define info(format, arg...) do {} while (0)
  98 #endif
  99
 100 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
 101 # define m16_swap(x) cpu_to_be16(x)
 102 # define m32_swap(x) cpu_to_be32(x)
 103 #else
 104 # define m16_swap(x) cpu_to_le16(x)
 105 # define m32_swap(x) cpu_to_le32(x)
 106 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 107
 108 #ifdef CONFIG_DM_USB
 109 /*
 110  * We really should do proper cache flushing everywhere, but for now we only
 111  * do it for new (driver-model) usb code to avoid regressions.
 112  */
 113 #define flush_dcache_buffer(addr, size) \
 114         flush_dcache_range((unsigned long)(addr), \
 115                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 116 #define invalidate_dcache_buffer(addr, size) \
 117         invalidate_dcache_range((unsigned long)(addr), \
 118                 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
 119 #else
 120 #define flush_dcache_buffer(addr, size)
 121 #define invalidate_dcache_buffer(addr, size)
 122 #endif
 123
 124 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
 125 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
 126 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
 127 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
 128 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
 129 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
 130 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
 131 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 132 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 133
 134 #ifdef CONFIG_DM_USB
 135 /*
 136  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
 137  * them around when building for older boards not yet converted to the dm
 138  * just in case (to avoid regressions), for dm this turns them into nops.
 139  */
 140 #define ohci_mdelay(x)
 141 #else
 142 #define ohci_mdelay(x) mdelay(x)
 143 #endif
 144
 145 #ifndef CONFIG_DM_USB
 146 /* global ohci_t */
 147 static ohci_t gohci;
 148 /* this must be aligned to a 256 byte boundary */
 149 struct ohci_hcca ghcca[1];
 150 #endif
 151
 152 /* mapping of the OHCI CC status to error codes */
 153 static int cc_to_error[16] = {
 154         /* No  Error  */               0,
 155         /* CRC Error  */               USB_ST_CRC_ERR,
 156         /* Bit Stuff  */               USB_ST_BIT_ERR,
 157         /* Data Togg  */               USB_ST_CRC_ERR,
 158         /* Stall      */               USB_ST_STALLED,
 159         /* DevNotResp */               -1,
 160         /* PIDCheck   */               USB_ST_BIT_ERR,
 161         /* UnExpPID   */               USB_ST_BIT_ERR,
 162         /* DataOver   */               USB_ST_BUF_ERR,
 163         /* DataUnder  */               USB_ST_BUF_ERR,
 164         /* reservd    */               -1,
 165         /* reservd    */               -1,
 166         /* BufferOver */               USB_ST_BUF_ERR,
 167         /* BuffUnder  */               USB_ST_BUF_ERR,
 168         /* Not Access */               -1,
 169         /* Not Access */               -1
 170 };
 171
 172 static const char *cc_to_string[16] = {
 173         "No Error",
 174         "CRC: Last data packet from endpoint contained a CRC error.",
 175         "BITSTUFFING: Last data packet from endpoint contained a bit " \
 176                      "stuffing violation",
 177         "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
 178                      "that did not match the expected value.",
 179         "STALL: TD was moved to the Done Queue because the endpoint returned" \
 180                      " a STALL PID",
 181         "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
 182                      "not provide a handshake (OUT)",
 183         "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
 184                      "(IN) or handshake (OUT)",
 185         "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
 186                      "value is not defined.",
 187         "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
 188                      "either the size of the maximum data packet allowed\n" \
 189                      "from the endpoint (found in MaximumPacketSize field\n" \
 190                      "of ED) or the remaining buffer size.",
 191         "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
 192                      "and that amount was not sufficient to fill the\n" \
 193                      "specified buffer",
 194         "reserved1",
 195         "reserved2",
 196         "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
 197                      "than it could be written to system memory",
 198         "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
 199                      "system memory fast enough to keep up with data USB " \
 200                      "data rate.",
 201         "NOT ACCESSED: This code is set by software before the TD is placed" \
 202                      "on a list to be processed by the HC.(1)",
 203         "NOT ACCESSED: This code is set by software before the TD is placed" \
 204                      "on a list to be processed by the HC.(2)",
 205 };
 206
 207 static inline u32 roothub_a(struct ohci *hc)
 208         { return ohci_readl(&hc->regs->roothub.a); }
 209 static inline u32 roothub_b(struct ohci *hc)
 210         { return ohci_readl(&hc->regs->roothub.b); }
 211 static inline u32 roothub_status(struct ohci *hc)
 212         { return ohci_readl(&hc->regs->roothub.status); }
 213 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 214         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 215
 216 /* forward declaration */
 217 static int hc_interrupt(ohci_t *ohci);
 218 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 219                           unsigned long pipe, void *buffer, int transfer_len,
 220                           struct devrequest *setup, urb_priv_t *urb,
 221                           int interval);
 222 static int ep_link(ohci_t * ohci, ed_t * ed);
 223 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 224 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 225                        unsigned long pipe, int interval, int load);
 226
 227 /*-------------------------------------------------------------------------*/
 228
 229 /* TDs ... */
 230 static struct td *td_alloc(ohci_dev_t *ohci_dev, struct usb_device *usb_dev)
 231 {
 232         int i;
 233         struct td *td;
 234
 235         td = NULL;
 236         for (i = 0; i < NUM_TD; i++)
 237         {
 238                 if (ohci_dev->tds[i].usb_dev == NULL)
 239                 {
 240                         td = &ohci_dev->tds[i];
 241                         td->usb_dev = usb_dev;
 242                         break;
 243                 }
 244         }
 245
 246         return td;
 247 }
 248
 249 static inline void ed_free(struct ed *ed)
 250 {
 251         ed->usb_dev = NULL;
 252 }
 253
 254 /*-------------------------------------------------------------------------*
 255  * URB support functions
 256  *-------------------------------------------------------------------------*/
 257
 258 /* free HCD-private data associated with this URB */
 259
 260 static void urb_free_priv(urb_priv_t *urb)
 261 {
 262         int             i;
 263         int             last;
 264         struct td       *td;
 265
 266         last = urb->length - 1;
 267         if (last >= 0) {
 268                 for (i = 0; i <= last; i++) {
 269                         td = urb->td[i];
 270                         if (td) {
 271                                 td->usb_dev = NULL;
 272                                 urb->td[i] = NULL;
 273                         }
 274                 }
 275         }
 276         free(urb);
 277 }
 278
 279 /*-------------------------------------------------------------------------*/
 280
 281 #ifdef DEBUG
 282 static int sohci_get_current_frame_number(ohci_t *ohci);
 283
 284 /* debug| print the main components of an URB
 285  * small: 0) header + data packets 1) just header */
 286
 287 static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
 288                       unsigned long pipe, void *buffer, int transfer_len,
 289                       struct devrequest *setup, char *str, int small)
 290 {
 291         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 292                         str,
 293                         sohci_get_current_frame_number(ohci),
 294                         usb_pipedevice(pipe),
 295                         usb_pipeendpoint(pipe),
 296                         usb_pipeout(pipe)? 'O': 'I',
 297                         usb_pipetype(pipe) < 2 ? \
 298                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 299                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 300                         (purb ? purb->actual_length : 0),
 301                         transfer_len, dev->status);
 302 #ifdef  OHCI_VERBOSE_DEBUG
 303         if (!small) {
 304                 int i, len;
 305
 306                 if (usb_pipecontrol(pipe)) {
 307                         printf(__FILE__ ": cmd(8):");
 308                         for (i = 0; i < 8 ; i++)
 309                                 printf(" %02x", ((__u8 *) setup) [i]);
 310                         printf("\n");
 311                 }
 312                 if (transfer_len > 0 && buffer) {
 313                         printf(__FILE__ ": data(%d/%d):",
 314                                 (purb ? purb->actual_length : 0),
 315                                 transfer_len);
 316                         len = usb_pipeout(pipe)? transfer_len:
 317                                         (purb ? purb->actual_length : 0);
 318                         for (i = 0; i < 16 && i < len; i++)
 319                                 printf(" %02x", ((__u8 *) buffer) [i]);
 320                         printf("%s\n", i < len? "...": "");
 321                 }
 322         }
 323 #endif
 324 }
 325
 326 /* just for debugging; prints non-empty branches of the int ed tree
 327  * inclusive iso eds */
 328 void ep_print_int_eds(ohci_t *ohci, char *str)
 329 {
 330         int i, j;
 331          __u32 *ed_p;
 332         for (i = 0; i < 32; i++) {
 333                 j = 5;
 334                 ed_p = &(ohci->hcca->int_table [i]);
 335                 if (*ed_p == 0)
 336                     continue;
 337                 invalidate_dcache_ed(ed_p);
 338                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 339                 while (*ed_p != 0 && j--) {
 340                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 341                         invalidate_dcache_ed(ed);
 342                         printf(" ed: %4x;", ed->hwINFO);
 343                         ed_p = &ed->hwNextED;
 344                 }
 345                 printf("\n");
 346         }
 347 }
 348
 349 static void ohci_dump_intr_mask(char *label, __u32 mask)
 350 {
 351         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 352                 label,
 353                 mask,
 354                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 355                 (mask & OHCI_INTR_OC) ? " OC" : "",
 356                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 357                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 358                 (mask & OHCI_INTR_UE) ? " UE" : "",
 359                 (mask & OHCI_INTR_RD) ? " RD" : "",
 360                 (mask & OHCI_INTR_SF) ? " SF" : "",
 361                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 362                 (mask & OHCI_INTR_SO) ? " SO" : ""
 363                 );
 364 }
 365
 366 static void maybe_print_eds(char *label, __u32 value)
 367 {
 368         ed_t *edp = (ed_t *)value;
 369
 370         if (value) {
 371                 dbg("%s %08x", label, value);
 372                 invalidate_dcache_ed(edp);
 373                 dbg("%08x", edp->hwINFO);
 374                 dbg("%08x", edp->hwTailP);
 375                 dbg("%08x", edp->hwHeadP);
 376                 dbg("%08x", edp->hwNextED);
 377         }
 378 }
 379
 380 static char *hcfs2string(int state)
 381 {
 382         switch (state) {
 383         case OHCI_USB_RESET:    return "reset";
 384         case OHCI_USB_RESUME:   return "resume";
 385         case OHCI_USB_OPER:     return "operational";
 386         case OHCI_USB_SUSPEND:  return "suspend";
 387         }
 388         return "?";
 389 }
 390
 391 /* dump control and status registers */
 392 static void ohci_dump_status(ohci_t *controller)
 393 {
 394         struct ohci_regs        *regs = controller->regs;
 395         __u32                   temp;
 396
 397         temp = ohci_readl(&regs->revision) & 0xff;
 398         if (temp != 0x10)
 399                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 400
 401         temp = ohci_readl(&regs->control);
 402         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 403                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 404                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 405                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 406                 hcfs2string(temp & OHCI_CTRL_HCFS),
 407                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 408                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 409                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 410                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 411                 temp & OHCI_CTRL_CBSR
 412                 );
 413
 414         temp = ohci_readl(&regs->cmdstatus);
 415         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 416                 (temp & OHCI_SOC) >> 16,
 417                 (temp & OHCI_OCR) ? " OCR" : "",
 418                 (temp & OHCI_BLF) ? " BLF" : "",
 419                 (temp & OHCI_CLF) ? " CLF" : "",
 420                 (temp & OHCI_HCR) ? " HCR" : ""
 421                 );
 422
 423         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 424         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 425
 426         maybe_print_eds("ed_periodcurrent",
 427                         ohci_readl(&regs->ed_periodcurrent));
 428
 429         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 430         maybe_print_eds("ed_controlcurrent",
 431                         ohci_readl(&regs->ed_controlcurrent));
 432
 433         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 434         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 435
 436         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 437 }
 438
 439 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 440 {
 441         __u32                   temp, ndp, i;
 442
 443         temp = roothub_a(controller);
 444         ndp = (temp & RH_A_NDP);
 445 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 446         ndp = (ndp == 2) ? 1:0;
 447 #endif
 448         if (verbose) {
 449                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 450                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 451                         (temp & RH_A_NOCP) ? " NOCP" : "",
 452                         (temp & RH_A_OCPM) ? " OCPM" : "",
 453                         (temp & RH_A_DT) ? " DT" : "",
 454                         (temp & RH_A_NPS) ? " NPS" : "",
 455                         (temp & RH_A_PSM) ? " PSM" : "",
 456                         ndp
 457                         );
 458                 temp = roothub_b(controller);
 459                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 460                         temp,
 461                         (temp & RH_B_PPCM) >> 16,
 462                         (temp & RH_B_DR)
 463                         );
 464                 temp = roothub_status(controller);
 465                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 466                         temp,
 467                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 468                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 469                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 470                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 471                         (temp & RH_HS_OCI) ? " OCI" : "",
 472                         (temp & RH_HS_LPS) ? " LPS" : ""
 473                         );
 474         }
 475
 476         for (i = 0; i < ndp; i++) {
 477                 temp = roothub_portstatus(controller, i);
 478                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 479                         i,
 480                         temp,
 481                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 482                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 483                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 484                         (temp & RH_PS_PESC) ? " PESC" : "",
 485                         (temp & RH_PS_CSC) ? " CSC" : "",
 486
 487                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 488                         (temp & RH_PS_PPS) ? " PPS" : "",
 489                         (temp & RH_PS_PRS) ? " PRS" : "",
 490                         (temp & RH_PS_POCI) ? " POCI" : "",
 491                         (temp & RH_PS_PSS) ? " PSS" : "",
 492
 493                         (temp & RH_PS_PES) ? " PES" : "",
 494                         (temp & RH_PS_CCS) ? " CCS" : ""
 495                         );
 496         }
 497 }
 498
 499 static void ohci_dump(ohci_t *controller, int verbose)
 500 {
 501         dbg("OHCI controller usb-%s state", controller->slot_name);
 502
 503         /* dumps some of the state we know about */
 504         ohci_dump_status(controller);
 505         if (verbose)
 506                 ep_print_int_eds(controller, "hcca");
 507         invalidate_dcache_hcca(controller->hcca);
 508         dbg("hcca frame #%04x", controller->hcca->frame_no);
 509         ohci_dump_roothub(controller, 1);
 510 }
 511 #endif /* DEBUG */
 512
 513 /*-------------------------------------------------------------------------*
 514  * Interface functions (URB)
 515  *-------------------------------------------------------------------------*/
 516
 517 /* get a transfer request */
 518
 519 int sohci_submit_job(ohci_t *ohci, ohci_dev_t *ohci_dev, urb_priv_t *urb,
 520                      struct devrequest *setup)
 521 {
 522         ed_t *ed;
 523         urb_priv_t *purb_priv = urb;
 524         int i, size = 0;
 525         struct usb_device *dev = urb->dev;
 526         unsigned long pipe = urb->pipe;
 527         void *buffer = urb->transfer_buffer;
 528         int transfer_len = urb->transfer_buffer_length;
 529         int interval = urb->interval;
 530
 531         /* when controller's hung, permit only roothub cleanup attempts
 532          * such as powering down ports */
 533         if (ohci->disabled) {
 534                 err("sohci_submit_job: EPIPE");
 535                 return -1;
 536         }
 537
 538         /* we're about to begin a new transaction here so mark the
 539          * URB unfinished */
 540         urb->finished = 0;
 541
 542         /* every endpoint has a ed, locate and fill it */
 543         ed = ep_add_ed(ohci_dev, dev, pipe, interval, 1);
 544         if (!ed) {
 545                 err("sohci_submit_job: ENOMEM");
 546                 return -1;
 547         }
 548
 549         /* for the private part of the URB we need the number of TDs (size) */
 550         switch (usb_pipetype(pipe)) {
 551         case PIPE_BULK: /* one TD for every 4096 Byte */
 552                 size = (transfer_len - 1) / 4096 + 1;
 553                 break;
 554         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 555                 size = (transfer_len == 0)? 2:
 556                                         (transfer_len - 1) / 4096 + 3;
 557                 break;
 558         case PIPE_INTERRUPT: /* 1 TD */
 559                 size = 1;
 560                 break;
 561         }
 562
 563         ed->purb = urb;
 564
 565         if (size >= (N_URB_TD - 1)) {
 566                 err("need %d TDs, only have %d", size, N_URB_TD);
 567                 return -1;
 568         }
 569         purb_priv->pipe = pipe;
 570
 571         /* fill the private part of the URB */
 572         purb_priv->length = size;
 573         purb_priv->ed = ed;
 574         purb_priv->actual_length = 0;
 575
 576         /* allocate the TDs */
 577         /* note that td[0] was allocated in ep_add_ed */
 578         for (i = 0; i < size; i++) {
 579                 purb_priv->td[i] = td_alloc(ohci_dev, dev);
 580                 if (!purb_priv->td[i]) {
 581                         purb_priv->length = i;
 582                         urb_free_priv(purb_priv);
 583                         err("sohci_submit_job: ENOMEM");
 584                         return -1;
 585                 }
 586         }
 587
 588         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 589                 urb_free_priv(purb_priv);
 590                 err("sohci_submit_job: EINVAL");
 591                 return -1;
 592         }
 593
 594         /* link the ed into a chain if is not already */
 595         if (ed->state != ED_OPER)
 596                 ep_link(ohci, ed);
 597
 598         /* fill the TDs and link it to the ed */
 599         td_submit_job(ohci, dev, pipe, buffer, transfer_len,
 600                       setup, purb_priv, interval);
 601
 602         return 0;
 603 }
 604
 605 /*-------------------------------------------------------------------------*/
 606
 607 #ifdef DEBUG
 608 /* tell us the current USB frame number */
 609 static int sohci_get_current_frame_number(ohci_t *ohci)
 610 {
 611         invalidate_dcache_hcca(ohci->hcca);
 612         return m16_swap(ohci->hcca->frame_no);
 613 }
 614 #endif
 615
 616 /*-------------------------------------------------------------------------*
 617  * ED handling functions
 618  *-------------------------------------------------------------------------*/
 619
 620 /* search for the right branch to insert an interrupt ed into the int tree
 621  * do some load ballancing;
 622  * returns the branch and
 623  * sets the interval to interval = 2^integer (ld (interval)) */
 624
 625 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 626 {
 627         int i, branch = 0;
 628
 629         /* search for the least loaded interrupt endpoint
 630          * branch of all 32 branches
 631          */
 632         for (i = 0; i < 32; i++)
 633                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 634                         branch = i;
 635
 636         branch = branch % interval;
 637         for (i = branch; i < 32; i += interval)
 638                 ohci->ohci_int_load [i] += load;
 639
 640         return branch;
 641 }
 642
 643 /*-------------------------------------------------------------------------*/
 644
 645 /*  2^int( ld (inter)) */
 646
 647 static int ep_2_n_interval(int inter)
 648 {
 649         int i;
 650         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 651         return 1 << i;
 652 }
 653
 654 /*-------------------------------------------------------------------------*/
 655
 656 /* the int tree is a binary tree
 657  * in order to process it sequentially the indexes of the branches have to
 658  * be mapped the mapping reverses the bits of a word of num_bits length */
 659 static int ep_rev(int num_bits, int word)
 660 {
 661         int i, wout = 0;
 662
 663         for (i = 0; i < num_bits; i++)
 664                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 665         return wout;
 666 }
 667
 668 /*-------------------------------------------------------------------------*
 669  * ED handling functions
 670  *-------------------------------------------------------------------------*/
 671
 672 /* link an ed into one of the HC chains */
 673
 674 static int ep_link(ohci_t *ohci, ed_t *edi)
 675 {
 676         volatile ed_t *ed = edi;
 677         int int_branch;
 678         int i;
 679         int inter;
 680         int interval;
 681         int load;
 682         __u32 *ed_p;
 683
 684         ed->state = ED_OPER;
 685         ed->int_interval = 0;
 686
 687         switch (ed->type) {
 688         case PIPE_CONTROL:
 689                 ed->hwNextED = 0;
 690                 flush_dcache_ed(ed);
 691                 if (ohci->ed_controltail == NULL)
 692                         ohci_writel(ed, &ohci->regs->ed_controlhead);
 693                 else
 694                         ohci->ed_controltail->hwNextED =
 695                                                    m32_swap((unsigned long)ed);
 696
 697                 ed->ed_prev = ohci->ed_controltail;
 698                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 699                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 700                         ohci->hc_control |= OHCI_CTRL_CLE;
 701                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 702                 }
 703                 ohci->ed_controltail = edi;
 704                 break;
 705
 706         case PIPE_BULK:
 707                 ed->hwNextED = 0;
 708                 flush_dcache_ed(ed);
 709                 if (ohci->ed_bulktail == NULL)
 710                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
 711                 else
 712                         ohci->ed_bulktail->hwNextED =
 713                                                    m32_swap((unsigned long)ed);
 714
 715                 ed->ed_prev = ohci->ed_bulktail;
 716                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 717                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 718                         ohci->hc_control |= OHCI_CTRL_BLE;
 719                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 720                 }
 721                 ohci->ed_bulktail = edi;
 722                 break;
 723
 724         case PIPE_INTERRUPT:
 725                 load = ed->int_load;
 726                 interval = ep_2_n_interval(ed->int_period);
 727                 ed->int_interval = interval;
 728                 int_branch = ep_int_ballance(ohci, interval, load);
 729                 ed->int_branch = int_branch;
 730
 731                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 732                         inter = 1;
 733                         for (ed_p = &(ohci->hcca->int_table[\
 734                                                 ep_rev(5, i) + int_branch]);
 735                                 (*ed_p != 0) &&
 736                                 (((ed_t *)ed_p)->int_interval >= interval);
 737                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 738                                         inter = ep_rev(6,
 739                                                  ((ed_t *)ed_p)->int_interval);
 740                         ed->hwNextED = *ed_p;
 741                         flush_dcache_ed(ed);
 742                         *ed_p = m32_swap((unsigned long)ed);
 743                         flush_dcache_hcca(ohci->hcca);
 744                 }
 745                 break;
 746         }
 747         return 0;
 748 }
 749
 750 /*-------------------------------------------------------------------------*/
 751
 752 /* scan the periodic table to find and unlink this ED */
 753 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 754                             unsigned index, unsigned period)
 755 {
 756         __maybe_unused unsigned long aligned_ed_p;
 757
 758         for (; index < NUM_INTS; index += period) {
 759                 __u32   *ed_p = &ohci->hcca->int_table [index];
 760
 761                 /* ED might have been unlinked through another path */
 762                 while (*ed_p != 0) {
 763                         if (((struct ed *)
 764                                         m32_swap((unsigned long)ed_p)) == ed) {
 765                                 *ed_p = ed->hwNextED;
 766 #ifdef CONFIG_DM_USB
 767                                 aligned_ed_p = (unsigned long)ed_p;
 768                                 aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
 769                                 flush_dcache_range(aligned_ed_p,
 770                                         aligned_ed_p + ARCH_DMA_MINALIGN);
 771 #endif
 772                                 break;
 773                         }
 774                         ed_p = &(((struct ed *)
 775                                      m32_swap((unsigned long)ed_p))->hwNextED);
 776                 }
 777         }
 778 }
 779
 780 /* unlink an ed from one of the HC chains.
 781  * just the link to the ed is unlinked.
 782  * the link from the ed still points to another operational ed or 0
 783  * so the HC can eventually finish the processing of the unlinked ed */
 784
 785 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 786 {
 787         volatile ed_t *ed = edi;
 788         int i;
 789
 790         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 791         flush_dcache_ed(ed);
 792
 793         switch (ed->type) {
 794         case PIPE_CONTROL:
 795                 if (ed->ed_prev == NULL) {
 796                         if (!ed->hwNextED) {
 797                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 798                                 ohci_writel(ohci->hc_control,
 799                                             &ohci->regs->control);
 800                         }
 801                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 802                                 &ohci->regs->ed_controlhead);
 803                 } else {
 804                         ed->ed_prev->hwNextED = ed->hwNextED;
 805                         flush_dcache_ed(ed->ed_prev);
 806                 }
 807                 if (ohci->ed_controltail == ed) {
 808                         ohci->ed_controltail = ed->ed_prev;
 809                 } else {
 810                         ((ed_t *)m32_swap(
 811                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 812                 }
 813                 break;
 814
 815         case PIPE_BULK:
 816                 if (ed->ed_prev == NULL) {
 817                         if (!ed->hwNextED) {
 818                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 819                                 ohci_writel(ohci->hc_control,
 820                                             &ohci->regs->control);
 821                         }
 822                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 823                                &ohci->regs->ed_bulkhead);
 824                 } else {
 825                         ed->ed_prev->hwNextED = ed->hwNextED;
 826                         flush_dcache_ed(ed->ed_prev);
 827                 }
 828                 if (ohci->ed_bulktail == ed) {
 829                         ohci->ed_bulktail = ed->ed_prev;
 830                 } else {
 831                         ((ed_t *)m32_swap(
 832                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 833                 }
 834                 break;
 835
 836         case PIPE_INTERRUPT:
 837                 periodic_unlink(ohci, ed, 0, 1);
 838                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 839                     ohci->ohci_int_load[i] -= ed->int_load;
 840                 break;
 841         }
 842         ed->state = ED_UNLINK;
 843         return 0;
 844 }
 845
 846 /*-------------------------------------------------------------------------*/
 847
 848 /* add/reinit an endpoint; this should be done once at the
 849  * usb_set_configuration command, but the USB stack is a little bit
 850  * stateless so we do it at every transaction if the state of the ed
 851  * is ED_NEW then a dummy td is added and the state is changed to
 852  * ED_UNLINK in all other cases the state is left unchanged the ed
 853  * info fields are setted anyway even though most of them should not
 854  * change
 855  */
 856 static ed_t *ep_add_ed(ohci_dev_t *ohci_dev, struct usb_device *usb_dev,
 857                        unsigned long pipe, int interval, int load)
 858 {
 859         td_t *td;
 860         ed_t *ed_ret;
 861         volatile ed_t *ed;
 862
 863         ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) |
 864                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 865
 866         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 867                 err("ep_add_ed: pending delete");
 868                 /* pending delete request */
 869                 return NULL;
 870         }
 871
 872         if (ed->state == ED_NEW) {
 873                 /* dummy td; end of td list for ed */
 874                 td = td_alloc(ohci_dev, usb_dev);
 875                 ed->hwTailP = m32_swap((unsigned long)td);
 876                 ed->hwHeadP = ed->hwTailP;
 877                 ed->state = ED_UNLINK;
 878                 ed->type = usb_pipetype(pipe);
 879                 ohci_dev->ed_cnt++;
 880         }
 881
 882         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 883                         | usb_pipeendpoint(pipe) << 7
 884                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 885                         | (usb_pipecontrol(pipe)? 0: \
 886                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 887                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 888                         | usb_maxpacket(usb_dev, pipe) << 16);
 889
 890         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 891                 ed->int_period = interval;
 892                 ed->int_load = load;
 893         }
 894
 895         flush_dcache_ed(ed);
 896
 897         return ed_ret;
 898 }
 899
 900 /*-------------------------------------------------------------------------*
 901  * TD handling functions
 902  *-------------------------------------------------------------------------*/
 903
 904 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 905
 906 static void td_fill(ohci_t *ohci, unsigned int info,
 907         void *data, int len,
 908         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 909 {
 910         volatile td_t  *td, *td_pt;
 911 #ifdef OHCI_FILL_TRACE
 912         int i;
 913 #endif
 914
 915         if (index > urb_priv->length) {
 916                 err("index > length");
 917                 return;
 918         }
 919         /* use this td as the next dummy */
 920         td_pt = urb_priv->td [index];
 921         td_pt->hwNextTD = 0;
 922         flush_dcache_td(td_pt);
 923
 924         /* fill the old dummy TD */
 925         td = urb_priv->td [index] =
 926                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 927
 928         td->ed = urb_priv->ed;
 929         td->next_dl_td = NULL;
 930         td->index = index;
 931         td->data = (__u32)data;
 932 #ifdef OHCI_FILL_TRACE
 933         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 934                 for (i = 0; i < len; i++)
 935                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 936                 printf("\n");
 937         }
 938 #endif
 939         if (!len)
 940                 data = 0;
 941
 942         td->hwINFO = m32_swap(info);
 943         td->hwCBP = m32_swap((unsigned long)data);
 944         if (data)
 945                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 946         else
 947                 td->hwBE = 0;
 948
 949         td->hwNextTD = m32_swap((unsigned long)td_pt);
 950         flush_dcache_td(td);
 951
 952         /* append to queue */
 953         td->ed->hwTailP = td->hwNextTD;
 954         flush_dcache_ed(td->ed);
 955 }
 956
 957 /*-------------------------------------------------------------------------*/
 958
 959 /* prepare all TDs of a transfer */
 960
 961 static void td_submit_job(ohci_t *ohci, struct usb_device *dev,
 962                           unsigned long pipe, void *buffer, int transfer_len,
 963                           struct devrequest *setup, urb_priv_t *urb,
 964                           int interval)
 965 {
 966         int data_len = transfer_len;
 967         void *data;
 968         int cnt = 0;
 969         __u32 info = 0;
 970         unsigned int toggle = 0;
 971
 972         flush_dcache_buffer(buffer, data_len);
 973
 974         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 975          * bits for reseting */
 976         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 977                 toggle = TD_T_TOGGLE;
 978         } else {
 979                 toggle = TD_T_DATA0;
 980                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 981                                 usb_pipeout(pipe), 1);
 982         }
 983         urb->td_cnt = 0;
 984         if (data_len)
 985                 data = buffer;
 986         else
 987                 data = 0;
 988
 989         switch (usb_pipetype(pipe)) {
 990         case PIPE_BULK:
 991                 info = usb_pipeout(pipe)?
 992                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 993                 while (data_len > 4096) {
 994                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 995                                 data, 4096, dev, cnt, urb);
 996                         data += 4096; data_len -= 4096; cnt++;
 997                 }
 998                 info = usb_pipeout(pipe)?
 999                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
1000                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
1001                         data_len, dev, cnt, urb);
1002                 cnt++;
1003
1004                 if (!ohci->sleeping) {
1005                         /* start bulk list */
1006                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
1007                 }
1008                 break;
1009
1010         case PIPE_CONTROL:
1011                 /* Setup phase */
1012                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1013                 flush_dcache_buffer(setup, 8);
1014                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
1015
1016                 /* Optional Data phase */
1017                 if (data_len > 0) {
1018                         info = usb_pipeout(pipe)?
1019                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
1020                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1021                         /* NOTE:  mishandles transfers >8K, some >4K */
1022                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1023                 }
1024
1025                 /* Status phase */
1026                 info = (usb_pipeout(pipe) || data_len == 0) ?
1027                         TD_CC | TD_DP_IN | TD_T_DATA1:
1028                         TD_CC | TD_DP_OUT | TD_T_DATA1;
1029                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
1030
1031                 if (!ohci->sleeping) {
1032                         /* start Control list */
1033                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
1034                 }
1035                 break;
1036
1037         case PIPE_INTERRUPT:
1038                 info = usb_pipeout(urb->pipe)?
1039                         TD_CC | TD_DP_OUT | toggle:
1040                         TD_CC | TD_R | TD_DP_IN | toggle;
1041                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
1042                 break;
1043         }
1044         if (urb->length != cnt)
1045                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
1046 }
1047
1048 /*-------------------------------------------------------------------------*
1049  * Done List handling functions
1050  *-------------------------------------------------------------------------*/
1051
1052 /* calculate the transfer length and update the urb */
1053
1054 static void dl_transfer_length(td_t *td)
1055 {
1056         __u32 tdBE, tdCBP;
1057         urb_priv_t *lurb_priv = td->ed->purb;
1058
1059         tdBE   = m32_swap(td->hwBE);
1060         tdCBP  = m32_swap(td->hwCBP);
1061
1062         if (!(usb_pipecontrol(lurb_priv->pipe) &&
1063             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
1064                 if (tdBE != 0) {
1065                         if (td->hwCBP == 0)
1066                                 lurb_priv->actual_length += tdBE - td->data + 1;
1067                         else
1068                                 lurb_priv->actual_length += tdCBP - td->data;
1069                 }
1070         }
1071 }
1072
1073 /*-------------------------------------------------------------------------*/
1074 static void check_status(td_t *td_list)
1075 {
1076         urb_priv_t *lurb_priv = td_list->ed->purb;
1077         int        urb_len    = lurb_priv->length;
1078         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1079         int        cc;
1080
1081         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1082         if (cc) {
1083                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1084
1085                 invalidate_dcache_ed(td_list->ed);
1086                 if (*phwHeadP & m32_swap(0x1)) {
1087                         if (lurb_priv &&
1088                             ((td_list->index + 1) < urb_len)) {
1089                                 *phwHeadP =
1090                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1091                                                         m32_swap(0xfffffff0)) |
1092                                                    (*phwHeadP & m32_swap(0x2));
1093
1094                                 lurb_priv->td_cnt += urb_len -
1095                                                      td_list->index - 1;
1096                         } else
1097                                 *phwHeadP &= m32_swap(0xfffffff2);
1098                         flush_dcache_ed(td_list->ed);
1099                 }
1100 #ifdef CONFIG_MPC5200
1101                 td_list->hwNextTD = 0;
1102                 flush_dcache_td(td_list);
1103 #endif
1104         }
1105 }
1106
1107 /* replies to the request have to be on a FIFO basis so
1108  * we reverse the reversed done-list */
1109 static td_t *dl_reverse_done_list(ohci_t *ohci)
1110 {
1111         __u32 td_list_hc;
1112         td_t *td_rev = NULL;
1113         td_t *td_list = NULL;
1114
1115         invalidate_dcache_hcca(ohci->hcca);
1116         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1117         ohci->hcca->done_head = 0;
1118         flush_dcache_hcca(ohci->hcca);
1119
1120         while (td_list_hc) {
1121                 td_list = (td_t *)td_list_hc;
1122                 invalidate_dcache_td(td_list);
1123                 check_status(td_list);
1124                 td_list->next_dl_td = td_rev;
1125                 td_rev = td_list;
1126                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1127         }
1128         return td_list;
1129 }
1130
1131 /*-------------------------------------------------------------------------*/
1132 /*-------------------------------------------------------------------------*/
1133
1134 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1135 {
1136         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1137                 urb->finished = 1;
1138         else
1139                 dbg("finish_urb: strange.., ED state %x, \n", status);
1140 }
1141
1142 /*
1143  * Used to take back a TD from the host controller. This would normally be
1144  * called from within dl_done_list, however it may be called directly if the
1145  * HC no longer sees the TD and it has not appeared on the donelist (after
1146  * two frames).  This bug has been observed on ZF Micro systems.
1147  */
1148 static int takeback_td(ohci_t *ohci, td_t *td_list)
1149 {
1150         ed_t *ed;
1151         int cc;
1152         int stat = 0;
1153         /* urb_t *urb; */
1154         urb_priv_t *lurb_priv;
1155         __u32 tdINFO, edHeadP, edTailP;
1156
1157         invalidate_dcache_td(td_list);
1158         tdINFO = m32_swap(td_list->hwINFO);
1159
1160         ed = td_list->ed;
1161         lurb_priv = ed->purb;
1162
1163         dl_transfer_length(td_list);
1164
1165         lurb_priv->td_cnt++;
1166
1167         /* error code of transfer */
1168         cc = TD_CC_GET(tdINFO);
1169         if (cc) {
1170                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1171                 stat = cc_to_error[cc];
1172         }
1173
1174         /* see if this done list makes for all TD's of current URB,
1175         * and mark the URB finished if so */
1176         if (lurb_priv->td_cnt == lurb_priv->length)
1177                 finish_urb(ohci, lurb_priv, ed->state);
1178
1179         dbg("dl_done_list: processing TD %x, len %x\n",
1180                 lurb_priv->td_cnt, lurb_priv->length);
1181
1182         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1183                 invalidate_dcache_ed(ed);
1184                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1185                 edTailP = m32_swap(ed->hwTailP);
1186
1187                 /* unlink eds if they are not busy */
1188                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1189                         ep_unlink(ohci, ed);
1190         }
1191         return stat;
1192 }
1193
1194 static int dl_done_list(ohci_t *ohci)
1195 {
1196         int stat = 0;
1197         td_t    *td_list = dl_reverse_done_list(ohci);
1198
1199         while (td_list) {
1200                 td_t    *td_next = td_list->next_dl_td;
1201                 stat = takeback_td(ohci, td_list);
1202                 td_list = td_next;
1203         }
1204         return stat;
1205 }
1206
1207 /*-------------------------------------------------------------------------*
1208  * Virtual Root Hub
1209  *-------------------------------------------------------------------------*/
1210
1211 #include <usbroothubdes.h>
1212
1213 /* Hub class-specific descriptor is constructed dynamically */
1214
1215 /*-------------------------------------------------------------------------*/
1216
1217 #define OK(x)                   len = (x); break
1218 #ifdef DEBUG
1219 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1220                                                 &ohci->regs->roothub.status); }
1221 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1222         (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1223 #else
1224 #define WR_RH_STAT(x)           ohci_writel((x), &ohci->regs->roothub.status)
1225 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1226                                     &ohci->regs->roothub.portstatus[wIndex-1])
1227 #endif
1228 #define RD_RH_STAT              roothub_status(ohci)
1229 #define RD_RH_PORTSTAT          roothub_portstatus(ohci, wIndex-1)
1230
1231 /* request to virtual root hub */
1232
1233 int rh_check_port_status(ohci_t *controller)
1234 {
1235         __u32 temp, ndp, i;
1236         int res;
1237
1238         res = -1;
1239         temp = roothub_a(controller);
1240         ndp = (temp & RH_A_NDP);
1241 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1242         ndp = (ndp == 2) ? 1:0;
1243 #endif
1244         for (i = 0; i < ndp; i++) {
1245                 temp = roothub_portstatus(controller, i);
1246                 /* check for a device disconnect */
1247                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1248                         (RH_PS_PESC | RH_PS_CSC)) &&
1249                         ((temp & RH_PS_CCS) == 0)) {
1250                         res = i;
1251                         break;
1252                 }
1253         }
1254         return res;
1255 }
1256
1257 static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev,
1258         unsigned long pipe, void *buffer, int transfer_len,
1259         struct devrequest *cmd)
1260 {
1261         void *data = buffer;
1262         int leni = transfer_len;
1263         int len = 0;
1264         int stat = 0;
1265         __u16 bmRType_bReq;
1266         __u16 wValue;
1267         __u16 wIndex;
1268         __u16 wLength;
1269         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1270
1271 #ifdef DEBUG
1272 pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1273           cmd, "SUB(rh)", usb_pipein(pipe));
1274 #else
1275         ohci_mdelay(1);
1276 #endif
1277         if (usb_pipeint(pipe)) {
1278                 info("Root-Hub submit IRQ: NOT implemented");
1279                 return 0;
1280         }
1281
1282         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1283         wValue        = le16_to_cpu(cmd->value);
1284         wIndex        = le16_to_cpu(cmd->index);
1285         wLength       = le16_to_cpu(cmd->length);
1286
1287         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1288                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1289
1290         switch (bmRType_bReq) {
1291         /* Request Destination:
1292            without flags: Device,
1293            RH_INTERFACE: interface,
1294            RH_ENDPOINT: endpoint,
1295            RH_CLASS means HUB here,
1296            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1297         */
1298
1299         case RH_GET_STATUS:
1300                 *(u16 *)databuf = cpu_to_le16(1);
1301                 OK(2);
1302         case RH_GET_STATUS | RH_INTERFACE:
1303                 *(u16 *)databuf = cpu_to_le16(0);
1304                 OK(2);
1305         case RH_GET_STATUS | RH_ENDPOINT:
1306                 *(u16 *)databuf = cpu_to_le16(0);
1307                 OK(2);
1308         case RH_GET_STATUS | RH_CLASS:
1309                 *(u32 *)databuf = cpu_to_le32(
1310                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1311                 OK(4);
1312         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1313                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1314                 OK(4);
1315
1316         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1317                 switch (wValue) {
1318                 case (RH_ENDPOINT_STALL):
1319                         OK(0);
1320                 }
1321                 break;
1322
1323         case RH_CLEAR_FEATURE | RH_CLASS:
1324                 switch (wValue) {
1325                 case RH_C_HUB_LOCAL_POWER:
1326                         OK(0);
1327                 case (RH_C_HUB_OVER_CURRENT):
1328                         WR_RH_STAT(RH_HS_OCIC);
1329                         OK(0);
1330                 }
1331                 break;
1332
1333         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1334                 switch (wValue) {
1335                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1336                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1337                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1338                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1339                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1340                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1341                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1342                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1343                 }
1344                 break;
1345
1346         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1347                 switch (wValue) {
1348                 case (RH_PORT_SUSPEND):
1349                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1350                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1351                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1352                                 WR_RH_PORTSTAT(RH_PS_PRS);
1353                         OK(0);
1354                 case (RH_PORT_POWER):
1355                         WR_RH_PORTSTAT(RH_PS_PPS);
1356                         OK(0);
1357                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1358                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1359                                 WR_RH_PORTSTAT(RH_PS_PES);
1360                         OK(0);
1361                 }
1362                 break;
1363
1364         case RH_SET_ADDRESS:
1365                 ohci->rh.devnum = wValue;
1366                 OK(0);
1367
1368         case RH_GET_DESCRIPTOR:
1369                 switch ((wValue & 0xff00) >> 8) {
1370                 case (0x01): /* device descriptor */
1371                         len = min_t(unsigned int,
1372                                         leni,
1373                                         min_t(unsigned int,
1374                                         sizeof(root_hub_dev_des),
1375                                         wLength));
1376                         databuf = root_hub_dev_des; OK(len);
1377                 case (0x02): /* configuration descriptor */
1378                         len = min_t(unsigned int,
1379                                         leni,
1380                                         min_t(unsigned int,
1381                                         sizeof(root_hub_config_des),
1382                                         wLength));
1383                         databuf = root_hub_config_des; OK(len);
1384                 case (0x03): /* string descriptors */
1385                         if (wValue == 0x0300) {
1386                                 len = min_t(unsigned int,
1387                                                 leni,
1388                                                 min_t(unsigned int,
1389                                                 sizeof(root_hub_str_index0),
1390                                                 wLength));
1391                                 databuf = root_hub_str_index0;
1392                                 OK(len);
1393                         }
1394                         if (wValue == 0x0301) {
1395                                 len = min_t(unsigned int,
1396                                                 leni,
1397                                                 min_t(unsigned int,
1398                                                 sizeof(root_hub_str_index1),
1399                                                 wLength));
1400                                 databuf = root_hub_str_index1;
1401                                 OK(len);
1402                 }
1403                 default:
1404                         stat = USB_ST_STALLED;
1405                 }
1406                 break;
1407
1408         case RH_GET_DESCRIPTOR | RH_CLASS:
1409         {
1410                 __u32 temp = roothub_a(ohci);
1411
1412                 databuf[0] = 9;         /* min length; */
1413                 databuf[1] = 0x29;
1414                 databuf[2] = temp & RH_A_NDP;
1415 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1416                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1417 #endif
1418                 databuf[3] = 0;
1419                 if (temp & RH_A_PSM)    /* per-port power switching? */
1420                         databuf[3] |= 0x1;
1421                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1422                         databuf[3] |= 0x10;
1423                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1424                         databuf[3] |= 0x8;
1425
1426                 databuf[4] = 0;
1427                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1428                 databuf[6] = 0;
1429                 temp = roothub_b(ohci);
1430                 databuf[7] = temp & RH_B_DR;
1431                 if (databuf[2] < 7) {
1432                         databuf[8] = 0xff;
1433                 } else {
1434                         databuf[0] += 2;
1435                         databuf[8] = (temp & RH_B_DR) >> 8;
1436                         databuf[10] = databuf[9] = 0xff;
1437                 }
1438
1439                 len = min_t(unsigned int, leni,
1440                             min_t(unsigned int, databuf[0], wLength));
1441                 OK(len);
1442         }
1443
1444         case RH_GET_CONFIGURATION:
1445                 databuf[0] = 0x01;
1446                 OK(1);
1447
1448         case RH_SET_CONFIGURATION:
1449                 WR_RH_STAT(0x10000);
1450                 OK(0);
1451
1452         default:
1453                 dbg("unsupported root hub command");
1454                 stat = USB_ST_STALLED;
1455         }
1456
1457 #ifdef  DEBUG
1458         ohci_dump_roothub(ohci, 1);
1459 #else
1460         ohci_mdelay(1);
1461 #endif
1462
1463         len = min_t(int, len, leni);
1464         if (data != databuf)
1465                 memcpy(data, databuf, len);
1466         dev->act_len = len;
1467         dev->status = stat;
1468
1469 #ifdef DEBUG
1470         pkt_print(ohci, NULL, dev, pipe, buffer,
1471                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1472 #else
1473         ohci_mdelay(1);
1474 #endif
1475
1476         return stat;
1477 }
1478
1479 /*-------------------------------------------------------------------------*/
1480
1481 static ohci_dev_t *ohci_get_ohci_dev(ohci_t *ohci, int devnum, int intr)
1482 {
1483         int i;
1484
1485         if (!intr)
1486                 return &ohci->ohci_dev;
1487
1488         /* First see if we already have an ohci_dev for this dev. */
1489         for (i = 0; i < NUM_INT_DEVS; i++) {
1490                 if (ohci->int_dev[i].devnum == devnum)
1491                         return &ohci->int_dev[i];
1492         }
1493
1494         /* If not then find a free one. */
1495         for (i = 0; i < NUM_INT_DEVS; i++) {
1496                 if (ohci->int_dev[i].devnum == -1) {
1497                         ohci->int_dev[i].devnum = devnum;
1498                         return &ohci->int_dev[i];
1499                 }
1500         }
1501
1502         printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1503         return NULL;
1504 }
1505
1506 /* common code for handling submit messages - used for all but root hub */
1507 /* accesses. */
1508 static urb_priv_t *ohci_alloc_urb(struct usb_device *dev, unsigned long pipe,
1509                 void *buffer, int transfer_len, int interval)
1510 {
1511         urb_priv_t *urb;
1512
1513         urb = calloc(1, sizeof(urb_priv_t));
1514         if (!urb) {
1515                 printf("ohci: Error out of memory allocating urb\n");
1516                 return NULL;
1517         }
1518
1519         urb->dev = dev;
1520         urb->pipe = pipe;
1521         urb->transfer_buffer = buffer;
1522         urb->transfer_buffer_length = transfer_len;
1523         urb->interval = interval;
1524
1525         return urb;
1526 }
1527
1528 static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
1529                 unsigned long pipe, void *buffer, int transfer_len,
1530                 struct devrequest *setup, int interval)
1531 {
1532         int stat = 0;
1533         int maxsize = usb_maxpacket(dev, pipe);
1534         int timeout;
1535         urb_priv_t *urb;
1536         ohci_dev_t *ohci_dev;
1537
1538         urb = ohci_alloc_urb(dev, pipe, buffer, transfer_len, interval);
1539         if (!urb)
1540                 return -ENOMEM;
1541
1542 #ifdef DEBUG
1543         urb->actual_length = 0;
1544         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1545                   setup, "SUB", usb_pipein(pipe));
1546 #else
1547         ohci_mdelay(1);
1548 #endif
1549         if (!maxsize) {
1550                 err("submit_common_message: pipesize for pipe %lx is zero",
1551                         pipe);
1552                 return -1;
1553         }
1554
1555         ohci_dev = ohci_get_ohci_dev(ohci, dev->devnum, usb_pipeint(pipe));
1556         if (!ohci_dev)
1557                 return -ENOMEM;
1558
1559         if (sohci_submit_job(ohci, ohci_dev, urb, setup) < 0) {
1560                 err("sohci_submit_job failed");
1561                 return -1;
1562         }
1563
1564 #if 0
1565         mdelay(10);
1566         /* ohci_dump_status(ohci); */
1567 #endif
1568
1569         timeout = USB_TIMEOUT_MS(pipe);
1570
1571         /* wait for it to complete */
1572         for (;;) {
1573                 /* check whether the controller is done */
1574                 stat = hc_interrupt(ohci);
1575                 if (stat < 0) {
1576                         stat = USB_ST_CRC_ERR;
1577                         break;
1578                 }
1579
1580                 /* NOTE: since we are not interrupt driven in U-Boot and always
1581                  * handle only one URB at a time, we cannot assume the
1582                  * transaction finished on the first successful return from
1583                  * hc_interrupt().. unless the flag for current URB is set,
1584                  * meaning that all TD's to/from device got actually
1585                  * transferred and processed. If the current URB is not
1586                  * finished we need to re-iterate this loop so as
1587                  * hc_interrupt() gets called again as there needs to be some
1588                  * more TD's to process still */
1589                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1590                         /* 0xff is returned for an SF-interrupt */
1591                         break;
1592                 }
1593
1594                 if (--timeout) {
1595                         mdelay(1);
1596                         if (!urb->finished)
1597                                 dbg("*");
1598
1599                 } else {
1600                         if (!usb_pipeint(pipe))
1601                                 err("CTL:TIMEOUT ");
1602                         dbg("submit_common_msg: TO status %x\n", stat);
1603                         urb->finished = 1;
1604                         stat = USB_ST_CRC_ERR;
1605                         break;
1606                 }
1607         }
1608
1609         dev->status = stat;
1610         dev->act_len = urb->actual_length;
1611
1612         if (usb_pipein(pipe) && dev->status == 0 && dev->act_len)
1613                 invalidate_dcache_buffer(buffer, dev->act_len);
1614
1615 #ifdef DEBUG
1616         pkt_print(ohci, urb, dev, pipe, buffer, transfer_len,
1617                   setup, "RET(ctlr)", usb_pipein(pipe));
1618 #else
1619         ohci_mdelay(1);
1620 #endif
1621         urb_free_priv(urb);
1622         return 0;
1623 }
1624
1625 #define MAX_INT_QUEUESIZE 8
1626
1627 struct int_queue {
1628         int queuesize;
1629         int curr_urb;
1630         urb_priv_t *urb[MAX_INT_QUEUESIZE];
1631 };
1632
1633 static struct int_queue *_ohci_create_int_queue(ohci_t *ohci,
1634                 struct usb_device *udev, unsigned long pipe, int queuesize,
1635                 int elementsize, void *buffer, int interval)
1636 {
1637         struct int_queue *queue;
1638         ohci_dev_t *ohci_dev;
1639         int i;
1640
1641         if (queuesize > MAX_INT_QUEUESIZE)
1642                 return NULL;
1643
1644         ohci_dev = ohci_get_ohci_dev(ohci, udev->devnum, 1);
1645         if (!ohci_dev)
1646                 return NULL;
1647
1648         queue = malloc(sizeof(*queue));
1649         if (!queue) {
1650                 printf("ohci: Error out of memory allocating int queue\n");
1651                 return NULL;
1652         }
1653
1654         for (i = 0; i < queuesize; i++) {
1655                 queue->urb[i] = ohci_alloc_urb(udev, pipe,
1656                                                buffer + i * elementsize,
1657                                                elementsize, interval);
1658                 if (!queue->urb[i])
1659                         break;
1660
1661                 if (sohci_submit_job(ohci, ohci_dev, queue->urb[i], NULL)) {
1662                         printf("ohci: Error submitting int queue job\n");
1663                         urb_free_priv(queue->urb[i]);
1664                         break;
1665                 }
1666         }
1667         if (i == 0) {
1668                 /* We did not succeed in submitting even 1 urb */
1669                 free(queue);
1670                 return NULL;
1671         }
1672
1673         queue->queuesize = i;
1674         queue->curr_urb = 0;
1675
1676         return queue;
1677 }
1678
1679 static void *_ohci_poll_int_queue(ohci_t *ohci, struct usb_device *udev,
1680                                   struct int_queue *queue)
1681 {
1682         if (queue->curr_urb == queue->queuesize)
1683                 return NULL; /* Queue depleted */
1684
1685         if (hc_interrupt(ohci) < 0)
1686                 return NULL;
1687
1688         if (queue->urb[queue->curr_urb]->finished) {
1689                 void *ret = queue->urb[queue->curr_urb]->transfer_buffer;
1690                 queue->curr_urb++;
1691                 return ret;
1692         }
1693
1694         return NULL;
1695 }
1696
1697 static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
1698                                    struct int_queue *queue)
1699 {
1700         int i;
1701
1702         for (i = 0; i < queue->queuesize; i++)
1703                 urb_free_priv(queue->urb[i]);
1704
1705         free(queue);
1706
1707         return 0;
1708 }
1709
1710 #ifndef CONFIG_DM_USB
1711 /* submit routines called from usb.c */
1712 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1713                 int transfer_len)
1714 {
1715         info("submit_bulk_msg");
1716         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len,
1717                                  NULL, 0);
1718 }
1719
1720 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1721                 int transfer_len, int interval)
1722 {
1723         info("submit_int_msg");
1724         return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
1725                         interval);
1726 }
1727
1728 struct int_queue *create_int_queue(struct usb_device *dev,
1729                 unsigned long pipe, int queuesize, int elementsize,
1730                 void *buffer, int interval)
1731 {
1732         return _ohci_create_int_queue(&gohci, dev, pipe, queuesize,
1733                                       elementsize, buffer, interval);
1734 }
1735
1736 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1737 {
1738         return _ohci_poll_int_queue(&gohci, dev, queue);
1739 }
1740
1741 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1742 {
1743         return _ohci_destroy_int_queue(&gohci, dev, queue);
1744 }
1745 #endif
1746
1747 static int _ohci_submit_control_msg(ohci_t *ohci, struct usb_device *dev,
1748         unsigned long pipe, void *buffer, int transfer_len,
1749         struct devrequest *setup)
1750 {
1751         int maxsize = usb_maxpacket(dev, pipe);
1752
1753         info("submit_control_msg");
1754 #ifdef DEBUG
1755         pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len,
1756                   setup, "SUB", usb_pipein(pipe));
1757 #else
1758         ohci_mdelay(1);
1759 #endif
1760         if (!maxsize) {
1761                 err("submit_control_message: pipesize for pipe %lx is zero",
1762                         pipe);
1763                 return -1;
1764         }
1765         if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) {
1766                 ohci->rh.dev = dev;
1767                 /* root hub - redirect */
1768                 return ohci_submit_rh_msg(ohci, dev, pipe, buffer,
1769                                           transfer_len, setup);
1770         }
1771
1772         return submit_common_msg(ohci, dev, pipe, buffer, transfer_len,
1773                                  setup, 0);
1774 }
1775
1776 /*-------------------------------------------------------------------------*
1777  * HC functions
1778  *-------------------------------------------------------------------------*/
1779
1780 /* reset the HC and BUS */
1781
1782 static int hc_reset(ohci_t *ohci)
1783 {
1784 #ifdef CONFIG_PCI_EHCI_DEVNO
1785         pci_dev_t pdev;
1786 #endif
1787         int timeout = 30;
1788         int smm_timeout = 50; /* 0,5 sec */
1789
1790         dbg("%s\n", __FUNCTION__);
1791
1792 #ifdef CONFIG_PCI_EHCI_DEVNO
1793         /*
1794          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1795          * resetting via EHCI registers only.
1796          */
1797         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1798         if (pdev != -1) {
1799                 u32 base;
1800                 int timeout = 1000;
1801
1802                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1803                 base += EHCI_USBCMD_OFF;
1804                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1805
1806                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1807                         if (timeout-- <= 0) {
1808                                 printf("USB RootHub reset timed out!");
1809                                 break;
1810                         }
1811                         udelay(1);
1812                 }
1813         } else
1814                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1815 #endif
1816         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1817                 /* SMM owns the HC, request ownership */
1818                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1819                 info("USB HC TakeOver from SMM");
1820                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1821                         mdelay(10);
1822                         if (--smm_timeout == 0) {
1823                                 err("USB HC TakeOver failed!");
1824                                 return -1;
1825                         }
1826                 }
1827         }
1828
1829         /* Disable HC interrupts */
1830         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1831
1832         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1833                 ohci->slot_name,
1834                 ohci_readl(&ohci->regs->control));
1835
1836         /* Reset USB (needed by some controllers) */
1837         ohci->hc_control = 0;
1838         ohci_writel(ohci->hc_control, &ohci->regs->control);
1839
1840         /* HC Reset requires max 10 us delay */
1841         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1842         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1843                 if (--timeout == 0) {
1844                         err("USB HC reset timed out!");
1845                         return -1;
1846                 }
1847                 udelay(1);
1848         }
1849         return 0;
1850 }
1851
1852 /*-------------------------------------------------------------------------*/
1853
1854 /* Start an OHCI controller, set the BUS operational
1855  * enable interrupts
1856  * connect the virtual root hub */
1857
1858 static int hc_start(ohci_t *ohci)
1859 {
1860         __u32 mask;
1861         unsigned int fminterval;
1862         int i;
1863
1864         ohci->disabled = 1;
1865         for (i = 0; i < NUM_INT_DEVS; i++)
1866                 ohci->int_dev[i].devnum = -1;
1867
1868         /* Tell the controller where the control and bulk lists are
1869          * The lists are empty now. */
1870
1871         ohci_writel(0, &ohci->regs->ed_controlhead);
1872         ohci_writel(0, &ohci->regs->ed_bulkhead);
1873
1874         ohci_writel((__u32)ohci->hcca,
1875                     &ohci->regs->hcca); /* reset clears this */
1876
1877         fminterval = 0x2edf;
1878         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1879         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1880         ohci_writel(fminterval, &ohci->regs->fminterval);
1881         ohci_writel(0x628, &ohci->regs->lsthresh);
1882
1883         /* start controller operations */
1884         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1885         ohci->disabled = 0;
1886         ohci_writel(ohci->hc_control, &ohci->regs->control);
1887
1888         /* disable all interrupts */
1889         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1890                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1891                         OHCI_INTR_OC | OHCI_INTR_MIE);
1892         ohci_writel(mask, &ohci->regs->intrdisable);
1893         /* clear all interrupts */
1894         mask &= ~OHCI_INTR_MIE;
1895         ohci_writel(mask, &ohci->regs->intrstatus);
1896         /* Choose the interrupts we care about now  - but w/o MIE */
1897         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1898         ohci_writel(mask, &ohci->regs->intrenable);
1899
1900 #ifdef  OHCI_USE_NPS
1901         /* required for AMD-756 and some Mac platforms */
1902         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1903                 &ohci->regs->roothub.a);
1904         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1905 #endif  /* OHCI_USE_NPS */
1906
1907         /* connect the virtual root hub */
1908         ohci->rh.devnum = 0;
1909
1910         return 0;
1911 }
1912
1913 /*-------------------------------------------------------------------------*/
1914
1915 /* an interrupt happens */
1916
1917 static int hc_interrupt(ohci_t *ohci)
1918 {
1919         struct ohci_regs *regs = ohci->regs;
1920         int ints;
1921         int stat = -1;
1922
1923         invalidate_dcache_hcca(ohci->hcca);
1924
1925         if ((ohci->hcca->done_head != 0) &&
1926                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1927                 ints =  OHCI_INTR_WDH;
1928         } else {
1929                 ints = ohci_readl(&regs->intrstatus);
1930                 if (ints == ~(u32)0) {
1931                         ohci->disabled++;
1932                         err("%s device removed!", ohci->slot_name);
1933                         return -1;
1934                 } else {
1935                         ints &= ohci_readl(&regs->intrenable);
1936                         if (ints == 0) {
1937                                 dbg("hc_interrupt: returning..\n");
1938                                 return 0xff;
1939                         }
1940                 }
1941         }
1942
1943         /* dbg("Interrupt: %x frame: %x", ints,
1944                                         le16_to_cpu(ohci->hcca->frame_no)); */
1945
1946         if (ints & OHCI_INTR_RHSC)
1947                 stat = 0xff;
1948
1949         if (ints & OHCI_INTR_UE) {
1950                 ohci->disabled++;
1951                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1952                         ohci->slot_name);
1953                 /* e.g. due to PCI Master/Target Abort */
1954
1955 #ifdef  DEBUG
1956                 ohci_dump(ohci, 1);
1957 #else
1958                 ohci_mdelay(1);
1959 #endif
1960                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1961                 /* Make some non-interrupt context restart the controller. */
1962                 /* Count and limit the retries though; either hardware or */
1963                 /* software errors can go forever... */
1964                 hc_reset(ohci);
1965                 return -1;
1966         }
1967
1968         if (ints & OHCI_INTR_WDH) {
1969                 ohci_mdelay(1);
1970                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1971                 (void)ohci_readl(&regs->intrdisable); /* flush */
1972                 stat = dl_done_list(ohci);
1973                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1974                 (void)ohci_readl(&regs->intrdisable); /* flush */
1975         }
1976
1977         if (ints & OHCI_INTR_SO) {
1978                 dbg("USB Schedule overrun\n");
1979                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1980                 stat = -1;
1981         }
1982
1983         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1984         if (ints & OHCI_INTR_SF) {
1985                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1986                 mdelay(1);
1987                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1988                 if (ohci->ed_rm_list[frame] != NULL)
1989                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1990                 stat = 0xff;
1991         }
1992
1993         ohci_writel(ints, &regs->intrstatus);
1994         return stat;
1995 }
1996
1997 /*-------------------------------------------------------------------------*/
1998
1999 #ifndef CONFIG_DM_USB
2000
2001 /*-------------------------------------------------------------------------*/
2002
2003 /* De-allocate all resources.. */
2004
2005 static void hc_release_ohci(ohci_t *ohci)
2006 {
2007         dbg("USB HC release ohci usb-%s", ohci->slot_name);
2008
2009         if (!ohci->disabled)
2010                 hc_reset(ohci);
2011 }
2012
2013 /*-------------------------------------------------------------------------*/
2014
2015 /*
2016  * low level initalisation routine, called from usb.c
2017  */
2018 static char ohci_inited = 0;
2019
2020 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
2021 {
2022 #ifdef CONFIG_PCI_OHCI
2023         pci_dev_t pdev;
2024 #endif
2025
2026 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2027         /* cpu dependant init */
2028         if (usb_cpu_init())
2029                 return -1;
2030 #endif
2031
2032 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2033         /*  board dependant init */
2034         if (board_usb_init(index, USB_INIT_HOST))
2035                 return -1;
2036 #endif
2037         memset(&gohci, 0, sizeof(ohci_t));
2038
2039         /* align the storage */
2040         if ((__u32)&ghcca[0] & 0xff) {
2041                 err("HCCA not aligned!!");
2042                 return -1;
2043         }
2044         gohci.hcca = &ghcca[0];
2045         info("aligned ghcca %p", gohci.hcca);
2046         memset(gohci.hcca, 0, sizeof(struct ohci_hcca));
2047
2048         gohci.disabled = 1;
2049         gohci.sleeping = 0;
2050         gohci.irq = -1;
2051 #ifdef CONFIG_PCI_OHCI
2052         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
2053
2054         if (pdev != -1) {
2055                 u16 vid, did;
2056                 u32 base;
2057                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
2058                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
2059                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2060                                 vid, did, (pdev >> 16) & 0xff,
2061                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
2062                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
2063                 printf("OHCI regs address 0x%08x\n", base);
2064                 gohci.regs = (struct ohci_regs *)base;
2065         } else
2066                 return -1;
2067 #else
2068         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
2069 #endif
2070
2071         gohci.flags = 0;
2072         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
2073
2074         if (hc_reset (&gohci) < 0) {
2075                 hc_release_ohci (&gohci);
2076                 err ("can't reset usb-%s", gohci.slot_name);
2077 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2078                 /* board dependant cleanup */
2079                 board_usb_cleanup(index, USB_INIT_HOST);
2080 #endif
2081
2082 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2083                 /* cpu dependant cleanup */
2084                 usb_cpu_init_fail();
2085 #endif
2086                 return -1;
2087         }
2088
2089         if (hc_start(&gohci) < 0) {
2090                 err("can't start usb-%s", gohci.slot_name);
2091                 hc_release_ohci(&gohci);
2092                 /* Initialization failed */
2093 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2094                 /* board dependant cleanup */
2095                 usb_board_stop();
2096 #endif
2097
2098 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2099                 /* cpu dependant cleanup */
2100                 usb_cpu_stop();
2101 #endif
2102                 return -1;
2103         }
2104
2105 #ifdef  DEBUG
2106         ohci_dump(&gohci, 1);
2107 #else
2108         ohci_mdelay(1);
2109 #endif
2110         ohci_inited = 1;
2111         return 0;
2112 }
2113
2114 int usb_lowlevel_stop(int index)
2115 {
2116         /* this gets called really early - before the controller has */
2117         /* even been initialized! */
2118         if (!ohci_inited)
2119                 return 0;
2120         /* TODO release any interrupts, etc. */
2121         /* call hc_release_ohci() here ? */
2122         hc_reset(&gohci);
2123
2124 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2125         /* board dependant cleanup */
2126         if (usb_board_stop())
2127                 return -1;
2128 #endif
2129
2130 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2131         /* cpu dependant cleanup */
2132         if (usb_cpu_stop())
2133                 return -1;
2134 #endif
2135         /* This driver is no longer initialised. It needs a new low-level
2136          * init (board/cpu) before it can be used again. */
2137         ohci_inited = 0;
2138         return 0;
2139 }
2140
2141 int submit_control_msg(struct usb_device *dev, unsigned long pipe,
2142         void *buffer, int transfer_len, struct devrequest *setup)
2143 {
2144         return _ohci_submit_control_msg(&gohci, dev, pipe, buffer,
2145                                         transfer_len, setup);
2146 }
2147 #endif
2148
2149 #ifdef CONFIG_DM_USB
2150 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
2151                                    unsigned long pipe, void *buffer, int length,
2152                                    struct devrequest *setup)
2153 {
2154         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2155
2156         return _ohci_submit_control_msg(ohci, udev, pipe, buffer,
2157                                         length, setup);
2158 }
2159
2160 static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
2161                                 unsigned long pipe, void *buffer, int length)
2162 {
2163         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2164
2165         return submit_common_msg(ohci, udev, pipe, buffer, length, NULL, 0);
2166 }
2167
2168 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
2169                                unsigned long pipe, void *buffer, int length,
2170                                int interval)
2171 {
2172         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2173
2174         return submit_common_msg(ohci, udev, pipe, buffer, length,
2175                                  NULL, interval);
2176 }
2177
2178 static struct int_queue *ohci_create_int_queue(struct udevice *dev,
2179                 struct usb_device *udev, unsigned long pipe, int queuesize,
2180                 int elementsize, void *buffer, int interval)
2181 {
2182         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2183
2184         return _ohci_create_int_queue(ohci, udev, pipe, queuesize, elementsize,
2185                                       buffer, interval);
2186 }
2187
2188 static void *ohci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
2189                                  struct int_queue *queue)
2190 {
2191         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2192
2193         return _ohci_poll_int_queue(ohci, udev, queue);
2194 }
2195
2196 static int ohci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
2197                                   struct int_queue *queue)
2198 {
2199         ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
2200
2201         return _ohci_destroy_int_queue(ohci, udev, queue);
2202 }
2203
2204 int ohci_register(struct udevice *dev, struct ohci_regs *regs)
2205 {
2206         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
2207         ohci_t *ohci = dev_get_priv(dev);
2208         u32 reg;
2209
2210         priv->desc_before_addr = true;
2211
2212         ohci->regs = regs;
2213         ohci->hcca = memalign(256, sizeof(struct ohci_hcca));
2214         if (!ohci->hcca)
2215                 return -ENOMEM;
2216         memset(ohci->hcca, 0, sizeof(struct ohci_hcca));
2217
2218         if (hc_reset(ohci) < 0)
2219                 return -EIO;
2220
2221         if (hc_start(ohci) < 0)
2222                 return -EIO;
2223
2224         reg = ohci_readl(&regs->revision);
2225         printf("USB OHCI %x.%x\n", (reg >> 4) & 0xf, reg & 0xf);
2226
2227         return 0;
2228 }
2229
2230 int ohci_deregister(struct udevice *dev)
2231 {
2232         ohci_t *ohci = dev_get_priv(dev);
2233
2234         if (hc_reset(ohci) < 0)
2235                 return -EIO;
2236
2237         free(ohci->hcca);
2238
2239         return 0;
2240 }
2241
2242 struct dm_usb_ops ohci_usb_ops = {
2243         .control = ohci_submit_control_msg,
2244         .bulk = ohci_submit_bulk_msg,
2245         .interrupt = ohci_submit_int_msg,
2246         .create_int_queue = ohci_create_int_queue,
2247         .poll_int_queue = ohci_poll_int_queue,
2248         .destroy_int_queue = ohci_destroy_int_queue,
2249 };
2250
2251 #endif