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include: move various macros to include/linux/kernel.h
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1 /*
2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
3  *
4  * Interrupt support is added. Now, it has been tested
5  * on ULI1575 chip and works well with USB keyboard.
6  *
7  * (C) Copyright 2007
8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
9  *
10  * (C) Copyright 2003
11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
12  *
13  * Note: Much of this code has been derived from Linux 2.4
14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15  * (C) Copyright 2000-2002 David Brownell
16  *
17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18  * ebenard@eukrea.com - based on s3c24x0's driver
19  *
20  * SPDX-License-Identifier:     GPL-2.0+
21  */
22 /*
23  * IMPORTANT NOTES
24  * 1 - Read doc/README.generic_usb_ohci
25  * 2 - this driver is intended for use with USB Mass Storage Devices
26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
28  *     to activate workaround for bug #41 or this driver will NOT work!
29  */
30
31 #include <common.h>
32 #include <asm/byteorder.h>
33
34 #if defined(CONFIG_PCI_OHCI)
35 # include <pci.h>
36 #if !defined(CONFIG_PCI_OHCI_DEVNO)
37 #define CONFIG_PCI_OHCI_DEVNO   0
38 #endif
39 #endif
40
41 #include <malloc.h>
42 #include <usb.h>
43
44 #include "ohci.h"
45
46 #ifdef CONFIG_AT91RM9200
47 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
48 #endif
49
50 #if defined(CONFIG_CPU_ARM920T) || \
51     defined(CONFIG_S3C24X0) || \
52     defined(CONFIG_440EP) || \
53     defined(CONFIG_PCI_OHCI) || \
54     defined(CONFIG_MPC5200) || \
55     defined(CONFIG_SYS_OHCI_USE_NPS)
56 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
57 #endif
58
59 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
60 #undef DEBUG
61 #undef SHOW_INFO
62 #undef OHCI_FILL_TRACE
63
64 /* For initializing controller (mask in an HCFS mode too) */
65 #define OHCI_CONTROL_INIT \
66         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
67
68 #ifdef CONFIG_PCI_OHCI
69 static struct pci_device_id ohci_pci_ids[] = {
70         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
71         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
72         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
73         /* Please add supported PCI OHCI controller ids here */
74         {0, 0}
75 };
76 #endif
77
78 #ifdef CONFIG_PCI_EHCI_DEVNO
79 static struct pci_device_id ehci_pci_ids[] = {
80         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
81         /* Please add supported PCI EHCI controller ids here */
82         {0, 0}
83 };
84 #endif
85
86 #ifdef DEBUG
87 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
88 #else
89 #define dbg(format, arg...) do {} while (0)
90 #endif /* DEBUG */
91 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
92 #ifdef SHOW_INFO
93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
94 #else
95 #define info(format, arg...) do {} while (0)
96 #endif
97
98 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
99 # define m16_swap(x) cpu_to_be16(x)
100 # define m32_swap(x) cpu_to_be32(x)
101 #else
102 # define m16_swap(x) cpu_to_le16(x)
103 # define m32_swap(x) cpu_to_le32(x)
104 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
105
106 /* global ohci_t */
107 static ohci_t gohci;
108 /* this must be aligned to a 256 byte boundary */
109 struct ohci_hcca ghcca[1];
110 /* a pointer to the aligned storage */
111 struct ohci_hcca *phcca;
112 /* this allocates EDs for all possible endpoints */
113 struct ohci_device ohci_dev;
114 /* device which was disconnected */
115 struct usb_device *devgone;
116
117 static inline u32 roothub_a(struct ohci *hc)
118         { return ohci_readl(&hc->regs->roothub.a); }
119 static inline u32 roothub_b(struct ohci *hc)
120         { return ohci_readl(&hc->regs->roothub.b); }
121 static inline u32 roothub_status(struct ohci *hc)
122         { return ohci_readl(&hc->regs->roothub.status); }
123 static inline u32 roothub_portstatus(struct ohci *hc, int i)
124         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
125
126 /* forward declaration */
127 static int hc_interrupt(void);
128 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
129                           void *buffer, int transfer_len,
130                           struct devrequest *setup, urb_priv_t *urb,
131                           int interval);
132
133 /*-------------------------------------------------------------------------*
134  * URB support functions
135  *-------------------------------------------------------------------------*/
136
137 /* free HCD-private data associated with this URB */
138
139 static void urb_free_priv(urb_priv_t *urb)
140 {
141         int             i;
142         int             last;
143         struct td       *td;
144
145         last = urb->length - 1;
146         if (last >= 0) {
147                 for (i = 0; i <= last; i++) {
148                         td = urb->td[i];
149                         if (td) {
150                                 td->usb_dev = NULL;
151                                 urb->td[i] = NULL;
152                         }
153                 }
154         }
155         free(urb);
156 }
157
158 /*-------------------------------------------------------------------------*/
159
160 #ifdef DEBUG
161 static int sohci_get_current_frame_number(struct usb_device *dev);
162
163 /* debug| print the main components of an URB
164  * small: 0) header + data packets 1) just header */
165
166 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
167                       unsigned long pipe, void *buffer, int transfer_len,
168                       struct devrequest *setup, char *str, int small)
169 {
170         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
171                         str,
172                         sohci_get_current_frame_number(dev),
173                         usb_pipedevice(pipe),
174                         usb_pipeendpoint(pipe),
175                         usb_pipeout(pipe)? 'O': 'I',
176                         usb_pipetype(pipe) < 2 ? \
177                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
178                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
179                         (purb ? purb->actual_length : 0),
180                         transfer_len, dev->status);
181 #ifdef  OHCI_VERBOSE_DEBUG
182         if (!small) {
183                 int i, len;
184
185                 if (usb_pipecontrol(pipe)) {
186                         printf(__FILE__ ": cmd(8):");
187                         for (i = 0; i < 8 ; i++)
188                                 printf(" %02x", ((__u8 *) setup) [i]);
189                         printf("\n");
190                 }
191                 if (transfer_len > 0 && buffer) {
192                         printf(__FILE__ ": data(%d/%d):",
193                                 (purb ? purb->actual_length : 0),
194                                 transfer_len);
195                         len = usb_pipeout(pipe)? transfer_len:
196                                         (purb ? purb->actual_length : 0);
197                         for (i = 0; i < 16 && i < len; i++)
198                                 printf(" %02x", ((__u8 *) buffer) [i]);
199                         printf("%s\n", i < len? "...": "");
200                 }
201         }
202 #endif
203 }
204
205 /* just for debugging; prints non-empty branches of the int ed tree
206  * inclusive iso eds */
207 void ep_print_int_eds(ohci_t *ohci, char *str)
208 {
209         int i, j;
210          __u32 *ed_p;
211         for (i = 0; i < 32; i++) {
212                 j = 5;
213                 ed_p = &(ohci->hcca->int_table [i]);
214                 if (*ed_p == 0)
215                     continue;
216                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
217                 while (*ed_p != 0 && j--) {
218                         ed_t *ed = (ed_t *)m32_swap(ed_p);
219                         printf(" ed: %4x;", ed->hwINFO);
220                         ed_p = &ed->hwNextED;
221                 }
222                 printf("\n");
223         }
224 }
225
226 static void ohci_dump_intr_mask(char *label, __u32 mask)
227 {
228         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
229                 label,
230                 mask,
231                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
232                 (mask & OHCI_INTR_OC) ? " OC" : "",
233                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
234                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
235                 (mask & OHCI_INTR_UE) ? " UE" : "",
236                 (mask & OHCI_INTR_RD) ? " RD" : "",
237                 (mask & OHCI_INTR_SF) ? " SF" : "",
238                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
239                 (mask & OHCI_INTR_SO) ? " SO" : ""
240                 );
241 }
242
243 static void maybe_print_eds(char *label, __u32 value)
244 {
245         ed_t *edp = (ed_t *)value;
246
247         if (value) {
248                 dbg("%s %08x", label, value);
249                 dbg("%08x", edp->hwINFO);
250                 dbg("%08x", edp->hwTailP);
251                 dbg("%08x", edp->hwHeadP);
252                 dbg("%08x", edp->hwNextED);
253         }
254 }
255
256 static char *hcfs2string(int state)
257 {
258         switch (state) {
259         case OHCI_USB_RESET:    return "reset";
260         case OHCI_USB_RESUME:   return "resume";
261         case OHCI_USB_OPER:     return "operational";
262         case OHCI_USB_SUSPEND:  return "suspend";
263         }
264         return "?";
265 }
266
267 /* dump control and status registers */
268 static void ohci_dump_status(ohci_t *controller)
269 {
270         struct ohci_regs        *regs = controller->regs;
271         __u32                   temp;
272
273         temp = ohci_readl(&regs->revision) & 0xff;
274         if (temp != 0x10)
275                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
276
277         temp = ohci_readl(&regs->control);
278         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
279                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
280                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
281                 (temp & OHCI_CTRL_IR) ? " IR" : "",
282                 hcfs2string(temp & OHCI_CTRL_HCFS),
283                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
284                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
285                 (temp & OHCI_CTRL_IE) ? " IE" : "",
286                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
287                 temp & OHCI_CTRL_CBSR
288                 );
289
290         temp = ohci_readl(&regs->cmdstatus);
291         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
292                 (temp & OHCI_SOC) >> 16,
293                 (temp & OHCI_OCR) ? " OCR" : "",
294                 (temp & OHCI_BLF) ? " BLF" : "",
295                 (temp & OHCI_CLF) ? " CLF" : "",
296                 (temp & OHCI_HCR) ? " HCR" : ""
297                 );
298
299         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
300         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
301
302         maybe_print_eds("ed_periodcurrent",
303                         ohci_readl(&regs->ed_periodcurrent));
304
305         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
306         maybe_print_eds("ed_controlcurrent",
307                         ohci_readl(&regs->ed_controlcurrent));
308
309         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
310         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
311
312         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
313 }
314
315 static void ohci_dump_roothub(ohci_t *controller, int verbose)
316 {
317         __u32                   temp, ndp, i;
318
319         temp = roothub_a(controller);
320         ndp = (temp & RH_A_NDP);
321 #ifdef CONFIG_AT91C_PQFP_UHPBUG
322         ndp = (ndp == 2) ? 1:0;
323 #endif
324         if (verbose) {
325                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
326                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
327                         (temp & RH_A_NOCP) ? " NOCP" : "",
328                         (temp & RH_A_OCPM) ? " OCPM" : "",
329                         (temp & RH_A_DT) ? " DT" : "",
330                         (temp & RH_A_NPS) ? " NPS" : "",
331                         (temp & RH_A_PSM) ? " PSM" : "",
332                         ndp
333                         );
334                 temp = roothub_b(controller);
335                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
336                         temp,
337                         (temp & RH_B_PPCM) >> 16,
338                         (temp & RH_B_DR)
339                         );
340                 temp = roothub_status(controller);
341                 dbg("roothub.status: %08x%s%s%s%s%s%s",
342                         temp,
343                         (temp & RH_HS_CRWE) ? " CRWE" : "",
344                         (temp & RH_HS_OCIC) ? " OCIC" : "",
345                         (temp & RH_HS_LPSC) ? " LPSC" : "",
346                         (temp & RH_HS_DRWE) ? " DRWE" : "",
347                         (temp & RH_HS_OCI) ? " OCI" : "",
348                         (temp & RH_HS_LPS) ? " LPS" : ""
349                         );
350         }
351
352         for (i = 0; i < ndp; i++) {
353                 temp = roothub_portstatus(controller, i);
354                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
355                         i,
356                         temp,
357                         (temp & RH_PS_PRSC) ? " PRSC" : "",
358                         (temp & RH_PS_OCIC) ? " OCIC" : "",
359                         (temp & RH_PS_PSSC) ? " PSSC" : "",
360                         (temp & RH_PS_PESC) ? " PESC" : "",
361                         (temp & RH_PS_CSC) ? " CSC" : "",
362
363                         (temp & RH_PS_LSDA) ? " LSDA" : "",
364                         (temp & RH_PS_PPS) ? " PPS" : "",
365                         (temp & RH_PS_PRS) ? " PRS" : "",
366                         (temp & RH_PS_POCI) ? " POCI" : "",
367                         (temp & RH_PS_PSS) ? " PSS" : "",
368
369                         (temp & RH_PS_PES) ? " PES" : "",
370                         (temp & RH_PS_CCS) ? " CCS" : ""
371                         );
372         }
373 }
374
375 static void ohci_dump(ohci_t *controller, int verbose)
376 {
377         dbg("OHCI controller usb-%s state", controller->slot_name);
378
379         /* dumps some of the state we know about */
380         ohci_dump_status(controller);
381         if (verbose)
382                 ep_print_int_eds(controller, "hcca");
383         dbg("hcca frame #%04x", controller->hcca->frame_no);
384         ohci_dump_roothub(controller, 1);
385 }
386 #endif /* DEBUG */
387
388 /*-------------------------------------------------------------------------*
389  * Interface functions (URB)
390  *-------------------------------------------------------------------------*/
391
392 /* get a transfer request */
393
394 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
395 {
396         ohci_t *ohci;
397         ed_t *ed;
398         urb_priv_t *purb_priv = urb;
399         int i, size = 0;
400         struct usb_device *dev = urb->dev;
401         unsigned long pipe = urb->pipe;
402         void *buffer = urb->transfer_buffer;
403         int transfer_len = urb->transfer_buffer_length;
404         int interval = urb->interval;
405
406         ohci = &gohci;
407
408         /* when controller's hung, permit only roothub cleanup attempts
409          * such as powering down ports */
410         if (ohci->disabled) {
411                 err("sohci_submit_job: EPIPE");
412                 return -1;
413         }
414
415         /* we're about to begin a new transaction here so mark the
416          * URB unfinished */
417         urb->finished = 0;
418
419         /* every endpoint has a ed, locate and fill it */
420         ed = ep_add_ed(dev, pipe, interval, 1);
421         if (!ed) {
422                 err("sohci_submit_job: ENOMEM");
423                 return -1;
424         }
425
426         /* for the private part of the URB we need the number of TDs (size) */
427         switch (usb_pipetype(pipe)) {
428         case PIPE_BULK: /* one TD for every 4096 Byte */
429                 size = (transfer_len - 1) / 4096 + 1;
430                 break;
431         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
432                 size = (transfer_len == 0)? 2:
433                                         (transfer_len - 1) / 4096 + 3;
434                 break;
435         case PIPE_INTERRUPT: /* 1 TD */
436                 size = 1;
437                 break;
438         }
439
440         ed->purb = urb;
441
442         if (size >= (N_URB_TD - 1)) {
443                 err("need %d TDs, only have %d", size, N_URB_TD);
444                 return -1;
445         }
446         purb_priv->pipe = pipe;
447
448         /* fill the private part of the URB */
449         purb_priv->length = size;
450         purb_priv->ed = ed;
451         purb_priv->actual_length = 0;
452
453         /* allocate the TDs */
454         /* note that td[0] was allocated in ep_add_ed */
455         for (i = 0; i < size; i++) {
456                 purb_priv->td[i] = td_alloc(dev);
457                 if (!purb_priv->td[i]) {
458                         purb_priv->length = i;
459                         urb_free_priv(purb_priv);
460                         err("sohci_submit_job: ENOMEM");
461                         return -1;
462                 }
463         }
464
465         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
466                 urb_free_priv(purb_priv);
467                 err("sohci_submit_job: EINVAL");
468                 return -1;
469         }
470
471         /* link the ed into a chain if is not already */
472         if (ed->state != ED_OPER)
473                 ep_link(ohci, ed);
474
475         /* fill the TDs and link it to the ed */
476         td_submit_job(dev, pipe, buffer, transfer_len,
477                       setup, purb_priv, interval);
478
479         return 0;
480 }
481
482 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
483 {
484         struct ohci_regs *regs = hc->regs;
485
486         switch (usb_pipetype(urb->pipe)) {
487         case PIPE_INTERRUPT:
488                 /* implicitly requeued */
489                 if (urb->dev->irq_handle &&
490                                 (urb->dev->irq_act_len = urb->actual_length)) {
491                         ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
492                         ohci_readl(&regs->intrenable); /* PCI posting flush */
493                         urb->dev->irq_handle(urb->dev);
494                         ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
495                         ohci_readl(&regs->intrdisable); /* PCI posting flush */
496                 }
497                 urb->actual_length = 0;
498                 td_submit_job(
499                                 urb->dev,
500                                 urb->pipe,
501                                 urb->transfer_buffer,
502                                 urb->transfer_buffer_length,
503                                 NULL,
504                                 urb,
505                                 urb->interval);
506                 break;
507         case PIPE_CONTROL:
508         case PIPE_BULK:
509                 break;
510         default:
511                 return 0;
512         }
513         return 1;
514 }
515
516 /*-------------------------------------------------------------------------*/
517
518 #ifdef DEBUG
519 /* tell us the current USB frame number */
520
521 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
522 {
523         ohci_t *ohci = &gohci;
524
525         return m16_swap(ohci->hcca->frame_no);
526 }
527 #endif
528
529 /*-------------------------------------------------------------------------*
530  * ED handling functions
531  *-------------------------------------------------------------------------*/
532
533 /* search for the right branch to insert an interrupt ed into the int tree
534  * do some load ballancing;
535  * returns the branch and
536  * sets the interval to interval = 2^integer (ld (interval)) */
537
538 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
539 {
540         int i, branch = 0;
541
542         /* search for the least loaded interrupt endpoint
543          * branch of all 32 branches
544          */
545         for (i = 0; i < 32; i++)
546                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
547                         branch = i;
548
549         branch = branch % interval;
550         for (i = branch; i < 32; i += interval)
551                 ohci->ohci_int_load [i] += load;
552
553         return branch;
554 }
555
556 /*-------------------------------------------------------------------------*/
557
558 /*  2^int( ld (inter)) */
559
560 static int ep_2_n_interval(int inter)
561 {
562         int i;
563         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
564         return 1 << i;
565 }
566
567 /*-------------------------------------------------------------------------*/
568
569 /* the int tree is a binary tree
570  * in order to process it sequentially the indexes of the branches have to
571  * be mapped the mapping reverses the bits of a word of num_bits length */
572 static int ep_rev(int num_bits, int word)
573 {
574         int i, wout = 0;
575
576         for (i = 0; i < num_bits; i++)
577                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
578         return wout;
579 }
580
581 /*-------------------------------------------------------------------------*
582  * ED handling functions
583  *-------------------------------------------------------------------------*/
584
585 /* link an ed into one of the HC chains */
586
587 static int ep_link(ohci_t *ohci, ed_t *edi)
588 {
589         volatile ed_t *ed = edi;
590         int int_branch;
591         int i;
592         int inter;
593         int interval;
594         int load;
595         __u32 *ed_p;
596
597         ed->state = ED_OPER;
598         ed->int_interval = 0;
599
600         switch (ed->type) {
601         case PIPE_CONTROL:
602                 ed->hwNextED = 0;
603                 if (ohci->ed_controltail == NULL)
604                         ohci_writel(ed, &ohci->regs->ed_controlhead);
605                 else
606                         ohci->ed_controltail->hwNextED =
607                                                    m32_swap((unsigned long)ed);
608
609                 ed->ed_prev = ohci->ed_controltail;
610                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
611                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
612                         ohci->hc_control |= OHCI_CTRL_CLE;
613                         ohci_writel(ohci->hc_control, &ohci->regs->control);
614                 }
615                 ohci->ed_controltail = edi;
616                 break;
617
618         case PIPE_BULK:
619                 ed->hwNextED = 0;
620                 if (ohci->ed_bulktail == NULL)
621                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
622                 else
623                         ohci->ed_bulktail->hwNextED =
624                                                    m32_swap((unsigned long)ed);
625
626                 ed->ed_prev = ohci->ed_bulktail;
627                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
628                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
629                         ohci->hc_control |= OHCI_CTRL_BLE;
630                         ohci_writel(ohci->hc_control, &ohci->regs->control);
631                 }
632                 ohci->ed_bulktail = edi;
633                 break;
634
635         case PIPE_INTERRUPT:
636                 load = ed->int_load;
637                 interval = ep_2_n_interval(ed->int_period);
638                 ed->int_interval = interval;
639                 int_branch = ep_int_ballance(ohci, interval, load);
640                 ed->int_branch = int_branch;
641
642                 for (i = 0; i < ep_rev(6, interval); i += inter) {
643                         inter = 1;
644                         for (ed_p = &(ohci->hcca->int_table[\
645                                                 ep_rev(5, i) + int_branch]);
646                                 (*ed_p != 0) &&
647                                 (((ed_t *)ed_p)->int_interval >= interval);
648                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
649                                         inter = ep_rev(6,
650                                                  ((ed_t *)ed_p)->int_interval);
651                         ed->hwNextED = *ed_p;
652                         *ed_p = m32_swap((unsigned long)ed);
653                 }
654                 break;
655         }
656         return 0;
657 }
658
659 /*-------------------------------------------------------------------------*/
660
661 /* scan the periodic table to find and unlink this ED */
662 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
663                             unsigned index, unsigned period)
664 {
665         for (; index < NUM_INTS; index += period) {
666                 __u32   *ed_p = &ohci->hcca->int_table [index];
667
668                 /* ED might have been unlinked through another path */
669                 while (*ed_p != 0) {
670                         if (((struct ed *)
671                                         m32_swap((unsigned long)ed_p)) == ed) {
672                                 *ed_p = ed->hwNextED;
673                                 break;
674                         }
675                         ed_p = &(((struct ed *)
676                                      m32_swap((unsigned long)ed_p))->hwNextED);
677                 }
678         }
679 }
680
681 /* unlink an ed from one of the HC chains.
682  * just the link to the ed is unlinked.
683  * the link from the ed still points to another operational ed or 0
684  * so the HC can eventually finish the processing of the unlinked ed */
685
686 static int ep_unlink(ohci_t *ohci, ed_t *edi)
687 {
688         volatile ed_t *ed = edi;
689         int i;
690
691         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
692
693         switch (ed->type) {
694         case PIPE_CONTROL:
695                 if (ed->ed_prev == NULL) {
696                         if (!ed->hwNextED) {
697                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
698                                 ohci_writel(ohci->hc_control,
699                                             &ohci->regs->control);
700                         }
701                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
702                                 &ohci->regs->ed_controlhead);
703                 } else {
704                         ed->ed_prev->hwNextED = ed->hwNextED;
705                 }
706                 if (ohci->ed_controltail == ed) {
707                         ohci->ed_controltail = ed->ed_prev;
708                 } else {
709                         ((ed_t *)m32_swap(
710                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
711                 }
712                 break;
713
714         case PIPE_BULK:
715                 if (ed->ed_prev == NULL) {
716                         if (!ed->hwNextED) {
717                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
718                                 ohci_writel(ohci->hc_control,
719                                             &ohci->regs->control);
720                         }
721                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
722                                &ohci->regs->ed_bulkhead);
723                 } else {
724                         ed->ed_prev->hwNextED = ed->hwNextED;
725                 }
726                 if (ohci->ed_bulktail == ed) {
727                         ohci->ed_bulktail = ed->ed_prev;
728                 } else {
729                         ((ed_t *)m32_swap(
730                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
731                 }
732                 break;
733
734         case PIPE_INTERRUPT:
735                 periodic_unlink(ohci, ed, 0, 1);
736                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
737                     ohci->ohci_int_load[i] -= ed->int_load;
738                 break;
739         }
740         ed->state = ED_UNLINK;
741         return 0;
742 }
743
744 /*-------------------------------------------------------------------------*/
745
746 /* add/reinit an endpoint; this should be done once at the
747  * usb_set_configuration command, but the USB stack is a little bit
748  * stateless so we do it at every transaction if the state of the ed
749  * is ED_NEW then a dummy td is added and the state is changed to
750  * ED_UNLINK in all other cases the state is left unchanged the ed
751  * info fields are setted anyway even though most of them should not
752  * change
753  */
754 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
755                         int interval, int load)
756 {
757         td_t *td;
758         ed_t *ed_ret;
759         volatile ed_t *ed;
760
761         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
762                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
763
764         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
765                 err("ep_add_ed: pending delete");
766                 /* pending delete request */
767                 return NULL;
768         }
769
770         if (ed->state == ED_NEW) {
771                 /* dummy td; end of td list for ed */
772                 td = td_alloc(usb_dev);
773                 ed->hwTailP = m32_swap((unsigned long)td);
774                 ed->hwHeadP = ed->hwTailP;
775                 ed->state = ED_UNLINK;
776                 ed->type = usb_pipetype(pipe);
777                 ohci_dev.ed_cnt++;
778         }
779
780         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
781                         | usb_pipeendpoint(pipe) << 7
782                         | (usb_pipeisoc(pipe)? 0x8000: 0)
783                         | (usb_pipecontrol(pipe)? 0: \
784                                            (usb_pipeout(pipe)? 0x800: 0x1000))
785                         | (usb_dev->speed == USB_SPEED_LOW) << 13
786                         | usb_maxpacket(usb_dev, pipe) << 16);
787
788         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
789                 ed->int_period = interval;
790                 ed->int_load = load;
791         }
792
793         return ed_ret;
794 }
795
796 /*-------------------------------------------------------------------------*
797  * TD handling functions
798  *-------------------------------------------------------------------------*/
799
800 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
801
802 static void td_fill(ohci_t *ohci, unsigned int info,
803         void *data, int len,
804         struct usb_device *dev, int index, urb_priv_t *urb_priv)
805 {
806         volatile td_t  *td, *td_pt;
807 #ifdef OHCI_FILL_TRACE
808         int i;
809 #endif
810
811         if (index > urb_priv->length) {
812                 err("index > length");
813                 return;
814         }
815         /* use this td as the next dummy */
816         td_pt = urb_priv->td [index];
817         td_pt->hwNextTD = 0;
818
819         /* fill the old dummy TD */
820         td = urb_priv->td [index] =
821                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
822
823         td->ed = urb_priv->ed;
824         td->next_dl_td = NULL;
825         td->index = index;
826         td->data = (__u32)data;
827 #ifdef OHCI_FILL_TRACE
828         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
829                 for (i = 0; i < len; i++)
830                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
831                 printf("\n");
832         }
833 #endif
834         if (!len)
835                 data = 0;
836
837         td->hwINFO = m32_swap(info);
838         td->hwCBP = m32_swap((unsigned long)data);
839         if (data)
840                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
841         else
842                 td->hwBE = 0;
843
844         td->hwNextTD = m32_swap((unsigned long)td_pt);
845
846         /* append to queue */
847         td->ed->hwTailP = td->hwNextTD;
848 }
849
850 /*-------------------------------------------------------------------------*/
851
852 /* prepare all TDs of a transfer */
853
854 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
855                           void *buffer, int transfer_len,
856                           struct devrequest *setup, urb_priv_t *urb,
857                           int interval)
858 {
859         ohci_t *ohci = &gohci;
860         int data_len = transfer_len;
861         void *data;
862         int cnt = 0;
863         __u32 info = 0;
864         unsigned int toggle = 0;
865
866         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
867          * bits for reseting */
868         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
869                 toggle = TD_T_TOGGLE;
870         } else {
871                 toggle = TD_T_DATA0;
872                 usb_settoggle(dev, usb_pipeendpoint(pipe),
873                                 usb_pipeout(pipe), 1);
874         }
875         urb->td_cnt = 0;
876         if (data_len)
877                 data = buffer;
878         else
879                 data = 0;
880
881         switch (usb_pipetype(pipe)) {
882         case PIPE_BULK:
883                 info = usb_pipeout(pipe)?
884                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
885                 while (data_len > 4096) {
886                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
887                                 data, 4096, dev, cnt, urb);
888                         data += 4096; data_len -= 4096; cnt++;
889                 }
890                 info = usb_pipeout(pipe)?
891                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
892                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
893                         data_len, dev, cnt, urb);
894                 cnt++;
895
896                 if (!ohci->sleeping) {
897                         /* start bulk list */
898                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
899                 }
900                 break;
901
902         case PIPE_CONTROL:
903                 /* Setup phase */
904                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
905                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
906
907                 /* Optional Data phase */
908                 if (data_len > 0) {
909                         info = usb_pipeout(pipe)?
910                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
911                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
912                         /* NOTE:  mishandles transfers >8K, some >4K */
913                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
914                 }
915
916                 /* Status phase */
917                 info = usb_pipeout(pipe)?
918                         TD_CC | TD_DP_IN | TD_T_DATA1:
919                         TD_CC | TD_DP_OUT | TD_T_DATA1;
920                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
921
922                 if (!ohci->sleeping) {
923                         /* start Control list */
924                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
925                 }
926                 break;
927
928         case PIPE_INTERRUPT:
929                 info = usb_pipeout(urb->pipe)?
930                         TD_CC | TD_DP_OUT | toggle:
931                         TD_CC | TD_R | TD_DP_IN | toggle;
932                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
933                 break;
934         }
935         if (urb->length != cnt)
936                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
937 }
938
939 /*-------------------------------------------------------------------------*
940  * Done List handling functions
941  *-------------------------------------------------------------------------*/
942
943 /* calculate the transfer length and update the urb */
944
945 static void dl_transfer_length(td_t *td)
946 {
947         __u32 tdBE, tdCBP;
948         urb_priv_t *lurb_priv = td->ed->purb;
949
950         tdBE   = m32_swap(td->hwBE);
951         tdCBP  = m32_swap(td->hwCBP);
952
953         if (!(usb_pipecontrol(lurb_priv->pipe) &&
954             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
955                 if (tdBE != 0) {
956                         if (td->hwCBP == 0)
957                                 lurb_priv->actual_length += tdBE - td->data + 1;
958                         else
959                                 lurb_priv->actual_length += tdCBP - td->data;
960                 }
961         }
962 }
963
964 /*-------------------------------------------------------------------------*/
965 static void check_status(td_t *td_list)
966 {
967         urb_priv_t *lurb_priv = td_list->ed->purb;
968         int        urb_len    = lurb_priv->length;
969         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
970         int        cc;
971
972         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
973         if (cc) {
974                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
975
976                 if (*phwHeadP & m32_swap(0x1)) {
977                         if (lurb_priv &&
978                             ((td_list->index + 1) < urb_len)) {
979                                 *phwHeadP =
980                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
981                                                         m32_swap(0xfffffff0)) |
982                                                    (*phwHeadP & m32_swap(0x2));
983
984                                 lurb_priv->td_cnt += urb_len -
985                                                      td_list->index - 1;
986                         } else
987                                 *phwHeadP &= m32_swap(0xfffffff2);
988                 }
989 #ifdef CONFIG_MPC5200
990                 td_list->hwNextTD = 0;
991 #endif
992         }
993 }
994
995 /* replies to the request have to be on a FIFO basis so
996  * we reverse the reversed done-list */
997 static td_t *dl_reverse_done_list(ohci_t *ohci)
998 {
999         __u32 td_list_hc;
1000         td_t *td_rev = NULL;
1001         td_t *td_list = NULL;
1002
1003         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1004         ohci->hcca->done_head = 0;
1005
1006         while (td_list_hc) {
1007                 td_list = (td_t *)td_list_hc;
1008                 check_status(td_list);
1009                 td_list->next_dl_td = td_rev;
1010                 td_rev = td_list;
1011                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1012         }
1013         return td_list;
1014 }
1015
1016 /*-------------------------------------------------------------------------*/
1017 /*-------------------------------------------------------------------------*/
1018
1019 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1020 {
1021         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1022                 urb->finished = sohci_return_job(ohci, urb);
1023         else
1024                 dbg("finish_urb: strange.., ED state %x, \n", status);
1025 }
1026
1027 /*
1028  * Used to take back a TD from the host controller. This would normally be
1029  * called from within dl_done_list, however it may be called directly if the
1030  * HC no longer sees the TD and it has not appeared on the donelist (after
1031  * two frames).  This bug has been observed on ZF Micro systems.
1032  */
1033 static int takeback_td(ohci_t *ohci, td_t *td_list)
1034 {
1035         ed_t *ed;
1036         int cc;
1037         int stat = 0;
1038         /* urb_t *urb; */
1039         urb_priv_t *lurb_priv;
1040         __u32 tdINFO, edHeadP, edTailP;
1041
1042         tdINFO = m32_swap(td_list->hwINFO);
1043
1044         ed = td_list->ed;
1045         lurb_priv = ed->purb;
1046
1047         dl_transfer_length(td_list);
1048
1049         lurb_priv->td_cnt++;
1050
1051         /* error code of transfer */
1052         cc = TD_CC_GET(tdINFO);
1053         if (cc) {
1054                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1055                 stat = cc_to_error[cc];
1056         }
1057
1058         /* see if this done list makes for all TD's of current URB,
1059         * and mark the URB finished if so */
1060         if (lurb_priv->td_cnt == lurb_priv->length)
1061                 finish_urb(ohci, lurb_priv, ed->state);
1062
1063         dbg("dl_done_list: processing TD %x, len %x\n",
1064                 lurb_priv->td_cnt, lurb_priv->length);
1065
1066         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1067                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1068                 edTailP = m32_swap(ed->hwTailP);
1069
1070                 /* unlink eds if they are not busy */
1071                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1072                         ep_unlink(ohci, ed);
1073         }
1074         return stat;
1075 }
1076
1077 static int dl_done_list(ohci_t *ohci)
1078 {
1079         int stat = 0;
1080         td_t    *td_list = dl_reverse_done_list(ohci);
1081
1082         while (td_list) {
1083                 td_t    *td_next = td_list->next_dl_td;
1084                 stat = takeback_td(ohci, td_list);
1085                 td_list = td_next;
1086         }
1087         return stat;
1088 }
1089
1090 /*-------------------------------------------------------------------------*
1091  * Virtual Root Hub
1092  *-------------------------------------------------------------------------*/
1093
1094 #include <usbroothubdes.h>
1095
1096 /* Hub class-specific descriptor is constructed dynamically */
1097
1098 /*-------------------------------------------------------------------------*/
1099
1100 #define OK(x)                   len = (x); break
1101 #ifdef DEBUG
1102 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1103                                                 &gohci.regs->roothub.status); }
1104 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1105         (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1106 #else
1107 #define WR_RH_STAT(x)           ohci_writel((x), &gohci.regs->roothub.status)
1108 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1109                                     &gohci.regs->roothub.portstatus[wIndex-1])
1110 #endif
1111 #define RD_RH_STAT              roothub_status(&gohci)
1112 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci, wIndex-1)
1113
1114 /* request to virtual root hub */
1115
1116 int rh_check_port_status(ohci_t *controller)
1117 {
1118         __u32 temp, ndp, i;
1119         int res;
1120
1121         res = -1;
1122         temp = roothub_a(controller);
1123         ndp = (temp & RH_A_NDP);
1124 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1125         ndp = (ndp == 2) ? 1:0;
1126 #endif
1127         for (i = 0; i < ndp; i++) {
1128                 temp = roothub_portstatus(controller, i);
1129                 /* check for a device disconnect */
1130                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1131                         (RH_PS_PESC | RH_PS_CSC)) &&
1132                         ((temp & RH_PS_CCS) == 0)) {
1133                         res = i;
1134                         break;
1135                 }
1136         }
1137         return res;
1138 }
1139
1140 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1141                 void *buffer, int transfer_len, struct devrequest *cmd)
1142 {
1143         void *data = buffer;
1144         int leni = transfer_len;
1145         int len = 0;
1146         int stat = 0;
1147         __u16 bmRType_bReq;
1148         __u16 wValue;
1149         __u16 wIndex;
1150         __u16 wLength;
1151         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1152
1153 #ifdef DEBUG
1154 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1155           cmd, "SUB(rh)", usb_pipein(pipe));
1156 #else
1157         mdelay(1);
1158 #endif
1159         if (usb_pipeint(pipe)) {
1160                 info("Root-Hub submit IRQ: NOT implemented");
1161                 return 0;
1162         }
1163
1164         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1165         wValue        = le16_to_cpu(cmd->value);
1166         wIndex        = le16_to_cpu(cmd->index);
1167         wLength       = le16_to_cpu(cmd->length);
1168
1169         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1170                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1171
1172         switch (bmRType_bReq) {
1173         /* Request Destination:
1174            without flags: Device,
1175            RH_INTERFACE: interface,
1176            RH_ENDPOINT: endpoint,
1177            RH_CLASS means HUB here,
1178            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1179         */
1180
1181         case RH_GET_STATUS:
1182                 *(u16 *)databuf = cpu_to_le16(1);
1183                 OK(2);
1184         case RH_GET_STATUS | RH_INTERFACE:
1185                 *(u16 *)databuf = cpu_to_le16(0);
1186                 OK(2);
1187         case RH_GET_STATUS | RH_ENDPOINT:
1188                 *(u16 *)databuf = cpu_to_le16(0);
1189                 OK(2);
1190         case RH_GET_STATUS | RH_CLASS:
1191                 *(u32 *)databuf = cpu_to_le32(
1192                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1193                 OK(4);
1194         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1195                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1196                 OK(4);
1197
1198         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1199                 switch (wValue) {
1200                 case (RH_ENDPOINT_STALL):
1201                         OK(0);
1202                 }
1203                 break;
1204
1205         case RH_CLEAR_FEATURE | RH_CLASS:
1206                 switch (wValue) {
1207                 case RH_C_HUB_LOCAL_POWER:
1208                         OK(0);
1209                 case (RH_C_HUB_OVER_CURRENT):
1210                         WR_RH_STAT(RH_HS_OCIC);
1211                         OK(0);
1212                 }
1213                 break;
1214
1215         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1216                 switch (wValue) {
1217                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1218                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1219                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1220                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1221                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1222                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1223                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1224                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1225                 }
1226                 break;
1227
1228         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1229                 switch (wValue) {
1230                 case (RH_PORT_SUSPEND):
1231                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1232                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1233                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1234                                 WR_RH_PORTSTAT(RH_PS_PRS);
1235                         OK(0);
1236                 case (RH_PORT_POWER):
1237                         WR_RH_PORTSTAT(RH_PS_PPS);
1238                         mdelay(100);
1239                         OK(0);
1240                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1241                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1242                                 WR_RH_PORTSTAT(RH_PS_PES);
1243                         OK(0);
1244                 }
1245                 break;
1246
1247         case RH_SET_ADDRESS:
1248                 gohci.rh.devnum = wValue;
1249                 OK(0);
1250
1251         case RH_GET_DESCRIPTOR:
1252                 switch ((wValue & 0xff00) >> 8) {
1253                 case (0x01): /* device descriptor */
1254                         len = min_t(unsigned int,
1255                                         leni,
1256                                         min_t(unsigned int,
1257                                         sizeof(root_hub_dev_des),
1258                                         wLength));
1259                         databuf = root_hub_dev_des; OK(len);
1260                 case (0x02): /* configuration descriptor */
1261                         len = min_t(unsigned int,
1262                                         leni,
1263                                         min_t(unsigned int,
1264                                         sizeof(root_hub_config_des),
1265                                         wLength));
1266                         databuf = root_hub_config_des; OK(len);
1267                 case (0x03): /* string descriptors */
1268                         if (wValue == 0x0300) {
1269                                 len = min_t(unsigned int,
1270                                                 leni,
1271                                                 min_t(unsigned int,
1272                                                 sizeof(root_hub_str_index0),
1273                                                 wLength));
1274                                 databuf = root_hub_str_index0;
1275                                 OK(len);
1276                         }
1277                         if (wValue == 0x0301) {
1278                                 len = min_t(unsigned int,
1279                                                 leni,
1280                                                 min_t(unsigned int,
1281                                                 sizeof(root_hub_str_index1),
1282                                                 wLength));
1283                                 databuf = root_hub_str_index1;
1284                                 OK(len);
1285                 }
1286                 default:
1287                         stat = USB_ST_STALLED;
1288                 }
1289                 break;
1290
1291         case RH_GET_DESCRIPTOR | RH_CLASS:
1292         {
1293                 __u32 temp = roothub_a(&gohci);
1294
1295                 databuf[0] = 9;         /* min length; */
1296                 databuf[1] = 0x29;
1297                 databuf[2] = temp & RH_A_NDP;
1298 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1299                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1300 #endif
1301                 databuf[3] = 0;
1302                 if (temp & RH_A_PSM)    /* per-port power switching? */
1303                         databuf[3] |= 0x1;
1304                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1305                         databuf[3] |= 0x10;
1306                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1307                         databuf[3] |= 0x8;
1308
1309                 databuf[4] = 0;
1310                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1311                 databuf[6] = 0;
1312                 temp = roothub_b(&gohci);
1313                 databuf[7] = temp & RH_B_DR;
1314                 if (databuf[2] < 7) {
1315                         databuf[8] = 0xff;
1316                 } else {
1317                         databuf[0] += 2;
1318                         databuf[8] = (temp & RH_B_DR) >> 8;
1319                         databuf[10] = databuf[9] = 0xff;
1320                 }
1321
1322                 len = min_t(unsigned int, leni,
1323                             min_t(unsigned int, databuf[0], wLength));
1324                 OK(len);
1325         }
1326
1327         case RH_GET_CONFIGURATION:
1328                 databuf[0] = 0x01;
1329                 OK(1);
1330
1331         case RH_SET_CONFIGURATION:
1332                 WR_RH_STAT(0x10000);
1333                 OK(0);
1334
1335         default:
1336                 dbg("unsupported root hub command");
1337                 stat = USB_ST_STALLED;
1338         }
1339
1340 #ifdef  DEBUG
1341         ohci_dump_roothub(&gohci, 1);
1342 #else
1343         mdelay(1);
1344 #endif
1345
1346         len = min_t(int, len, leni);
1347         if (data != databuf)
1348                 memcpy(data, databuf, len);
1349         dev->act_len = len;
1350         dev->status = stat;
1351
1352 #ifdef DEBUG
1353         pkt_print(NULL, dev, pipe, buffer,
1354                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1355 #else
1356         mdelay(1);
1357 #endif
1358
1359         return stat;
1360 }
1361
1362 /*-------------------------------------------------------------------------*/
1363
1364 /* common code for handling submit messages - used for all but root hub */
1365 /* accesses. */
1366 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1367                 int transfer_len, struct devrequest *setup, int interval)
1368 {
1369         int stat = 0;
1370         int maxsize = usb_maxpacket(dev, pipe);
1371         int timeout;
1372         urb_priv_t *urb;
1373
1374         urb = malloc(sizeof(urb_priv_t));
1375         memset(urb, 0, sizeof(urb_priv_t));
1376
1377         urb->dev = dev;
1378         urb->pipe = pipe;
1379         urb->transfer_buffer = buffer;
1380         urb->transfer_buffer_length = transfer_len;
1381         urb->interval = interval;
1382
1383         /* device pulled? Shortcut the action. */
1384         if (devgone == dev) {
1385                 dev->status = USB_ST_CRC_ERR;
1386                 return 0;
1387         }
1388
1389 #ifdef DEBUG
1390         urb->actual_length = 0;
1391         pkt_print(urb, dev, pipe, buffer, transfer_len,
1392                   setup, "SUB", usb_pipein(pipe));
1393 #else
1394         mdelay(1);
1395 #endif
1396         if (!maxsize) {
1397                 err("submit_common_message: pipesize for pipe %lx is zero",
1398                         pipe);
1399                 return -1;
1400         }
1401
1402         if (sohci_submit_job(urb, setup) < 0) {
1403                 err("sohci_submit_job failed");
1404                 return -1;
1405         }
1406
1407 #if 0
1408         mdelay(10);
1409         /* ohci_dump_status(&gohci); */
1410 #endif
1411
1412         timeout = USB_TIMEOUT_MS(pipe);
1413
1414         /* wait for it to complete */
1415         for (;;) {
1416                 /* check whether the controller is done */
1417                 stat = hc_interrupt();
1418                 if (stat < 0) {
1419                         stat = USB_ST_CRC_ERR;
1420                         break;
1421                 }
1422
1423                 /* NOTE: since we are not interrupt driven in U-Boot and always
1424                  * handle only one URB at a time, we cannot assume the
1425                  * transaction finished on the first successful return from
1426                  * hc_interrupt().. unless the flag for current URB is set,
1427                  * meaning that all TD's to/from device got actually
1428                  * transferred and processed. If the current URB is not
1429                  * finished we need to re-iterate this loop so as
1430                  * hc_interrupt() gets called again as there needs to be some
1431                  * more TD's to process still */
1432                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1433                         /* 0xff is returned for an SF-interrupt */
1434                         break;
1435                 }
1436
1437                 if (--timeout) {
1438                         mdelay(1);
1439                         if (!urb->finished)
1440                                 dbg("*");
1441
1442                 } else {
1443                         err("CTL:TIMEOUT ");
1444                         dbg("submit_common_msg: TO status %x\n", stat);
1445                         urb->finished = 1;
1446                         stat = USB_ST_CRC_ERR;
1447                         break;
1448                 }
1449         }
1450
1451         dev->status = stat;
1452         dev->act_len = urb->actual_length;
1453
1454 #ifdef DEBUG
1455         pkt_print(urb, dev, pipe, buffer, transfer_len,
1456                   setup, "RET(ctlr)", usb_pipein(pipe));
1457 #else
1458         mdelay(1);
1459 #endif
1460
1461         /* free TDs in urb_priv */
1462         if (!usb_pipeint(pipe))
1463                 urb_free_priv(urb);
1464         return 0;
1465 }
1466
1467 /* submit routines called from usb.c */
1468 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1469                 int transfer_len)
1470 {
1471         info("submit_bulk_msg");
1472         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1473 }
1474
1475 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1476                 int transfer_len, struct devrequest *setup)
1477 {
1478         int maxsize = usb_maxpacket(dev, pipe);
1479
1480         info("submit_control_msg");
1481 #ifdef DEBUG
1482         pkt_print(NULL, dev, pipe, buffer, transfer_len,
1483                   setup, "SUB", usb_pipein(pipe));
1484 #else
1485         mdelay(1);
1486 #endif
1487         if (!maxsize) {
1488                 err("submit_control_message: pipesize for pipe %lx is zero",
1489                         pipe);
1490                 return -1;
1491         }
1492         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1493                 gohci.rh.dev = dev;
1494                 /* root hub - redirect */
1495                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1496                         setup);
1497         }
1498
1499         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1500 }
1501
1502 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1503                 int transfer_len, int interval)
1504 {
1505         info("submit_int_msg");
1506         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1507                         interval);
1508 }
1509
1510 /*-------------------------------------------------------------------------*
1511  * HC functions
1512  *-------------------------------------------------------------------------*/
1513
1514 /* reset the HC and BUS */
1515
1516 static int hc_reset(ohci_t *ohci)
1517 {
1518 #ifdef CONFIG_PCI_EHCI_DEVNO
1519         pci_dev_t pdev;
1520 #endif
1521         int timeout = 30;
1522         int smm_timeout = 50; /* 0,5 sec */
1523
1524         dbg("%s\n", __FUNCTION__);
1525
1526 #ifdef CONFIG_PCI_EHCI_DEVNO
1527         /*
1528          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1529          * resetting via EHCI registers only.
1530          */
1531         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1532         if (pdev != -1) {
1533                 u32 base;
1534                 int timeout = 1000;
1535
1536                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1537                 base += EHCI_USBCMD_OFF;
1538                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1539
1540                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1541                         if (timeout-- <= 0) {
1542                                 printf("USB RootHub reset timed out!");
1543                                 break;
1544                         }
1545                         udelay(1);
1546                 }
1547         } else
1548                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1549 #endif
1550         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1551                 /* SMM owns the HC, request ownership */
1552                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1553                 info("USB HC TakeOver from SMM");
1554                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1555                         mdelay(10);
1556                         if (--smm_timeout == 0) {
1557                                 err("USB HC TakeOver failed!");
1558                                 return -1;
1559                         }
1560                 }
1561         }
1562
1563         /* Disable HC interrupts */
1564         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1565
1566         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1567                 ohci->slot_name,
1568                 ohci_readl(&ohci->regs->control));
1569
1570         /* Reset USB (needed by some controllers) */
1571         ohci->hc_control = 0;
1572         ohci_writel(ohci->hc_control, &ohci->regs->control);
1573
1574         /* HC Reset requires max 10 us delay */
1575         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1576         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1577                 if (--timeout == 0) {
1578                         err("USB HC reset timed out!");
1579                         return -1;
1580                 }
1581                 udelay(1);
1582         }
1583         return 0;
1584 }
1585
1586 /*-------------------------------------------------------------------------*/
1587
1588 /* Start an OHCI controller, set the BUS operational
1589  * enable interrupts
1590  * connect the virtual root hub */
1591
1592 static int hc_start(ohci_t *ohci)
1593 {
1594         __u32 mask;
1595         unsigned int fminterval;
1596
1597         ohci->disabled = 1;
1598
1599         /* Tell the controller where the control and bulk lists are
1600          * The lists are empty now. */
1601
1602         ohci_writel(0, &ohci->regs->ed_controlhead);
1603         ohci_writel(0, &ohci->regs->ed_bulkhead);
1604
1605         ohci_writel((__u32)ohci->hcca,
1606                     &ohci->regs->hcca); /* reset clears this */
1607
1608         fminterval = 0x2edf;
1609         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1610         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1611         ohci_writel(fminterval, &ohci->regs->fminterval);
1612         ohci_writel(0x628, &ohci->regs->lsthresh);
1613
1614         /* start controller operations */
1615         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1616         ohci->disabled = 0;
1617         ohci_writel(ohci->hc_control, &ohci->regs->control);
1618
1619         /* disable all interrupts */
1620         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1621                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1622                         OHCI_INTR_OC | OHCI_INTR_MIE);
1623         ohci_writel(mask, &ohci->regs->intrdisable);
1624         /* clear all interrupts */
1625         mask &= ~OHCI_INTR_MIE;
1626         ohci_writel(mask, &ohci->regs->intrstatus);
1627         /* Choose the interrupts we care about now  - but w/o MIE */
1628         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1629         ohci_writel(mask, &ohci->regs->intrenable);
1630
1631 #ifdef  OHCI_USE_NPS
1632         /* required for AMD-756 and some Mac platforms */
1633         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1634                 &ohci->regs->roothub.a);
1635         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1636 #endif  /* OHCI_USE_NPS */
1637
1638         /* POTPGT delay is bits 24-31, in 2 ms units. */
1639         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1640
1641         /* connect the virtual root hub */
1642         ohci->rh.devnum = 0;
1643
1644         return 0;
1645 }
1646
1647 /*-------------------------------------------------------------------------*/
1648
1649 /* an interrupt happens */
1650
1651 static int hc_interrupt(void)
1652 {
1653         ohci_t *ohci = &gohci;
1654         struct ohci_regs *regs = ohci->regs;
1655         int ints;
1656         int stat = -1;
1657
1658         if ((ohci->hcca->done_head != 0) &&
1659                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1660                 ints =  OHCI_INTR_WDH;
1661         } else {
1662                 ints = ohci_readl(&regs->intrstatus);
1663                 if (ints == ~(u32)0) {
1664                         ohci->disabled++;
1665                         err("%s device removed!", ohci->slot_name);
1666                         return -1;
1667                 } else {
1668                         ints &= ohci_readl(&regs->intrenable);
1669                         if (ints == 0) {
1670                                 dbg("hc_interrupt: returning..\n");
1671                                 return 0xff;
1672                         }
1673                 }
1674         }
1675
1676         /* dbg("Interrupt: %x frame: %x", ints,
1677                                         le16_to_cpu(ohci->hcca->frame_no)); */
1678
1679         if (ints & OHCI_INTR_RHSC)
1680                 stat = 0xff;
1681
1682         if (ints & OHCI_INTR_UE) {
1683                 ohci->disabled++;
1684                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1685                         ohci->slot_name);
1686                 /* e.g. due to PCI Master/Target Abort */
1687
1688 #ifdef  DEBUG
1689                 ohci_dump(ohci, 1);
1690 #else
1691                 mdelay(1);
1692 #endif
1693                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1694                 /* Make some non-interrupt context restart the controller. */
1695                 /* Count and limit the retries though; either hardware or */
1696                 /* software errors can go forever... */
1697                 hc_reset(ohci);
1698                 return -1;
1699         }
1700
1701         if (ints & OHCI_INTR_WDH) {
1702                 mdelay(1);
1703                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1704                 (void)ohci_readl(&regs->intrdisable); /* flush */
1705                 stat = dl_done_list(&gohci);
1706                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1707                 (void)ohci_readl(&regs->intrdisable); /* flush */
1708         }
1709
1710         if (ints & OHCI_INTR_SO) {
1711                 dbg("USB Schedule overrun\n");
1712                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1713                 stat = -1;
1714         }
1715
1716         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1717         if (ints & OHCI_INTR_SF) {
1718                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1719                 mdelay(1);
1720                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1721                 if (ohci->ed_rm_list[frame] != NULL)
1722                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1723                 stat = 0xff;
1724         }
1725
1726         ohci_writel(ints, &regs->intrstatus);
1727         return stat;
1728 }
1729
1730 /*-------------------------------------------------------------------------*/
1731
1732 /*-------------------------------------------------------------------------*/
1733
1734 /* De-allocate all resources.. */
1735
1736 static void hc_release_ohci(ohci_t *ohci)
1737 {
1738         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1739
1740         if (!ohci->disabled)
1741                 hc_reset(ohci);
1742 }
1743
1744 /*-------------------------------------------------------------------------*/
1745
1746 /*
1747  * low level initalisation routine, called from usb.c
1748  */
1749 static char ohci_inited = 0;
1750
1751 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1752 {
1753 #ifdef CONFIG_PCI_OHCI
1754         pci_dev_t pdev;
1755 #endif
1756
1757 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1758         /* cpu dependant init */
1759         if (usb_cpu_init())
1760                 return -1;
1761 #endif
1762
1763 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1764         /*  board dependant init */
1765         if (board_usb_init(index, USB_INIT_HOST))
1766                 return -1;
1767 #endif
1768         memset(&gohci, 0, sizeof(ohci_t));
1769
1770         /* align the storage */
1771         if ((__u32)&ghcca[0] & 0xff) {
1772                 err("HCCA not aligned!!");
1773                 return -1;
1774         }
1775         phcca = &ghcca[0];
1776         info("aligned ghcca %p", phcca);
1777         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1778         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1779                 err("EDs not aligned!!");
1780                 return -1;
1781         }
1782         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1783         if ((__u32)gtd & 0x7) {
1784                 err("TDs not aligned!!");
1785                 return -1;
1786         }
1787         ptd = gtd;
1788         gohci.hcca = phcca;
1789         memset(phcca, 0, sizeof(struct ohci_hcca));
1790
1791         gohci.disabled = 1;
1792         gohci.sleeping = 0;
1793         gohci.irq = -1;
1794 #ifdef CONFIG_PCI_OHCI
1795         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1796
1797         if (pdev != -1) {
1798                 u16 vid, did;
1799                 u32 base;
1800                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1801                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1802                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1803                                 vid, did, (pdev >> 16) & 0xff,
1804                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1805                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1806                 printf("OHCI regs address 0x%08x\n", base);
1807                 gohci.regs = (struct ohci_regs *)base;
1808         } else
1809                 return -1;
1810 #else
1811         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1812 #endif
1813
1814         gohci.flags = 0;
1815         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1816
1817         if (hc_reset (&gohci) < 0) {
1818                 hc_release_ohci (&gohci);
1819                 err ("can't reset usb-%s", gohci.slot_name);
1820 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1821                 /* board dependant cleanup */
1822                 board_usb_cleanup(index, USB_INIT_HOST);
1823 #endif
1824
1825 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1826                 /* cpu dependant cleanup */
1827                 usb_cpu_init_fail();
1828 #endif
1829                 return -1;
1830         }
1831
1832         if (hc_start(&gohci) < 0) {
1833                 err("can't start usb-%s", gohci.slot_name);
1834                 hc_release_ohci(&gohci);
1835                 /* Initialization failed */
1836 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1837                 /* board dependant cleanup */
1838                 usb_board_stop();
1839 #endif
1840
1841 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1842                 /* cpu dependant cleanup */
1843                 usb_cpu_stop();
1844 #endif
1845                 return -1;
1846         }
1847
1848 #ifdef  DEBUG
1849         ohci_dump(&gohci, 1);
1850 #else
1851         mdelay(1);
1852 #endif
1853         ohci_inited = 1;
1854         return 0;
1855 }
1856
1857 int usb_lowlevel_stop(int index)
1858 {
1859         /* this gets called really early - before the controller has */
1860         /* even been initialized! */
1861         if (!ohci_inited)
1862                 return 0;
1863         /* TODO release any interrupts, etc. */
1864         /* call hc_release_ohci() here ? */
1865         hc_reset(&gohci);
1866
1867 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1868         /* board dependant cleanup */
1869         if (usb_board_stop())
1870                 return -1;
1871 #endif
1872
1873 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1874         /* cpu dependant cleanup */
1875         if (usb_cpu_stop())
1876                 return -1;
1877 #endif
1878         /* This driver is no longer initialised. It needs a new low-level
1879          * init (board/cpu) before it can be used again. */
1880         ohci_inited = 0;
1881         return 0;
1882 }