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1 /*
2  * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
3  *
4  * (C) Copyright 2003
5  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
6  *
7  * Note: Much of this code has been derived from Linux 2.4
8  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9  * (C) Copyright 2000-2002 David Brownell
10  *
11  * SPDX-License-Identifier:     GPL-2.0+
12  */
13 /*
14  * IMPORTANT NOTES
15  * 1 - this driver is intended for use with USB Mass Storage Devices
16  *     (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
17  */
18
19 #include <common.h>
20 /* #include <pci.h> no PCI on the S3C24X0 */
21
22 #if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0)
23
24 #include <asm/arch/s3c24x0_cpu.h>
25 #include <asm/io.h>
26 #include <malloc.h>
27 #include <usb.h>
28 #include "ohci-s3c24xx.h"
29
30 #define OHCI_USE_NPS            /* force NoPowerSwitching mode */
31 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
32
33
34 /* For initializing controller (mask in an HCFS mode too) */
35 #define OHCI_CONTROL_INIT \
36         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
37
38 #undef DEBUG
39 #ifdef DEBUG
40 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
41 #else
42 #define dbg(format, arg...) do {} while(0)
43 #endif /* DEBUG */
44 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
45 #undef SHOW_INFO
46 #ifdef SHOW_INFO
47 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
48 #else
49 #define info(format, arg...) do {} while(0)
50 #endif
51
52 #define m16_swap(x) swap_16(x)
53 #define m32_swap(x) swap_32(x)
54
55 /* global struct ohci */
56 static struct ohci gohci;
57 /* this must be aligned to a 256 byte boundary */
58 struct ohci_hcca ghcca[1];
59 /* a pointer to the aligned storage */
60 struct ohci_hcca *phcca;
61 /* this allocates EDs for all possible endpoints */
62 struct ohci_device ohci_dev;
63 /* urb_priv */
64 struct urb_priv urb_priv;
65 /* RHSC flag */
66 int got_rhsc;
67 /* device which was disconnected */
68 struct usb_device *devgone;
69 /* flag guarding URB transation */
70 int urb_finished = 0;
71
72 /*-------------------------------------------------------------------------*/
73
74 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
75  * The erratum (#4) description is incorrect.  AMD's workaround waits
76  * till some bits (mostly reserved) are clear; ok for all revs.
77  */
78 #define OHCI_QUIRK_AMD756 0xabcd
79 #define read_roothub(hc, register, mask) ({ \
80         u32 temp = readl (&hc->regs->roothub.register); \
81         if (hc->flags & OHCI_QUIRK_AMD756) \
82                 while (temp & mask) \
83                         temp = readl (&hc->regs->roothub.register); \
84         temp; })
85
86 static u32 roothub_a(struct ohci *hc)
87 {
88         return read_roothub(hc, a, 0xfc0fe000);
89 }
90 static inline u32 roothub_b(struct ohci *hc)
91 {
92         return readl(&hc->regs->roothub.b);
93 }
94 static inline u32 roothub_status(struct ohci *hc)
95 {
96         return readl(&hc->regs->roothub.status);
97 }
98 static u32 roothub_portstatus(struct ohci *hc, int i)
99 {
100         return read_roothub(hc, portstatus[i], 0xffe0fce0);
101 }
102
103 /* forward declaration */
104 static int hc_interrupt(void);
105 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
106                           void *buffer, int transfer_len,
107                           struct devrequest *setup, struct urb_priv *urb,
108                           int interval);
109
110 /*-------------------------------------------------------------------------*
111  * URB support functions
112  *-------------------------------------------------------------------------*/
113
114 /* free HCD-private data associated with this URB */
115
116 static void urb_free_priv(struct urb_priv *urb)
117 {
118         int i;
119         int last;
120         struct td *td;
121
122         last = urb->length - 1;
123         if (last >= 0) {
124                 for (i = 0; i <= last; i++) {
125                         td = urb->td[i];
126                         if (td) {
127                                 td->usb_dev = NULL;
128                                 urb->td[i] = NULL;
129                         }
130                 }
131         }
132 }
133
134 /*-------------------------------------------------------------------------*/
135
136 #ifdef DEBUG
137 static int sohci_get_current_frame_number(struct usb_device *dev);
138
139 /* debug| print the main components of an URB
140  * small: 0) header + data packets 1) just header */
141
142 static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
143                       int transfer_len, struct devrequest *setup, char *str,
144                       int small)
145 {
146         struct urb_priv *purb = &urb_priv;
147
148         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
149             str,
150             sohci_get_current_frame_number(dev),
151             usb_pipedevice(pipe),
152             usb_pipeendpoint(pipe),
153             usb_pipeout(pipe) ? 'O' : 'I',
154             usb_pipetype(pipe) < 2 ?
155                 (usb_pipeint(pipe) ? "INTR" : "ISOC") :
156                 (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
157             purb->actual_length, transfer_len, dev->status);
158 #ifdef  OHCI_VERBOSE_DEBUG
159         if (!small) {
160                 int i, len;
161
162                 if (usb_pipecontrol(pipe)) {
163                         printf(__FILE__ ": cmd(8):");
164                         for (i = 0; i < 8; i++)
165                                 printf(" %02x", ((__u8 *) setup)[i]);
166                         printf("\n");
167                 }
168                 if (transfer_len > 0 && buffer) {
169                         printf(__FILE__ ": data(%d/%d):",
170                                purb->actual_length, transfer_len);
171                         len = usb_pipeout(pipe) ?
172                             transfer_len : purb->actual_length;
173                         for (i = 0; i < 16 && i < len; i++)
174                                 printf(" %02x", ((__u8 *) buffer)[i]);
175                         printf("%s\n", i < len ? "..." : "");
176                 }
177         }
178 #endif
179 }
180
181 /* just for debugging; prints non-empty branches of the
182    int ed tree inclusive iso eds*/
183 void ep_print_int_eds(struct ohci *ohci, char *str)
184 {
185         int i, j;
186         __u32 *ed_p;
187         for (i = 0; i < 32; i++) {
188                 j = 5;
189                 ed_p = &(ohci->hcca->int_table[i]);
190                 if (*ed_p == 0)
191                         continue;
192                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
193                 while (*ed_p != 0 && j--) {
194                         struct ed *ed = (struct ed *) m32_swap(ed_p);
195                         printf(" ed: %4x;", ed->hwINFO);
196                         ed_p = &ed->hwNextED;
197                 }
198                 printf("\n");
199         }
200 }
201
202 static void ohci_dump_intr_mask(char *label, __u32 mask)
203 {
204         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
205             label,
206             mask,
207             (mask & OHCI_INTR_MIE) ? " MIE" : "",
208             (mask & OHCI_INTR_OC) ? " OC" : "",
209             (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
210             (mask & OHCI_INTR_FNO) ? " FNO" : "",
211             (mask & OHCI_INTR_UE) ? " UE" : "",
212             (mask & OHCI_INTR_RD) ? " RD" : "",
213             (mask & OHCI_INTR_SF) ? " SF" : "",
214             (mask & OHCI_INTR_WDH) ? " WDH" : "",
215             (mask & OHCI_INTR_SO) ? " SO" : "");
216 }
217
218 static void maybe_print_eds(char *label, __u32 value)
219 {
220         struct ed *edp = (struct ed *) value;
221
222         if (value) {
223                 dbg("%s %08x", label, value);
224                 dbg("%08x", edp->hwINFO);
225                 dbg("%08x", edp->hwTailP);
226                 dbg("%08x", edp->hwHeadP);
227                 dbg("%08x", edp->hwNextED);
228         }
229 }
230
231 static char *hcfs2string(int state)
232 {
233         switch (state) {
234         case OHCI_USB_RESET:
235                 return "reset";
236         case OHCI_USB_RESUME:
237                 return "resume";
238         case OHCI_USB_OPER:
239                 return "operational";
240         case OHCI_USB_SUSPEND:
241                 return "suspend";
242         }
243         return "?";
244 }
245
246 /* dump control and status registers */
247 static void ohci_dump_status(struct ohci *controller)
248 {
249         struct ohci_regs *regs = controller->regs;
250         __u32 temp;
251
252         temp = readl(&regs->revision) & 0xff;
253         if (temp != 0x10)
254                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
255
256         temp = readl(&regs->control);
257         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
258             (temp & OHCI_CTRL_RWE) ? " RWE" : "",
259             (temp & OHCI_CTRL_RWC) ? " RWC" : "",
260             (temp & OHCI_CTRL_IR) ? " IR" : "",
261             hcfs2string(temp & OHCI_CTRL_HCFS),
262             (temp & OHCI_CTRL_BLE) ? " BLE" : "",
263             (temp & OHCI_CTRL_CLE) ? " CLE" : "",
264             (temp & OHCI_CTRL_IE) ? " IE" : "",
265             (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
266
267         temp = readl(&regs->cmdstatus);
268         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
269             (temp & OHCI_SOC) >> 16,
270             (temp & OHCI_OCR) ? " OCR" : "",
271             (temp & OHCI_BLF) ? " BLF" : "",
272             (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
273
274         ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
275         ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
276
277         maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
278
279         maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
280         maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
281
282         maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
283         maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
284
285         maybe_print_eds("donehead", readl(&regs->donehead));
286 }
287
288 static void ohci_dump_roothub(struct ohci *controller, int verbose)
289 {
290         __u32 temp, ndp, i;
291
292         temp = roothub_a(controller);
293         ndp = (temp & RH_A_NDP);
294
295         if (verbose) {
296                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
297                     ((temp & RH_A_POTPGT) >> 24) & 0xff,
298                     (temp & RH_A_NOCP) ? " NOCP" : "",
299                     (temp & RH_A_OCPM) ? " OCPM" : "",
300                     (temp & RH_A_DT) ? " DT" : "",
301                     (temp & RH_A_NPS) ? " NPS" : "",
302                     (temp & RH_A_PSM) ? " PSM" : "", ndp);
303                 temp = roothub_b(controller);
304                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
305                     temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
306                     );
307                 temp = roothub_status(controller);
308                 dbg("roothub.status: %08x%s%s%s%s%s%s",
309                     temp,
310                     (temp & RH_HS_CRWE) ? " CRWE" : "",
311                     (temp & RH_HS_OCIC) ? " OCIC" : "",
312                     (temp & RH_HS_LPSC) ? " LPSC" : "",
313                     (temp & RH_HS_DRWE) ? " DRWE" : "",
314                     (temp & RH_HS_OCI) ? " OCI" : "",
315                     (temp & RH_HS_LPS) ? " LPS" : "");
316         }
317
318         for (i = 0; i < ndp; i++) {
319                 temp = roothub_portstatus(controller, i);
320                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
321                     i,
322                     temp,
323                     (temp & RH_PS_PRSC) ? " PRSC" : "",
324                     (temp & RH_PS_OCIC) ? " OCIC" : "",
325                     (temp & RH_PS_PSSC) ? " PSSC" : "",
326                     (temp & RH_PS_PESC) ? " PESC" : "",
327                     (temp & RH_PS_CSC) ? " CSC" : "",
328                     (temp & RH_PS_LSDA) ? " LSDA" : "",
329                     (temp & RH_PS_PPS) ? " PPS" : "",
330                     (temp & RH_PS_PRS) ? " PRS" : "",
331                     (temp & RH_PS_POCI) ? " POCI" : "",
332                     (temp & RH_PS_PSS) ? " PSS" : "",
333                     (temp & RH_PS_PES) ? " PES" : "",
334                     (temp & RH_PS_CCS) ? " CCS" : "");
335         }
336 }
337
338 static void ohci_dump(struct ohci *controller, int verbose)
339 {
340         dbg("OHCI controller usb-%s state", controller->slot_name);
341
342         /* dumps some of the state we know about */
343         ohci_dump_status(controller);
344         if (verbose)
345                 ep_print_int_eds(controller, "hcca");
346         dbg("hcca frame #%04x", controller->hcca->frame_no);
347         ohci_dump_roothub(controller, 1);
348 }
349
350 #endif /* DEBUG */
351
352 /*-------------------------------------------------------------------------*
353  * Interface functions (URB)
354  *-------------------------------------------------------------------------*/
355
356 /* get a transfer request */
357
358 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
359                      int transfer_len, struct devrequest *setup, int interval)
360 {
361         struct ohci *ohci;
362         struct ed *ed;
363         struct urb_priv *purb_priv;
364         int i, size = 0;
365
366         ohci = &gohci;
367
368         /* when controller's hung, permit only roothub cleanup attempts
369          * such as powering down ports */
370         if (ohci->disabled) {
371                 err("sohci_submit_job: EPIPE");
372                 return -1;
373         }
374
375         /* if we have an unfinished URB from previous transaction let's
376          * fail and scream as quickly as possible so as not to corrupt
377          * further communication */
378         if (!urb_finished) {
379                 err("sohci_submit_job: URB NOT FINISHED");
380                 return -1;
381         }
382         /* we're about to begin a new transaction here
383            so mark the URB unfinished */
384         urb_finished = 0;
385
386         /* every endpoint has a ed, locate and fill it */
387         ed = ep_add_ed(dev, pipe);
388         if (!ed) {
389                 err("sohci_submit_job: ENOMEM");
390                 return -1;
391         }
392
393         /* for the private part of the URB we need the number of TDs (size) */
394         switch (usb_pipetype(pipe)) {
395         case PIPE_BULK:
396                 /* one TD for every 4096 Byte */
397                 size = (transfer_len - 1) / 4096 + 1;
398                 break;
399         case PIPE_CONTROL:
400                 /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
401                 size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
402                 break;
403         }
404
405         if (size >= (N_URB_TD - 1)) {
406                 err("need %d TDs, only have %d", size, N_URB_TD);
407                 return -1;
408         }
409         purb_priv = &urb_priv;
410         purb_priv->pipe = pipe;
411
412         /* fill the private part of the URB */
413         purb_priv->length = size;
414         purb_priv->ed = ed;
415         purb_priv->actual_length = 0;
416
417         /* allocate the TDs */
418         /* note that td[0] was allocated in ep_add_ed */
419         for (i = 0; i < size; i++) {
420                 purb_priv->td[i] = td_alloc(dev);
421                 if (!purb_priv->td[i]) {
422                         purb_priv->length = i;
423                         urb_free_priv(purb_priv);
424                         err("sohci_submit_job: ENOMEM");
425                         return -1;
426                 }
427         }
428
429         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
430                 urb_free_priv(purb_priv);
431                 err("sohci_submit_job: EINVAL");
432                 return -1;
433         }
434
435         /* link the ed into a chain if is not already */
436         if (ed->state != ED_OPER)
437                 ep_link(ohci, ed);
438
439         /* fill the TDs and link it to the ed */
440         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
441                       interval);
442
443         return 0;
444 }
445
446 /*-------------------------------------------------------------------------*/
447
448 #ifdef DEBUG
449 /* tell us the current USB frame number */
450
451 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
452 {
453         struct ohci *ohci = &gohci;
454
455         return m16_swap(ohci->hcca->frame_no);
456 }
457 #endif
458
459 /*-------------------------------------------------------------------------*
460  * ED handling functions
461  *-------------------------------------------------------------------------*/
462
463 /* link an ed into one of the HC chains */
464
465 static int ep_link(struct ohci *ohci, struct ed *edi)
466 {
467         struct ed *ed = edi;
468
469         ed->state = ED_OPER;
470
471         switch (ed->type) {
472         case PIPE_CONTROL:
473                 ed->hwNextED = 0;
474                 if (ohci->ed_controltail == NULL) {
475                         writel((u32)ed, &ohci->regs->ed_controlhead);
476                 } else {
477                         ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
478                 }
479                 ed->ed_prev = ohci->ed_controltail;
480                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
481                     !ohci->ed_rm_list[1] && !ohci->sleeping) {
482                         ohci->hc_control |= OHCI_CTRL_CLE;
483                         writel(ohci->hc_control, &ohci->regs->control);
484                 }
485                 ohci->ed_controltail = edi;
486                 break;
487
488         case PIPE_BULK:
489                 ed->hwNextED = 0;
490                 if (ohci->ed_bulktail == NULL) {
491                         writel((u32)ed, &ohci->regs->ed_bulkhead);
492                 } else {
493                         ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
494                 }
495                 ed->ed_prev = ohci->ed_bulktail;
496                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
497                     !ohci->ed_rm_list[1] && !ohci->sleeping) {
498                         ohci->hc_control |= OHCI_CTRL_BLE;
499                         writel(ohci->hc_control, &ohci->regs->control);
500                 }
501                 ohci->ed_bulktail = edi;
502                 break;
503         }
504         return 0;
505 }
506
507 /*-------------------------------------------------------------------------*/
508
509 /* unlink an ed from one of the HC chains.
510  * just the link to the ed is unlinked.
511  * the link from the ed still points to another operational ed or 0
512  * so the HC can eventually finish the processing of the unlinked ed */
513
514 static int ep_unlink(struct ohci *ohci, struct ed *ed)
515 {
516         struct ed *next;
517         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
518
519         switch (ed->type) {
520         case PIPE_CONTROL:
521                 if (ed->ed_prev == NULL) {
522                         if (!ed->hwNextED) {
523                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
524                                 writel(ohci->hc_control, &ohci->regs->control);
525                         }
526                         writel(m32_swap(*((__u32 *) &ed->hwNextED)),
527                                &ohci->regs->ed_controlhead);
528                 } else {
529                         ed->ed_prev->hwNextED = ed->hwNextED;
530                 }
531                 if (ohci->ed_controltail == ed) {
532                         ohci->ed_controltail = ed->ed_prev;
533                 } else {
534                         next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
535                         next->ed_prev = ed->ed_prev;
536                 }
537                 break;
538
539         case PIPE_BULK:
540                 if (ed->ed_prev == NULL) {
541                         if (!ed->hwNextED) {
542                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
543                                 writel(ohci->hc_control, &ohci->regs->control);
544                         }
545                         writel(m32_swap(*((__u32 *) &ed->hwNextED)),
546                                &ohci->regs->ed_bulkhead);
547                 } else {
548                         ed->ed_prev->hwNextED = ed->hwNextED;
549                 }
550                 if (ohci->ed_bulktail == ed) {
551                         ohci->ed_bulktail = ed->ed_prev;
552                 } else {
553                         next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
554                         next->ed_prev = ed->ed_prev;
555                 }
556                 break;
557         }
558         ed->state = ED_UNLINK;
559         return 0;
560 }
561
562 /*-------------------------------------------------------------------------*/
563
564 /* add/reinit an endpoint; this should be done once at the usb_set_configuration
565  * command, but the USB stack is a little bit stateless  so we do it at every
566  * transaction. If the state of the ed is ED_NEW then a dummy td is added and
567  * the state is changed to ED_UNLINK. In all other cases the state is left
568  * unchanged. The ed info fields are setted anyway even though most of them
569  * should not change */
570
571 static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
572 {
573         struct td *td;
574         struct ed *ed_ret;
575         struct ed *ed;
576
577         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
578                                    (usb_pipecontrol(pipe) ? 0 :
579                                     usb_pipeout(pipe))];
580
581         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
582                 err("ep_add_ed: pending delete");
583                 /* pending delete request */
584                 return NULL;
585         }
586
587         if (ed->state == ED_NEW) {
588                 ed->hwINFO = m32_swap(OHCI_ED_SKIP);    /* skip ed */
589                 /* dummy td; end of td list for ed */
590                 td = td_alloc(usb_dev);
591                 ed->hwTailP = (__u32) m32_swap(td);
592                 ed->hwHeadP = ed->hwTailP;
593                 ed->state = ED_UNLINK;
594                 ed->type = usb_pipetype(pipe);
595                 ohci_dev.ed_cnt++;
596         }
597
598         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
599                               | usb_pipeendpoint(pipe) << 7
600                               | (usb_pipeisoc(pipe) ? 0x8000 : 0)
601                               | (usb_pipecontrol(pipe) ? 0 :
602                                  (usb_pipeout(pipe) ? 0x800 : 0x1000))
603                               | (usb_dev->speed == USB_SPEED_LOW) << 13 |
604                               usb_maxpacket(usb_dev, pipe) << 16);
605
606         return ed_ret;
607 }
608
609 /*-------------------------------------------------------------------------*
610  * TD handling functions
611  *-------------------------------------------------------------------------*/
612
613 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
614
615 static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,
616                     struct usb_device *dev, int index,
617                     struct urb_priv *urb_priv)
618 {
619         struct td *td, *td_pt;
620 #ifdef OHCI_FILL_TRACE
621         int i;
622 #endif
623
624         if (index > urb_priv->length) {
625                 err("index > length");
626                 return;
627         }
628         /* use this td as the next dummy */
629         td_pt = urb_priv->td[index];
630         td_pt->hwNextTD = 0;
631
632         /* fill the old dummy TD */
633         td = urb_priv->td[index] =
634             (struct td *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
635
636         td->ed = urb_priv->ed;
637         td->next_dl_td = NULL;
638         td->index = index;
639         td->data = (__u32) data;
640 #ifdef OHCI_FILL_TRACE
641         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
642                 for (i = 0; i < len; i++)
643                         printf("td->data[%d] %#2x ", i,
644                                ((unsigned char *)td->data)[i]);
645                 printf("\n");
646         }
647 #endif
648         if (!len)
649                 data = 0;
650
651         td->hwINFO = (__u32) m32_swap(info);
652         td->hwCBP = (__u32) m32_swap(data);
653         if (data)
654                 td->hwBE = (__u32) m32_swap(data + len - 1);
655         else
656                 td->hwBE = 0;
657         td->hwNextTD = (__u32) m32_swap(td_pt);
658
659         /* append to queue */
660         td->ed->hwTailP = td->hwNextTD;
661 }
662
663 /*-------------------------------------------------------------------------*/
664
665 /* prepare all TDs of a transfer */
666
667 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
668                           void *buffer, int transfer_len,
669                           struct devrequest *setup, struct urb_priv *urb,
670                           int interval)
671 {
672         struct ohci *ohci = &gohci;
673         int data_len = transfer_len;
674         void *data;
675         int cnt = 0;
676         __u32 info = 0;
677         unsigned int toggle = 0;
678
679         /* OHCI handles the DATA-toggles itself, we just
680            use the USB-toggle bits for reseting */
681         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
682                 toggle = TD_T_TOGGLE;
683         } else {
684                 toggle = TD_T_DATA0;
685                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
686                               1);
687         }
688         urb->td_cnt = 0;
689         if (data_len)
690                 data = buffer;
691         else
692                 data = 0;
693
694         switch (usb_pipetype(pipe)) {
695         case PIPE_BULK:
696                 info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
697                 while (data_len > 4096) {
698                         td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
699                                 4096, dev, cnt, urb);
700                         data += 4096;
701                         data_len -= 4096;
702                         cnt++;
703                 }
704                 info = usb_pipeout(pipe) ?
705                                 TD_CC | TD_DP_OUT :
706                                 TD_CC | TD_R | TD_DP_IN;
707                 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
708                         data_len, dev, cnt, urb);
709                 cnt++;
710
711                 if (!ohci->sleeping)
712                         /* start bulk list */
713                         writel(OHCI_BLF, &ohci->regs->cmdstatus);
714                 break;
715
716         case PIPE_CONTROL:
717                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
718                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
719                 if (data_len > 0) {
720                         info = usb_pipeout(pipe) ?
721                             TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
722                             TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
723                         /* NOTE:  mishandles transfers >8K, some >4K */
724                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
725                 }
726                 info = usb_pipeout(pipe) ?
727                     TD_CC | TD_DP_IN | TD_T_DATA1 :
728                     TD_CC | TD_DP_OUT | TD_T_DATA1;
729                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
730                 if (!ohci->sleeping)
731                         /* start Control list */
732                         writel(OHCI_CLF, &ohci->regs->cmdstatus);
733                 break;
734         }
735         if (urb->length != cnt)
736                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
737 }
738
739 /*-------------------------------------------------------------------------*
740  * Done List handling functions
741  *-------------------------------------------------------------------------*/
742
743
744 /* calculate the transfer length and update the urb */
745
746 static void dl_transfer_length(struct td *td)
747 {
748         __u32 tdBE, tdCBP;
749         struct urb_priv *lurb_priv = &urb_priv;
750
751         tdBE = m32_swap(td->hwBE);
752         tdCBP = m32_swap(td->hwCBP);
753
754         if (!(usb_pipecontrol(lurb_priv->pipe) &&
755               ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
756                 if (tdBE != 0) {
757                         if (td->hwCBP == 0)
758                                 lurb_priv->actual_length += tdBE - td->data + 1;
759                         else
760                                 lurb_priv->actual_length += tdCBP - td->data;
761                 }
762         }
763 }
764
765 /*-------------------------------------------------------------------------*/
766
767 /* replies to the request have to be on a FIFO basis so
768  * we reverse the reversed done-list */
769
770 static struct td *dl_reverse_done_list(struct ohci *ohci)
771 {
772         __u32 td_list_hc;
773         __u32 tmp;
774         struct td *td_rev = NULL;
775         struct td *td_list = NULL;
776         struct urb_priv *lurb_priv = NULL;
777
778         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
779         ohci->hcca->done_head = 0;
780
781         while (td_list_hc) {
782                 td_list = (struct td *) td_list_hc;
783
784                 if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
785                         lurb_priv = &urb_priv;
786                         dbg(" USB-error/status: %x : %p",
787                             TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
788                         if (td_list->ed->hwHeadP & m32_swap(0x1)) {
789                                 if (lurb_priv &&
790                                     ((td_list->index+1) < lurb_priv->length)) {
791                                         tmp = lurb_priv->length - 1;
792                                         td_list->ed->hwHeadP =
793                                                 (lurb_priv->td[tmp]->hwNextTD &
794                                                  m32_swap(0xfffffff0)) |
795                                                  (td_list->ed->hwHeadP &
796                                                   m32_swap(0x2));
797                                         lurb_priv->td_cnt += lurb_priv->length -
798                                                              td_list->index - 1;
799                                 } else
800                                         td_list->ed->hwHeadP &=
801                                             m32_swap(0xfffffff2);
802                         }
803                 }
804
805                 td_list->next_dl_td = td_rev;
806                 td_rev = td_list;
807                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
808         }
809
810         return td_list;
811 }
812
813 /*-------------------------------------------------------------------------*/
814
815 /* td done list */
816 static int dl_done_list(struct ohci *ohci, struct td *td_list)
817 {
818         struct td *td_list_next = NULL;
819         struct ed *ed;
820         int cc = 0;
821         int stat = 0;
822         /* urb_t *urb; */
823         struct urb_priv *lurb_priv;
824         __u32 tdINFO, edHeadP, edTailP;
825
826         while (td_list) {
827                 td_list_next = td_list->next_dl_td;
828
829                 lurb_priv = &urb_priv;
830                 tdINFO = m32_swap(td_list->hwINFO);
831
832                 ed = td_list->ed;
833
834                 dl_transfer_length(td_list);
835
836                 /* error code of transfer */
837                 cc = TD_CC_GET(tdINFO);
838                 if (cc != 0) {
839                         dbg("ConditionCode %#x", cc);
840                         stat = cc_to_error[cc];
841                 }
842
843                 /* see if this done list makes for all TD's of current URB,
844                  * and mark the URB finished if so */
845                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
846                         if ((ed->state & (ED_OPER | ED_UNLINK)))
847                                 urb_finished = 1;
848                         else
849                                 dbg("dl_done_list: strange.., ED state %x, "
850                                     "ed->state\n");
851                 } else
852                         dbg("dl_done_list: processing TD %x, len %x\n",
853                             lurb_priv->td_cnt, lurb_priv->length);
854
855                 if (ed->state != ED_NEW) {
856                         edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
857                         edTailP = m32_swap(ed->hwTailP);
858
859                         /* unlink eds if they are not busy */
860                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
861                                 ep_unlink(ohci, ed);
862                 }
863
864                 td_list = td_list_next;
865         }
866         return stat;
867 }
868
869 /*-------------------------------------------------------------------------*
870  * Virtual Root Hub
871  *-------------------------------------------------------------------------*/
872
873 #include <usbroothubdes.h>
874
875 /* Hub class-specific descriptor is constructed dynamically */
876
877
878 /*-------------------------------------------------------------------------*/
879
880 #define OK(x)                   len = (x); break
881 #ifdef DEBUG
882 #define WR_RH_STAT(x) \
883 { \
884         info("WR:status %#8x", (x)); \
885         writel((x), &gohci.regs->roothub.status); \
886 }
887 #define WR_RH_PORTSTAT(x) \
888 { \
889         info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
890         writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
891 }
892 #else
893 #define WR_RH_STAT(x) \
894         writel((x), &gohci.regs->roothub.status)
895 #define WR_RH_PORTSTAT(x)\
896         writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
897 #endif
898 #define RD_RH_STAT      roothub_status(&gohci)
899 #define RD_RH_PORTSTAT  roothub_portstatus(&gohci, wIndex-1)
900
901 /* request to virtual root hub */
902
903 int rh_check_port_status(struct ohci *controller)
904 {
905         __u32 temp, ndp, i;
906         int res;
907
908         res = -1;
909         temp = roothub_a(controller);
910         ndp = (temp & RH_A_NDP);
911         for (i = 0; i < ndp; i++) {
912                 temp = roothub_portstatus(controller, i);
913                 /* check for a device disconnect */
914                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
915                      (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
916                         res = i;
917                         break;
918                 }
919         }
920         return res;
921 }
922
923 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
924                               void *buffer, int transfer_len,
925                               struct devrequest *cmd)
926 {
927         void *data = buffer;
928         int leni = transfer_len;
929         int len = 0;
930         int stat = 0;
931         union {
932                 __u32 word[4];
933                 __u16 hword[8];
934                 __u8 byte[16];
935         } datab;
936         __u8 *data_buf = datab.byte;
937         __u16 bmRType_bReq;
938         __u16 wValue;
939         __u16 wIndex;
940         __u16 wLength;
941
942 #ifdef DEBUG
943         urb_priv.actual_length = 0;
944         pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
945                   usb_pipein(pipe));
946 #else
947         mdelay(1);
948 #endif
949         if (usb_pipeint(pipe)) {
950                 info("Root-Hub submit IRQ: NOT implemented");
951                 return 0;
952         }
953
954         bmRType_bReq = cmd->requesttype | (cmd->request << 8);
955         wValue = m16_swap(cmd->value);
956         wIndex = m16_swap(cmd->index);
957         wLength = m16_swap(cmd->length);
958
959         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
960              dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
961
962         switch (bmRType_bReq) {
963                 /* Request Destination:
964                    without flags: Device,
965                    RH_INTERFACE: interface,
966                    RH_ENDPOINT: endpoint,
967                    RH_CLASS means HUB here,
968                    RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
969                  */
970
971         case RH_GET_STATUS:
972                 datab.hword[0] = m16_swap(1);
973                 OK(2);
974         case RH_GET_STATUS | RH_INTERFACE:
975                 datab.hword[0] = m16_swap(0);
976                 OK(2);
977         case RH_GET_STATUS | RH_ENDPOINT:
978                 datab.hword[0] = m16_swap(0);
979                 OK(2);
980         case RH_GET_STATUS | RH_CLASS:
981                 datab.word[0] =
982                     m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
983                 OK(4);
984         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
985                 datab.word[0] = m32_swap(RD_RH_PORTSTAT);
986                 OK(4);
987
988         case RH_CLEAR_FEATURE | RH_ENDPOINT:
989                 switch (wValue) {
990                 case (RH_ENDPOINT_STALL):
991                         OK(0);
992                 }
993                 break;
994
995         case RH_CLEAR_FEATURE | RH_CLASS:
996                 switch (wValue) {
997                 case RH_C_HUB_LOCAL_POWER:
998                         OK(0);
999                 case (RH_C_HUB_OVER_CURRENT):
1000                         WR_RH_STAT(RH_HS_OCIC);
1001                         OK(0);
1002                 }
1003                 break;
1004
1005         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1006                 switch (wValue) {
1007                 case (RH_PORT_ENABLE):
1008                         WR_RH_PORTSTAT(RH_PS_CCS);
1009                         OK(0);
1010                 case (RH_PORT_SUSPEND):
1011                         WR_RH_PORTSTAT(RH_PS_POCI);
1012                         OK(0);
1013                 case (RH_PORT_POWER):
1014                         WR_RH_PORTSTAT(RH_PS_LSDA);
1015                         OK(0);
1016                 case (RH_C_PORT_CONNECTION):
1017                         WR_RH_PORTSTAT(RH_PS_CSC);
1018                         OK(0);
1019                 case (RH_C_PORT_ENABLE):
1020                         WR_RH_PORTSTAT(RH_PS_PESC);
1021                         OK(0);
1022                 case (RH_C_PORT_SUSPEND):
1023                         WR_RH_PORTSTAT(RH_PS_PSSC);
1024                         OK(0);
1025                 case (RH_C_PORT_OVER_CURRENT):
1026                         WR_RH_PORTSTAT(RH_PS_OCIC);
1027                         OK(0);
1028                 case (RH_C_PORT_RESET):
1029                         WR_RH_PORTSTAT(RH_PS_PRSC);
1030                         OK(0);
1031                 }
1032                 break;
1033
1034         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1035                 switch (wValue) {
1036                 case (RH_PORT_SUSPEND):
1037                         WR_RH_PORTSTAT(RH_PS_PSS);
1038                         OK(0);
1039                 case (RH_PORT_RESET):   /* BUG IN HUP CODE ******** */
1040                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1041                                 WR_RH_PORTSTAT(RH_PS_PRS);
1042                         OK(0);
1043                 case (RH_PORT_POWER):
1044                         WR_RH_PORTSTAT(RH_PS_PPS);
1045                         OK(0);
1046                 case (RH_PORT_ENABLE):  /* BUG IN HUP CODE ******** */
1047                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1048                                 WR_RH_PORTSTAT(RH_PS_PES);
1049                         OK(0);
1050                 }
1051                 break;
1052
1053         case RH_SET_ADDRESS:
1054                 gohci.rh.devnum = wValue;
1055                 OK(0);
1056
1057         case RH_GET_DESCRIPTOR:
1058                 switch ((wValue & 0xff00) >> 8) {
1059                 case (0x01):    /* device descriptor */
1060                         len = min_t(unsigned int,
1061                                     leni,
1062                                     min_t(unsigned int,
1063                                           sizeof(root_hub_dev_des), wLength));
1064                         data_buf = root_hub_dev_des;
1065                         OK(len);
1066                 case (0x02):    /* configuration descriptor */
1067                         len = min_t(unsigned int,
1068                                     leni,
1069                                     min_t(unsigned int,
1070                                           sizeof(root_hub_config_des),
1071                                           wLength));
1072                         data_buf = root_hub_config_des;
1073                         OK(len);
1074                 case (0x03):    /* string descriptors */
1075                         if (wValue == 0x0300) {
1076                                 len = min_t(unsigned int,
1077                                             leni,
1078                                             min_t(unsigned int,
1079                                                   sizeof(root_hub_str_index0),
1080                                                   wLength));
1081                                 data_buf = root_hub_str_index0;
1082                                 OK(len);
1083                         }
1084                         if (wValue == 0x0301) {
1085                                 len = min_t(unsigned int,
1086                                             leni,
1087                                             min_t(unsigned int,
1088                                                   sizeof(root_hub_str_index1),
1089                                                   wLength));
1090                                 data_buf = root_hub_str_index1;
1091                                 OK(len);
1092                         }
1093                 default:
1094                         stat = USB_ST_STALLED;
1095                 }
1096                 break;
1097
1098         case RH_GET_DESCRIPTOR | RH_CLASS:
1099                 {
1100                         __u32 temp = roothub_a(&gohci);
1101
1102                         data_buf[0] = 9;        /* min length; */
1103                         data_buf[1] = 0x29;
1104                         data_buf[2] = temp & RH_A_NDP;
1105                         data_buf[3] = 0;
1106                         if (temp & RH_A_PSM)
1107                                 /* per-port power switching? */
1108                                 data_buf[3] |= 0x1;
1109                         if (temp & RH_A_NOCP)
1110                                 /* no overcurrent reporting? */
1111                                 data_buf[3] |= 0x10;
1112                         else if (temp & RH_A_OCPM)
1113                                 /* per-port overcurrent reporting? */
1114                                 data_buf[3] |= 0x8;
1115
1116                         /* corresponds to data_buf[4-7] */
1117                         datab.word[1] = 0;
1118                         data_buf[5] = (temp & RH_A_POTPGT) >> 24;
1119                         temp = roothub_b(&gohci);
1120                         data_buf[7] = temp & RH_B_DR;
1121                         if (data_buf[2] < 7) {
1122                                 data_buf[8] = 0xff;
1123                         } else {
1124                                 data_buf[0] += 2;
1125                                 data_buf[8] = (temp & RH_B_DR) >> 8;
1126                                 data_buf[10] = data_buf[9] = 0xff;
1127                         }
1128
1129                         len = min_t(unsigned int, leni,
1130                                     min_t(unsigned int, data_buf[0], wLength));
1131                         OK(len);
1132                 }
1133
1134         case RH_GET_CONFIGURATION:
1135                 *(__u8 *) data_buf = 0x01;
1136                 OK(1);
1137
1138         case RH_SET_CONFIGURATION:
1139                 WR_RH_STAT(0x10000);
1140                 OK(0);
1141
1142         default:
1143                 dbg("unsupported root hub command");
1144                 stat = USB_ST_STALLED;
1145         }
1146
1147 #ifdef  DEBUG
1148         ohci_dump_roothub(&gohci, 1);
1149 #else
1150         mdelay(1);
1151 #endif
1152
1153         len = min_t(int, len, leni);
1154         if (data != data_buf)
1155                 memcpy(data, data_buf, len);
1156         dev->act_len = len;
1157         dev->status = stat;
1158
1159 #ifdef DEBUG
1160         if (transfer_len)
1161                 urb_priv.actual_length = transfer_len;
1162         pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
1163                   0 /*usb_pipein(pipe) */);
1164 #else
1165         mdelay(1);
1166 #endif
1167
1168         return stat;
1169 }
1170
1171 /*-------------------------------------------------------------------------*/
1172
1173 /* common code for handling submit messages - used for all but root hub */
1174 /* accesses. */
1175 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1176                       int transfer_len, struct devrequest *setup, int interval)
1177 {
1178         int stat = 0;
1179         int maxsize = usb_maxpacket(dev, pipe);
1180         int timeout;
1181
1182         /* device pulled? Shortcut the action. */
1183         if (devgone == dev) {
1184                 dev->status = USB_ST_CRC_ERR;
1185                 return 0;
1186         }
1187 #ifdef DEBUG
1188         urb_priv.actual_length = 0;
1189         pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1190                   usb_pipein(pipe));
1191 #else
1192         mdelay(1);
1193 #endif
1194         if (!maxsize) {
1195                 err("submit_common_message: pipesize for pipe %lx is zero",
1196                     pipe);
1197                 return -1;
1198         }
1199
1200         if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
1201             0) {
1202                 err("sohci_submit_job failed");
1203                 return -1;
1204         }
1205
1206         mdelay(10);
1207         /* ohci_dump_status(&gohci); */
1208
1209         /* allow more time for a BULK device to react - some are slow */
1210 #define BULK_TO  5000           /* timeout in milliseconds */
1211         if (usb_pipebulk(pipe))
1212                 timeout = BULK_TO;
1213         else
1214                 timeout = 100;
1215
1216         /* wait for it to complete */
1217         for (;;) {
1218                 /* check whether the controller is done */
1219                 stat = hc_interrupt();
1220
1221                 if (stat < 0) {
1222                         stat = USB_ST_CRC_ERR;
1223                         break;
1224                 }
1225
1226                 /* NOTE: since we are not interrupt driven in U-Boot and always
1227                  * handle only one URB at a time, we cannot assume the
1228                  * transaction finished on the first successful return from
1229                  * hc_interrupt().. unless the flag for current URB is set,
1230                  * meaning that all TD's to/from device got actually
1231                  * transferred and processed. If the current URB is not
1232                  * finished we need to re-iterate this loop so as
1233                  * hc_interrupt() gets called again as there needs to be some
1234                  * more TD's to process still */
1235                 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1236                         /* 0xff is returned for an SF-interrupt */
1237                         break;
1238                 }
1239
1240                 if (--timeout) {
1241                         mdelay(1);
1242                         if (!urb_finished)
1243                                 dbg("\%");
1244
1245                 } else {
1246                         err("CTL:TIMEOUT ");
1247                         dbg("submit_common_msg: TO status %x\n", stat);
1248                         stat = USB_ST_CRC_ERR;
1249                         urb_finished = 1;
1250                         break;
1251                 }
1252         }
1253
1254 #if 0
1255         /* we got an Root Hub Status Change interrupt */
1256         if (got_rhsc) {
1257 #ifdef DEBUG
1258                 ohci_dump_roothub(&gohci, 1);
1259 #endif
1260                 got_rhsc = 0;
1261                 /* abuse timeout */
1262                 timeout = rh_check_port_status(&gohci);
1263                 if (timeout >= 0) {
1264 #if 0                   /* this does nothing useful, but leave it here
1265                            in case that changes */
1266                         /* the called routine adds 1 to the passed value */
1267                         usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1268 #endif
1269                         /*
1270                          * XXX
1271                          * This is potentially dangerous because it assumes
1272                          * that only one device is ever plugged in!
1273                          */
1274                         devgone = dev;
1275                 }
1276         }
1277 #endif
1278
1279         dev->status = stat;
1280         dev->act_len = transfer_len;
1281
1282 #ifdef DEBUG
1283         pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
1284                   usb_pipein(pipe));
1285 #else
1286         mdelay(1);
1287 #endif
1288
1289         /* free TDs in urb_priv */
1290         urb_free_priv(&urb_priv);
1291         return 0;
1292 }
1293
1294 /* submit routines called from usb.c */
1295 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1296                     int transfer_len)
1297 {
1298         info("submit_bulk_msg");
1299         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1300 }
1301
1302 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1303                        int transfer_len, struct devrequest *setup)
1304 {
1305         int maxsize = usb_maxpacket(dev, pipe);
1306
1307         info("submit_control_msg");
1308 #ifdef DEBUG
1309         urb_priv.actual_length = 0;
1310         pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1311                   usb_pipein(pipe));
1312 #else
1313         mdelay(1);
1314 #endif
1315         if (!maxsize) {
1316                 err("submit_control_message: pipesize for pipe %lx is zero",
1317                     pipe);
1318                 return -1;
1319         }
1320         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1321                 gohci.rh.dev = dev;
1322                 /* root hub - redirect */
1323                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1324                                           setup);
1325         }
1326
1327         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1328 }
1329
1330 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1331                    int transfer_len, int interval)
1332 {
1333         info("submit_int_msg");
1334         return -1;
1335 }
1336
1337 /*-------------------------------------------------------------------------*
1338  * HC functions
1339  *-------------------------------------------------------------------------*/
1340
1341 /* reset the HC and BUS */
1342
1343 static int hc_reset(struct ohci *ohci)
1344 {
1345         int timeout = 30;
1346         int smm_timeout = 50;   /* 0,5 sec */
1347
1348         if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1349                 /* SMM owns the HC - request ownership */
1350                 writel(OHCI_OCR, &ohci->regs->cmdstatus);
1351                 info("USB HC TakeOver from SMM");
1352                 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1353                         mdelay(10);
1354                         if (--smm_timeout == 0) {
1355                                 err("USB HC TakeOver failed!");
1356                                 return -1;
1357                         }
1358                 }
1359         }
1360
1361         /* Disable HC interrupts */
1362         writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1363
1364         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1365             ohci->slot_name, readl(&ohci->regs->control));
1366
1367         /* Reset USB (needed by some controllers) */
1368         writel(0, &ohci->regs->control);
1369
1370         /* HC Reset requires max 10 us delay */
1371         writel(OHCI_HCR, &ohci->regs->cmdstatus);
1372         while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1373                 if (--timeout == 0) {
1374                         err("USB HC reset timed out!");
1375                         return -1;
1376                 }
1377                 udelay(1);
1378         }
1379         return 0;
1380 }
1381
1382 /*-------------------------------------------------------------------------*/
1383
1384 /* Start an OHCI controller, set the BUS operational
1385  * enable interrupts
1386  * connect the virtual root hub */
1387
1388 static int hc_start(struct ohci *ohci)
1389 {
1390         __u32 mask;
1391         unsigned int fminterval;
1392
1393         ohci->disabled = 1;
1394
1395         /* Tell the controller where the control and bulk lists are
1396          * The lists are empty now. */
1397
1398         writel(0, &ohci->regs->ed_controlhead);
1399         writel(0, &ohci->regs->ed_bulkhead);
1400
1401         /* a reset clears this */
1402         writel((__u32) ohci->hcca, &ohci->regs->hcca);
1403
1404         fminterval = 0x2edf;
1405         writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1406         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1407         writel(fminterval, &ohci->regs->fminterval);
1408         writel(0x628, &ohci->regs->lsthresh);
1409
1410         /* start controller operations */
1411         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1412         ohci->disabled = 0;
1413         writel(ohci->hc_control, &ohci->regs->control);
1414
1415         /* disable all interrupts */
1416         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1417                 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1418                 OHCI_INTR_OC | OHCI_INTR_MIE);
1419         writel(mask, &ohci->regs->intrdisable);
1420         /* clear all interrupts */
1421         mask &= ~OHCI_INTR_MIE;
1422         writel(mask, &ohci->regs->intrstatus);
1423         /* Choose the interrupts we care about now  - but w/o MIE */
1424         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1425         writel(mask, &ohci->regs->intrenable);
1426
1427 #ifdef  OHCI_USE_NPS
1428         /* required for AMD-756 and some Mac platforms */
1429         writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1430                &ohci->regs->roothub.a);
1431         writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1432 #endif /* OHCI_USE_NPS */
1433
1434         /* POTPGT delay is bits 24-31, in 2 ms units. */
1435         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1436
1437         /* connect the virtual root hub */
1438         ohci->rh.devnum = 0;
1439
1440         return 0;
1441 }
1442
1443 /*-------------------------------------------------------------------------*/
1444
1445 /* an interrupt happens */
1446
1447 static int hc_interrupt(void)
1448 {
1449         struct ohci *ohci = &gohci;
1450         struct ohci_regs *regs = ohci->regs;
1451         int ints;
1452         int stat = -1;
1453
1454         if ((ohci->hcca->done_head != 0) &&
1455             !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1456
1457                 ints = OHCI_INTR_WDH;
1458
1459         } else {
1460                 ints = readl(&regs->intrstatus);
1461                 if (ints == ~(u32) 0) {
1462                         ohci->disabled++;
1463                         err("%s device removed!", ohci->slot_name);
1464                         return -1;
1465                 }
1466                 ints &= readl(&regs->intrenable);
1467                 if (ints == 0) {
1468                         dbg("hc_interrupt: returning..\n");
1469                         return 0xff;
1470                 }
1471         }
1472
1473         /* dbg("Interrupt: %x frame: %x", ints,
1474             le16_to_cpu(ohci->hcca->frame_no)); */
1475
1476         if (ints & OHCI_INTR_RHSC) {
1477                 got_rhsc = 1;
1478                 stat = 0xff;
1479         }
1480
1481         if (ints & OHCI_INTR_UE) {
1482                 ohci->disabled++;
1483                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1484                     ohci->slot_name);
1485                 /* e.g. due to PCI Master/Target Abort */
1486
1487 #ifdef  DEBUG
1488                 ohci_dump(ohci, 1);
1489 #else
1490                 mdelay(1);
1491 #endif
1492                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1493                 /* Make some non-interrupt context restart the controller. */
1494                 /* Count and limit the retries though; either hardware or */
1495                 /* software errors can go forever... */
1496                 hc_reset(ohci);
1497                 return -1;
1498         }
1499
1500         if (ints & OHCI_INTR_WDH) {
1501                 mdelay(1);
1502
1503                 writel(OHCI_INTR_WDH, &regs->intrdisable);
1504                 stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
1505                 writel(OHCI_INTR_WDH, &regs->intrenable);
1506         }
1507
1508         if (ints & OHCI_INTR_SO) {
1509                 dbg("USB Schedule overrun\n");
1510                 writel(OHCI_INTR_SO, &regs->intrenable);
1511                 stat = -1;
1512         }
1513
1514         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1515         if (ints & OHCI_INTR_SF) {
1516                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1517                 mdelay(1);
1518                 writel(OHCI_INTR_SF, &regs->intrdisable);
1519                 if (ohci->ed_rm_list[frame] != NULL)
1520                         writel(OHCI_INTR_SF, &regs->intrenable);
1521                 stat = 0xff;
1522         }
1523
1524         writel(ints, &regs->intrstatus);
1525         return stat;
1526 }
1527
1528 /*-------------------------------------------------------------------------*/
1529
1530 /*-------------------------------------------------------------------------*/
1531
1532 /* De-allocate all resources.. */
1533
1534 static void hc_release_ohci(struct ohci *ohci)
1535 {
1536         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1537
1538         if (!ohci->disabled)
1539                 hc_reset(ohci);
1540 }
1541
1542 /*-------------------------------------------------------------------------*/
1543
1544 /*
1545  * low level initalisation routine, called from usb.c
1546  */
1547 static char ohci_inited = 0;
1548
1549 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1550 {
1551         struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1552         struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
1553
1554         /*
1555          * Set the 48 MHz UPLL clocking. Values are taken from
1556          * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1557          */
1558         clk_power->upllcon = ((40 << 12) + (1 << 4) + 2);
1559         gpio->misccr |= 0x8;    /* 1 = use pads related USB for USB host */
1560
1561         /*
1562          * Enable USB host clock.
1563          */
1564         clk_power->clkcon |= (1 << 4);
1565
1566         memset(&gohci, 0, sizeof(struct ohci));
1567         memset(&urb_priv, 0, sizeof(struct urb_priv));
1568
1569         /* align the storage */
1570         if ((__u32) &ghcca[0] & 0xff) {
1571                 err("HCCA not aligned!!");
1572                 return -1;
1573         }
1574         phcca = &ghcca[0];
1575         info("aligned ghcca %p", phcca);
1576         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1577         if ((__u32) &ohci_dev.ed[0] & 0x7) {
1578                 err("EDs not aligned!!");
1579                 return -1;
1580         }
1581         memset(gtd, 0, sizeof(struct td) * (NUM_TD + 1));
1582         if ((__u32) gtd & 0x7) {
1583                 err("TDs not aligned!!");
1584                 return -1;
1585         }
1586         ptd = gtd;
1587         gohci.hcca = phcca;
1588         memset(phcca, 0, sizeof(struct ohci_hcca));
1589
1590         gohci.disabled = 1;
1591         gohci.sleeping = 0;
1592         gohci.irq = -1;
1593         gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1594
1595         gohci.flags = 0;
1596         gohci.slot_name = "s3c2400";
1597
1598         if (hc_reset(&gohci) < 0) {
1599                 hc_release_ohci(&gohci);
1600                 /* Initialization failed */
1601                 clk_power->clkcon &= ~(1 << 4);
1602                 return -1;
1603         }
1604
1605         /* FIXME this is a second HC reset; why?? */
1606         gohci.hc_control = OHCI_USB_RESET;
1607         writel(gohci.hc_control, &gohci.regs->control);
1608         mdelay(10);
1609
1610         if (hc_start(&gohci) < 0) {
1611                 err("can't start usb-%s", gohci.slot_name);
1612                 hc_release_ohci(&gohci);
1613                 /* Initialization failed */
1614                 clk_power->clkcon &= ~(1 << 4);
1615                 return -1;
1616         }
1617 #ifdef  DEBUG
1618         ohci_dump(&gohci, 1);
1619 #else
1620         mdelay(1);
1621 #endif
1622         ohci_inited = 1;
1623         urb_finished = 1;
1624
1625         return 0;
1626 }
1627
1628 int usb_lowlevel_stop(int index)
1629 {
1630         struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1631
1632         /* this gets called really early - before the controller has */
1633         /* even been initialized! */
1634         if (!ohci_inited)
1635                 return 0;
1636         /* TODO release any interrupts, etc. */
1637         /* call hc_release_ohci() here ? */
1638         hc_reset(&gohci);
1639         /* may not want to do this */
1640         clk_power->clkcon &= ~(1 << 4);
1641         return 0;
1642 }
1643
1644 #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0) */
1645
1646 #if defined(CONFIG_USB_OHCI_NEW) && \
1647     defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
1648     defined(CONFIG_S3C24X0)
1649
1650 int usb_cpu_init(void)
1651 {
1652         struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1653         struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
1654
1655         /*
1656          * Set the 48 MHz UPLL clocking. Values are taken from
1657          * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1658          */
1659         writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon);
1660         /* 1 = use pads related USB for USB host */
1661         writel(readl(&gpio->misccr) | 0x8, &gpio->misccr);
1662
1663         /*
1664          * Enable USB host clock.
1665          */
1666         writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
1667
1668         return 0;
1669 }
1670
1671 int usb_cpu_stop(void)
1672 {
1673         struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1674         /* may not want to do this */
1675         writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
1676         return 0;
1677 }
1678
1679 int usb_cpu_init_fail(void)
1680 {
1681         struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1682         writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
1683         return 0;
1684 }
1685
1686 #endif /* defined(CONFIG_USB_OHCI_NEW) && \
1687            defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
1688            defined(CONFIG_S3C24X0) */