drivers/usb/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  57 #define CONFIG_PCI_OHCI_DEVNO   0
  58 #endif
  59 #endif
  60
  61 #include <malloc.h>
  62 #include <usb.h>
  63 #include "usb_ohci.h"
  64
  65 #ifdef CONFIG_AT91RM9200
  66 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  67 #endif
  68
  69 #if defined(CONFIG_ARM920T) || \
  70     defined(CONFIG_S3C2400) || \
  71     defined(CONFIG_S3C2410) || \
  72     defined(CONFIG_S3C6400) || \
  73     defined(CONFIG_440EP) || \
  74     defined(CONFIG_PCI_OHCI) || \
  75     defined(CONFIG_MPC5200) || \
  76     defined(CONFIG_SYS_OHCI_USE_NPS)
  77 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  78 #endif
  79
  80 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  81 #undef DEBUG
  82 #undef SHOW_INFO
  83 #undef OHCI_FILL_TRACE
  84
  85 /* For initializing controller (mask in an HCFS mode too) */
  86 #define OHCI_CONTROL_INIT \
  87         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  88
  89 /*
  90  * e.g. PCI controllers need this
  91  */
  92 #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
  93 # define readl(a) __swap_32(*((volatile u32 *)(a)))
  94 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
  95 #else
  96 # define readl(a) (*((volatile u32 *)(a)))
  97 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  98 #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
  99
 100 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
 101
 102 #ifdef CONFIG_PCI_OHCI
 103 static struct pci_device_id ohci_pci_ids[] = {
 104         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
 105         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
 106         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
 107         /* Please add supported PCI OHCI controller ids here */
 108         {0, 0}
 109 };
 110 #endif
 111
 112 #ifdef CONFIG_PCI_EHCI_DEVNO
 113 static struct pci_device_id ehci_pci_ids[] = {
 114         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
 115         /* Please add supported PCI EHCI controller ids here */
 116         {0, 0}
 117 };
 118 #endif
 119
 120 #ifdef DEBUG
 121 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 122 #else
 123 #define dbg(format, arg...) do {} while(0)
 124 #endif /* DEBUG */
 125 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 126 #ifdef SHOW_INFO
 127 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 128 #else
 129 #define info(format, arg...) do {} while(0)
 130 #endif
 131
 132 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
 133 # define m16_swap(x) cpu_to_be16(x)
 134 # define m32_swap(x) cpu_to_be32(x)
 135 #else
 136 # define m16_swap(x) cpu_to_le16(x)
 137 # define m32_swap(x) cpu_to_le32(x)
 138 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 139
 140 /* global ohci_t */
 141 static ohci_t gohci;
 142 /* this must be aligned to a 256 byte boundary */
 143 struct ohci_hcca ghcca[1];
 144 /* a pointer to the aligned storage */
 145 struct ohci_hcca *phcca;
 146 /* this allocates EDs for all possible endpoints */
 147 struct ohci_device ohci_dev;
 148 /* RHSC flag */
 149 int got_rhsc;
 150 /* device which was disconnected */
 151 struct usb_device *devgone;
 152
 153 static inline u32 roothub_a (struct ohci *hc)
 154         { return readl (&hc->regs->roothub.a); }
 155 static inline u32 roothub_b (struct ohci *hc)
 156         { return readl (&hc->regs->roothub.b); }
 157 static inline u32 roothub_status (struct ohci *hc)
 158         { return readl (&hc->regs->roothub.status); }
 159 static inline u32 roothub_portstatus (struct ohci *hc, int i)
 160         { return readl (&hc->regs->roothub.portstatus[i]); }
 161
 162 /* forward declaration */
 163 static int hc_interrupt (void);
 164 static void
 165 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 166         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 167
 168 /*-------------------------------------------------------------------------*
 169  * URB support functions
 170  *-------------------------------------------------------------------------*/
 171
 172 /* free HCD-private data associated with this URB */
 173
 174 static void urb_free_priv (urb_priv_t * urb)
 175 {
 176         int             i;
 177         int             last;
 178         struct td       * td;
 179
 180         last = urb->length - 1;
 181         if (last >= 0) {
 182                 for (i = 0; i <= last; i++) {
 183                         td = urb->td[i];
 184                         if (td) {
 185                                 td->usb_dev = NULL;
 186                                 urb->td[i] = NULL;
 187                         }
 188                 }
 189         }
 190         free(urb);
 191 }
 192
 193 /*-------------------------------------------------------------------------*/
 194
 195 #ifdef DEBUG
 196 static int sohci_get_current_frame_number (struct usb_device * dev);
 197
 198 /* debug| print the main components of an URB
 199  * small: 0) header + data packets 1) just header */
 200
 201 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 202         unsigned long pipe, void * buffer,
 203         int transfer_len, struct devrequest * setup, char * str, int small)
 204 {
 205         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 206                         str,
 207                         sohci_get_current_frame_number (dev),
 208                         usb_pipedevice (pipe),
 209                         usb_pipeendpoint (pipe),
 210                         usb_pipeout (pipe)? 'O': 'I',
 211                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 212                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 213                         (purb ? purb->actual_length : 0),
 214                         transfer_len, dev->status);
 215 #ifdef  OHCI_VERBOSE_DEBUG
 216         if (!small) {
 217                 int i, len;
 218
 219                 if (usb_pipecontrol (pipe)) {
 220                         printf (__FILE__ ": cmd(8):");
 221                         for (i = 0; i < 8 ; i++)
 222                                 printf (" %02x", ((__u8 *) setup) [i]);
 223                         printf ("\n");
 224                 }
 225                 if (transfer_len > 0 && buffer) {
 226                         printf (__FILE__ ": data(%d/%d):",
 227                                 (purb ? purb->actual_length : 0),
 228                                 transfer_len);
 229                         len = usb_pipeout (pipe)?
 230                                         transfer_len:
 231                                         (purb ? purb->actual_length : 0);
 232                         for (i = 0; i < 16 && i < len; i++)
 233                                 printf (" %02x", ((__u8 *) buffer) [i]);
 234                         printf ("%s\n", i < len? "...": "");
 235                 }
 236         }
 237 #endif
 238 }
 239
 240 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 241 void ep_print_int_eds (ohci_t *ohci, char * str) {
 242         int i, j;
 243          __u32 * ed_p;
 244         for (i= 0; i < 32; i++) {
 245                 j = 5;
 246                 ed_p = &(ohci->hcca->int_table [i]);
 247                 if (*ed_p == 0)
 248                     continue;
 249                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 250                 while (*ed_p != 0 && j--) {
 251                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 252                         printf (" ed: %4x;", ed->hwINFO);
 253                         ed_p = &ed->hwNextED;
 254                 }
 255                 printf ("\n");
 256         }
 257 }
 258
 259 static void ohci_dump_intr_mask (char *label, __u32 mask)
 260 {
 261         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 262                 label,
 263                 mask,
 264                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 265                 (mask & OHCI_INTR_OC) ? " OC" : "",
 266                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 267                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 268                 (mask & OHCI_INTR_UE) ? " UE" : "",
 269                 (mask & OHCI_INTR_RD) ? " RD" : "",
 270                 (mask & OHCI_INTR_SF) ? " SF" : "",
 271                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 272                 (mask & OHCI_INTR_SO) ? " SO" : ""
 273                 );
 274 }
 275
 276 static void maybe_print_eds (char *label, __u32 value)
 277 {
 278         ed_t *edp = (ed_t *)value;
 279
 280         if (value) {
 281                 dbg ("%s %08x", label, value);
 282                 dbg ("%08x", edp->hwINFO);
 283                 dbg ("%08x", edp->hwTailP);
 284                 dbg ("%08x", edp->hwHeadP);
 285                 dbg ("%08x", edp->hwNextED);
 286         }
 287 }
 288
 289 static char * hcfs2string (int state)
 290 {
 291         switch (state) {
 292                 case OHCI_USB_RESET:    return "reset";
 293                 case OHCI_USB_RESUME:   return "resume";
 294                 case OHCI_USB_OPER:     return "operational";
 295                 case OHCI_USB_SUSPEND:  return "suspend";
 296         }
 297         return "?";
 298 }
 299
 300 /* dump control and status registers */
 301 static void ohci_dump_status (ohci_t *controller)
 302 {
 303         struct ohci_regs        *regs = controller->regs;
 304         __u32                   temp;
 305
 306         temp = readl (&regs->revision) & 0xff;
 307         if (temp != 0x10)
 308                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 309
 310         temp = readl (&regs->control);
 311         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 312                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 313                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 314                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 315                 hcfs2string (temp & OHCI_CTRL_HCFS),
 316                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 317                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 318                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 319                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 320                 temp & OHCI_CTRL_CBSR
 321                 );
 322
 323         temp = readl (&regs->cmdstatus);
 324         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 325                 (temp & OHCI_SOC) >> 16,
 326                 (temp & OHCI_OCR) ? " OCR" : "",
 327                 (temp & OHCI_BLF) ? " BLF" : "",
 328                 (temp & OHCI_CLF) ? " CLF" : "",
 329                 (temp & OHCI_HCR) ? " HCR" : ""
 330                 );
 331
 332         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 333         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 334
 335         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 336
 337         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 338         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 339
 340         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 341         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 342
 343         maybe_print_eds ("donehead", readl (&regs->donehead));
 344 }
 345
 346 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 347 {
 348         __u32                   temp, ndp, i;
 349
 350         temp = roothub_a (controller);
 351         ndp = (temp & RH_A_NDP);
 352 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 353         ndp = (ndp == 2) ? 1:0;
 354 #endif
 355         if (verbose) {
 356                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 357                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 358                         (temp & RH_A_NOCP) ? " NOCP" : "",
 359                         (temp & RH_A_OCPM) ? " OCPM" : "",
 360                         (temp & RH_A_DT) ? " DT" : "",
 361                         (temp & RH_A_NPS) ? " NPS" : "",
 362                         (temp & RH_A_PSM) ? " PSM" : "",
 363                         ndp
 364                         );
 365                 temp = roothub_b (controller);
 366                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 367                         temp,
 368                         (temp & RH_B_PPCM) >> 16,
 369                         (temp & RH_B_DR)
 370                         );
 371                 temp = roothub_status (controller);
 372                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 373                         temp,
 374                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 375                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 376                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 377                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 378                         (temp & RH_HS_OCI) ? " OCI" : "",
 379                         (temp & RH_HS_LPS) ? " LPS" : ""
 380                         );
 381         }
 382
 383         for (i = 0; i < ndp; i++) {
 384                 temp = roothub_portstatus (controller, i);
 385                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 386                         i,
 387                         temp,
 388                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 389                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 390                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 391                         (temp & RH_PS_PESC) ? " PESC" : "",
 392                         (temp & RH_PS_CSC) ? " CSC" : "",
 393
 394                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 395                         (temp & RH_PS_PPS) ? " PPS" : "",
 396                         (temp & RH_PS_PRS) ? " PRS" : "",
 397                         (temp & RH_PS_POCI) ? " POCI" : "",
 398                         (temp & RH_PS_PSS) ? " PSS" : "",
 399
 400                         (temp & RH_PS_PES) ? " PES" : "",
 401                         (temp & RH_PS_CCS) ? " CCS" : ""
 402                         );
 403         }
 404 }
 405
 406 static void ohci_dump (ohci_t *controller, int verbose)
 407 {
 408         dbg ("OHCI controller usb-%s state", controller->slot_name);
 409
 410         /* dumps some of the state we know about */
 411         ohci_dump_status (controller);
 412         if (verbose)
 413                 ep_print_int_eds (controller, "hcca");
 414         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 415         ohci_dump_roothub (controller, 1);
 416 }
 417 #endif /* DEBUG */
 418
 419 /*-------------------------------------------------------------------------*
 420  * Interface functions (URB)
 421  *-------------------------------------------------------------------------*/
 422
 423 /* get a transfer request */
 424
 425 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 426 {
 427         ohci_t *ohci;
 428         ed_t * ed;
 429         urb_priv_t *purb_priv = urb;
 430         int i, size = 0;
 431         struct usb_device *dev = urb->dev;
 432         unsigned long pipe = urb->pipe;
 433         void *buffer = urb->transfer_buffer;
 434         int transfer_len = urb->transfer_buffer_length;
 435         int interval = urb->interval;
 436
 437         ohci = &gohci;
 438
 439         /* when controller's hung, permit only roothub cleanup attempts
 440          * such as powering down ports */
 441         if (ohci->disabled) {
 442                 err("sohci_submit_job: EPIPE");
 443                 return -1;
 444         }
 445
 446         /* we're about to begin a new transaction here so mark the URB unfinished */
 447         urb->finished = 0;
 448
 449         /* every endpoint has a ed, locate and fill it */
 450         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 451                 err("sohci_submit_job: ENOMEM");
 452                 return -1;
 453         }
 454
 455         /* for the private part of the URB we need the number of TDs (size) */
 456         switch (usb_pipetype (pipe)) {
 457                 case PIPE_BULK: /* one TD for every 4096 Byte */
 458                         size = (transfer_len - 1) / 4096 + 1;
 459                         break;
 460                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 461                         size = (transfer_len == 0)? 2:
 462                                                 (transfer_len - 1) / 4096 + 3;
 463                         break;
 464                 case PIPE_INTERRUPT: /* 1 TD */
 465                         size = 1;
 466                         break;
 467         }
 468
 469         ed->purb = urb;
 470
 471         if (size >= (N_URB_TD - 1)) {
 472                 err("need %d TDs, only have %d", size, N_URB_TD);
 473                 return -1;
 474         }
 475         purb_priv->pipe = pipe;
 476
 477         /* fill the private part of the URB */
 478         purb_priv->length = size;
 479         purb_priv->ed = ed;
 480         purb_priv->actual_length = 0;
 481
 482         /* allocate the TDs */
 483         /* note that td[0] was allocated in ep_add_ed */
 484         for (i = 0; i < size; i++) {
 485                 purb_priv->td[i] = td_alloc (dev);
 486                 if (!purb_priv->td[i]) {
 487                         purb_priv->length = i;
 488                         urb_free_priv (purb_priv);
 489                         err("sohci_submit_job: ENOMEM");
 490                         return -1;
 491                 }
 492         }
 493
 494         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 495                 urb_free_priv (purb_priv);
 496                 err("sohci_submit_job: EINVAL");
 497                 return -1;
 498         }
 499
 500         /* link the ed into a chain if is not already */
 501         if (ed->state != ED_OPER)
 502                 ep_link (ohci, ed);
 503
 504         /* fill the TDs and link it to the ed */
 505         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 506
 507         return 0;
 508 }
 509
 510 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 511 {
 512         struct ohci_regs *regs = hc->regs;
 513
 514         switch (usb_pipetype (urb->pipe)) {
 515         case PIPE_INTERRUPT:
 516                 /* implicitly requeued */
 517                 if (urb->dev->irq_handle &&
 518                                 (urb->dev->irq_act_len = urb->actual_length)) {
 519                         writel (OHCI_INTR_WDH, &regs->intrenable);
 520                         readl (&regs->intrenable); /* PCI posting flush */
 521                         urb->dev->irq_handle(urb->dev);
 522                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 523                         readl (&regs->intrdisable); /* PCI posting flush */
 524                 }
 525                 urb->actual_length = 0;
 526                 td_submit_job (
 527                                 urb->dev,
 528                                 urb->pipe,
 529                                 urb->transfer_buffer,
 530                                 urb->transfer_buffer_length,
 531                                 NULL,
 532                                 urb,
 533                                 urb->interval);
 534                 break;
 535         case PIPE_CONTROL:
 536         case PIPE_BULK:
 537                 break;
 538         default:
 539                 return 0;
 540         }
 541         return 1;
 542 }
 543
 544 /*-------------------------------------------------------------------------*/
 545
 546 #ifdef DEBUG
 547 /* tell us the current USB frame number */
 548
 549 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 550 {
 551         ohci_t *ohci = &gohci;
 552
 553         return m16_swap (ohci->hcca->frame_no);
 554 }
 555 #endif
 556
 557 /*-------------------------------------------------------------------------*
 558  * ED handling functions
 559  *-------------------------------------------------------------------------*/
 560
 561 /* search for the right branch to insert an interrupt ed into the int tree
 562  * do some load ballancing;
 563  * returns the branch and
 564  * sets the interval to interval = 2^integer (ld (interval)) */
 565
 566 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 567 {
 568         int i, branch = 0;
 569
 570         /* search for the least loaded interrupt endpoint
 571          * branch of all 32 branches
 572          */
 573         for (i = 0; i < 32; i++)
 574                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 575                         branch = i;
 576
 577         branch = branch % interval;
 578         for (i = branch; i < 32; i += interval)
 579                 ohci->ohci_int_load [i] += load;
 580
 581         return branch;
 582 }
 583
 584 /*-------------------------------------------------------------------------*/
 585
 586 /*  2^int( ld (inter)) */
 587
 588 static int ep_2_n_interval (int inter)
 589 {
 590         int i;
 591         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 592         return 1 << i;
 593 }
 594
 595 /*-------------------------------------------------------------------------*/
 596
 597 /* the int tree is a binary tree
 598  * in order to process it sequentially the indexes of the branches have to be mapped
 599  * the mapping reverses the bits of a word of num_bits length */
 600
 601 static int ep_rev (int num_bits, int word)
 602 {
 603         int i, wout = 0;
 604
 605         for (i = 0; i < num_bits; i++)
 606                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 607         return wout;
 608 }
 609
 610 /*-------------------------------------------------------------------------*
 611  * ED handling functions
 612  *-------------------------------------------------------------------------*/
 613
 614 /* link an ed into one of the HC chains */
 615
 616 static int ep_link (ohci_t *ohci, ed_t *edi)
 617 {
 618         volatile ed_t *ed = edi;
 619         int int_branch;
 620         int i;
 621         int inter;
 622         int interval;
 623         int load;
 624         __u32 * ed_p;
 625
 626         ed->state = ED_OPER;
 627         ed->int_interval = 0;
 628
 629         switch (ed->type) {
 630         case PIPE_CONTROL:
 631                 ed->hwNextED = 0;
 632                 if (ohci->ed_controltail == NULL) {
 633                         writel (ed, &ohci->regs->ed_controlhead);
 634                 } else {
 635                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 636                 }
 637                 ed->ed_prev = ohci->ed_controltail;
 638                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 639                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 640                         ohci->hc_control |= OHCI_CTRL_CLE;
 641                         writel (ohci->hc_control, &ohci->regs->control);
 642                 }
 643                 ohci->ed_controltail = edi;
 644                 break;
 645
 646         case PIPE_BULK:
 647                 ed->hwNextED = 0;
 648                 if (ohci->ed_bulktail == NULL) {
 649                         writel (ed, &ohci->regs->ed_bulkhead);
 650                 } else {
 651                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 652                 }
 653                 ed->ed_prev = ohci->ed_bulktail;
 654                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 655                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 656                         ohci->hc_control |= OHCI_CTRL_BLE;
 657                         writel (ohci->hc_control, &ohci->regs->control);
 658                 }
 659                 ohci->ed_bulktail = edi;
 660                 break;
 661
 662         case PIPE_INTERRUPT:
 663                 load = ed->int_load;
 664                 interval = ep_2_n_interval (ed->int_period);
 665                 ed->int_interval = interval;
 666                 int_branch = ep_int_ballance (ohci, interval, load);
 667                 ed->int_branch = int_branch;
 668
 669                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 670                         inter = 1;
 671                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 672                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 673                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 674                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 675                         ed->hwNextED = *ed_p;
 676                         *ed_p = m32_swap((unsigned long)ed);
 677                 }
 678                 break;
 679         }
 680         return 0;
 681 }
 682
 683 /*-------------------------------------------------------------------------*/
 684
 685 /* scan the periodic table to find and unlink this ED */
 686 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 687                 unsigned index, unsigned period)
 688 {
 689         for (; index < NUM_INTS; index += period) {
 690                 __u32   *ed_p = &ohci->hcca->int_table [index];
 691
 692                 /* ED might have been unlinked through another path */
 693                 while (*ed_p != 0) {
 694                         if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
 695                                 *ed_p = ed->hwNextED;
 696                                 break;
 697                         }
 698                         ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
 699                 }
 700         }
 701 }
 702
 703 /* unlink an ed from one of the HC chains.
 704  * just the link to the ed is unlinked.
 705  * the link from the ed still points to another operational ed or 0
 706  * so the HC can eventually finish the processing of the unlinked ed */
 707
 708 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 709 {
 710         volatile ed_t *ed = edi;
 711         int i;
 712
 713         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 714
 715         switch (ed->type) {
 716         case PIPE_CONTROL:
 717                 if (ed->ed_prev == NULL) {
 718                         if (!ed->hwNextED) {
 719                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 720                                 writel (ohci->hc_control, &ohci->regs->control);
 721                         }
 722                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 723                 } else {
 724                         ed->ed_prev->hwNextED = ed->hwNextED;
 725                 }
 726                 if (ohci->ed_controltail == ed) {
 727                         ohci->ed_controltail = ed->ed_prev;
 728                 } else {
 729                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 730                 }
 731                 break;
 732
 733         case PIPE_BULK:
 734                 if (ed->ed_prev == NULL) {
 735                         if (!ed->hwNextED) {
 736                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 737                                 writel (ohci->hc_control, &ohci->regs->control);
 738                         }
 739                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 740                 } else {
 741                         ed->ed_prev->hwNextED = ed->hwNextED;
 742                 }
 743                 if (ohci->ed_bulktail == ed) {
 744                         ohci->ed_bulktail = ed->ed_prev;
 745                 } else {
 746                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 747                 }
 748                 break;
 749
 750         case PIPE_INTERRUPT:
 751                 periodic_unlink (ohci, ed, 0, 1);
 752                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 753                     ohci->ohci_int_load[i] -= ed->int_load;
 754                 break;
 755         }
 756         ed->state = ED_UNLINK;
 757         return 0;
 758 }
 759
 760 /*-------------------------------------------------------------------------*/
 761
 762 /* add/reinit an endpoint; this should be done once at the
 763  * usb_set_configuration command, but the USB stack is a little bit
 764  * stateless so we do it at every transaction if the state of the ed
 765  * is ED_NEW then a dummy td is added and the state is changed to
 766  * ED_UNLINK in all other cases the state is left unchanged the ed
 767  * info fields are setted anyway even though most of them should not
 768  * change
 769  */
 770 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 771                 int interval, int load)
 772 {
 773         td_t *td;
 774         ed_t *ed_ret;
 775         volatile ed_t *ed;
 776
 777         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 778                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 779
 780         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 781                 err("ep_add_ed: pending delete");
 782                 /* pending delete request */
 783                 return NULL;
 784         }
 785
 786         if (ed->state == ED_NEW) {
 787                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 788                 /* dummy td; end of td list for ed */
 789                 td = td_alloc (usb_dev);
 790                 ed->hwTailP = m32_swap ((unsigned long)td);
 791                 ed->hwHeadP = ed->hwTailP;
 792                 ed->state = ED_UNLINK;
 793                 ed->type = usb_pipetype (pipe);
 794                 ohci_dev.ed_cnt++;
 795         }
 796
 797         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 798                         | usb_pipeendpoint (pipe) << 7
 799                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 800                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 801                         | usb_pipeslow (pipe) << 13
 802                         | usb_maxpacket (usb_dev, pipe) << 16);
 803
 804         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 805                 ed->int_period = interval;
 806                 ed->int_load = load;
 807         }
 808
 809         return ed_ret;
 810 }
 811
 812 /*-------------------------------------------------------------------------*
 813  * TD handling functions
 814  *-------------------------------------------------------------------------*/
 815
 816 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 817
 818 static void td_fill (ohci_t *ohci, unsigned int info,
 819         void *data, int len,
 820         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 821 {
 822         volatile td_t  *td, *td_pt;
 823 #ifdef OHCI_FILL_TRACE
 824         int i;
 825 #endif
 826
 827         if (index > urb_priv->length) {
 828                 err("index > length");
 829                 return;
 830         }
 831         /* use this td as the next dummy */
 832         td_pt = urb_priv->td [index];
 833         td_pt->hwNextTD = 0;
 834
 835         /* fill the old dummy TD */
 836         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 837
 838         td->ed = urb_priv->ed;
 839         td->next_dl_td = NULL;
 840         td->index = index;
 841         td->data = (__u32)data;
 842 #ifdef OHCI_FILL_TRACE
 843         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 844                 for (i = 0; i < len; i++)
 845                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 846                 printf("\n");
 847         }
 848 #endif
 849         if (!len)
 850                 data = 0;
 851
 852         td->hwINFO = m32_swap (info);
 853         td->hwCBP = m32_swap ((unsigned long)data);
 854         if (data)
 855                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 856         else
 857                 td->hwBE = 0;
 858         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 859
 860         /* append to queue */
 861         td->ed->hwTailP = td->hwNextTD;
 862 }
 863
 864 /*-------------------------------------------------------------------------*/
 865
 866 /* prepare all TDs of a transfer */
 867
 868 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 869         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 870 {
 871         ohci_t *ohci = &gohci;
 872         int data_len = transfer_len;
 873         void *data;
 874         int cnt = 0;
 875         __u32 info = 0;
 876         unsigned int toggle = 0;
 877
 878         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 879         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 880                 toggle = TD_T_TOGGLE;
 881         } else {
 882                 toggle = TD_T_DATA0;
 883                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 884         }
 885         urb->td_cnt = 0;
 886         if (data_len)
 887                 data = buffer;
 888         else
 889                 data = 0;
 890
 891         switch (usb_pipetype (pipe)) {
 892         case PIPE_BULK:
 893                 info = usb_pipeout (pipe)?
 894                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 895                 while(data_len > 4096) {
 896                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 897                         data += 4096; data_len -= 4096; cnt++;
 898                 }
 899                 info = usb_pipeout (pipe)?
 900                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 901                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 902                 cnt++;
 903
 904                 if (!ohci->sleeping)
 905                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 906                 break;
 907
 908         case PIPE_CONTROL:
 909                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 910                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 911                 if (data_len > 0) {
 912                         info = usb_pipeout (pipe)?
 913                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 914                         /* NOTE:  mishandles transfers >8K, some >4K */
 915                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 916                 }
 917                 info = usb_pipeout (pipe)?
 918                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 919                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 920                 if (!ohci->sleeping)
 921                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 922                 break;
 923
 924         case PIPE_INTERRUPT:
 925                 info = usb_pipeout (urb->pipe)?
 926                         TD_CC | TD_DP_OUT | toggle:
 927                         TD_CC | TD_R | TD_DP_IN | toggle;
 928                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 929                 break;
 930         }
 931         if (urb->length != cnt)
 932                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 933 }
 934
 935 /*-------------------------------------------------------------------------*
 936  * Done List handling functions
 937  *-------------------------------------------------------------------------*/
 938
 939 /* calculate the transfer length and update the urb */
 940
 941 static void dl_transfer_length(td_t * td)
 942 {
 943         __u32 tdINFO, tdBE, tdCBP;
 944         urb_priv_t *lurb_priv = td->ed->purb;
 945
 946         tdINFO = m32_swap (td->hwINFO);
 947         tdBE   = m32_swap (td->hwBE);
 948         tdCBP  = m32_swap (td->hwCBP);
 949
 950         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 951             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 952                 if (tdBE != 0) {
 953                         if (td->hwCBP == 0)
 954                                 lurb_priv->actual_length += tdBE - td->data + 1;
 955                         else
 956                                 lurb_priv->actual_length += tdCBP - td->data;
 957                 }
 958         }
 959 }
 960
 961 /*-------------------------------------------------------------------------*/
 962
 963 /* replies to the request have to be on a FIFO basis so
 964  * we reverse the reversed done-list */
 965
 966 static td_t * dl_reverse_done_list (ohci_t *ohci)
 967 {
 968         __u32 td_list_hc;
 969         td_t *td_rev = NULL;
 970         td_t *td_list = NULL;
 971         urb_priv_t *lurb_priv = NULL;
 972
 973         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 974         ohci->hcca->done_head = 0;
 975
 976         while (td_list_hc) {
 977                 td_list = (td_t *)td_list_hc;
 978
 979                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 980                         lurb_priv = td_list->ed->purb;
 981                         dbg(" USB-error/status: %x : %p",
 982                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 983                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 984                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 985                                         td_list->ed->hwHeadP =
 986                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 987                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 988                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 989                                 } else
 990                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 991                         }
 992 #ifdef CONFIG_MPC5200
 993                         td_list->hwNextTD = 0;
 994 #endif
 995                 }
 996
 997                 td_list->next_dl_td = td_rev;
 998                 td_rev = td_list;
 999                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
1000         }
1001         return td_list;
1002 }
1003
1004 /*-------------------------------------------------------------------------*/
1005
1006 /* td done list */
1007 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1008 {
1009         td_t *td_list_next = NULL;
1010         ed_t *ed;
1011         int cc = 0;
1012         int stat = 0;
1013         /* urb_t *urb; */
1014         urb_priv_t *lurb_priv;
1015         __u32 tdINFO, edHeadP, edTailP;
1016
1017         while (td_list) {
1018                 td_list_next = td_list->next_dl_td;
1019
1020                 tdINFO = m32_swap (td_list->hwINFO);
1021
1022                 ed = td_list->ed;
1023                 lurb_priv = ed->purb;
1024
1025                 dl_transfer_length(td_list);
1026
1027                 /* error code of transfer */
1028                 cc = TD_CC_GET (tdINFO);
1029                 if (cc != 0) {
1030                         dbg("ConditionCode %#x", cc);
1031                         stat = cc_to_error[cc];
1032                 }
1033
1034                 /* see if this done list makes for all TD's of current URB,
1035                  * and mark the URB finished if so */
1036                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1037 #if 1
1038                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1039                             (lurb_priv->state != URB_DEL))
1040 #else
1041                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1042 #endif
1043                                 lurb_priv->finished = sohci_return_job(ohci,
1044                                                 lurb_priv);
1045                         else
1046                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1047                 } else
1048                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1049                                 lurb_priv->length);
1050                 if (ed->state != ED_NEW &&
1051                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1052                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1053                         edTailP = m32_swap (ed->hwTailP);
1054
1055                         /* unlink eds if they are not busy */
1056                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1057                                 ep_unlink (ohci, ed);
1058                 }
1059
1060                 td_list = td_list_next;
1061         }
1062         return stat;
1063 }
1064
1065 /*-------------------------------------------------------------------------*
1066  * Virtual Root Hub
1067  *-------------------------------------------------------------------------*/
1068
1069 /* Device descriptor */
1070 static __u8 root_hub_dev_des[] =
1071 {
1072         0x12,       /*  __u8  bLength; */
1073         0x01,       /*  __u8  bDescriptorType; Device */
1074         0x10,       /*  __u16 bcdUSB; v1.1 */
1075         0x01,
1076         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1077         0x00,       /*  __u8  bDeviceSubClass; */
1078         0x00,       /*  __u8  bDeviceProtocol; */
1079         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1080         0x00,       /*  __u16 idVendor; */
1081         0x00,
1082         0x00,       /*  __u16 idProduct; */
1083         0x00,
1084         0x00,       /*  __u16 bcdDevice; */
1085         0x00,
1086         0x00,       /*  __u8  iManufacturer; */
1087         0x01,       /*  __u8  iProduct; */
1088         0x00,       /*  __u8  iSerialNumber; */
1089         0x01        /*  __u8  bNumConfigurations; */
1090 };
1091
1092 /* Configuration descriptor */
1093 static __u8 root_hub_config_des[] =
1094 {
1095         0x09,       /*  __u8  bLength; */
1096         0x02,       /*  __u8  bDescriptorType; Configuration */
1097         0x19,       /*  __u16 wTotalLength; */
1098         0x00,
1099         0x01,       /*  __u8  bNumInterfaces; */
1100         0x01,       /*  __u8  bConfigurationValue; */
1101         0x00,       /*  __u8  iConfiguration; */
1102         0x40,       /*  __u8  bmAttributes;
1103                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1104         0x00,       /*  __u8  MaxPower; */
1105
1106         /* interface */
1107         0x09,       /*  __u8  if_bLength; */
1108         0x04,       /*  __u8  if_bDescriptorType; Interface */
1109         0x00,       /*  __u8  if_bInterfaceNumber; */
1110         0x00,       /*  __u8  if_bAlternateSetting; */
1111         0x01,       /*  __u8  if_bNumEndpoints; */
1112         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1113         0x00,       /*  __u8  if_bInterfaceSubClass; */
1114         0x00,       /*  __u8  if_bInterfaceProtocol; */
1115         0x00,       /*  __u8  if_iInterface; */
1116
1117         /* endpoint */
1118         0x07,       /*  __u8  ep_bLength; */
1119         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1120         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1121         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1122         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1123         0x00,
1124         0xff        /*  __u8  ep_bInterval; 255 ms */
1125 };
1126
1127 static unsigned char root_hub_str_index0[] =
1128 {
1129         0x04,                   /*  __u8  bLength; */
1130         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1131         0x09,                   /*  __u8  lang ID */
1132         0x04,                   /*  __u8  lang ID */
1133 };
1134
1135 static unsigned char root_hub_str_index1[] =
1136 {
1137         28,                     /*  __u8  bLength; */
1138         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1139         'O',                    /*  __u8  Unicode */
1140         0,                              /*  __u8  Unicode */
1141         'H',                    /*  __u8  Unicode */
1142         0,                              /*  __u8  Unicode */
1143         'C',                    /*  __u8  Unicode */
1144         0,                              /*  __u8  Unicode */
1145         'I',                    /*  __u8  Unicode */
1146         0,                              /*  __u8  Unicode */
1147         ' ',                    /*  __u8  Unicode */
1148         0,                              /*  __u8  Unicode */
1149         'R',                    /*  __u8  Unicode */
1150         0,                              /*  __u8  Unicode */
1151         'o',                    /*  __u8  Unicode */
1152         0,                              /*  __u8  Unicode */
1153         'o',                    /*  __u8  Unicode */
1154         0,                              /*  __u8  Unicode */
1155         't',                    /*  __u8  Unicode */
1156         0,                              /*  __u8  Unicode */
1157         ' ',                    /*  __u8  Unicode */
1158         0,                              /*  __u8  Unicode */
1159         'H',                    /*  __u8  Unicode */
1160         0,                              /*  __u8  Unicode */
1161         'u',                    /*  __u8  Unicode */
1162         0,                              /*  __u8  Unicode */
1163         'b',                    /*  __u8  Unicode */
1164         0,                              /*  __u8  Unicode */
1165 };
1166
1167 /* Hub class-specific descriptor is constructed dynamically */
1168
1169 /*-------------------------------------------------------------------------*/
1170
1171 #define OK(x)                   len = (x); break
1172 #ifdef DEBUG
1173 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1174 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1175 #else
1176 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1177 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1178 #endif
1179 #define RD_RH_STAT              roothub_status(&gohci)
1180 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1181
1182 /* request to virtual root hub */
1183
1184 int rh_check_port_status(ohci_t *controller)
1185 {
1186         __u32 temp, ndp, i;
1187         int res;
1188
1189         res = -1;
1190         temp = roothub_a (controller);
1191         ndp = (temp & RH_A_NDP);
1192 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1193         ndp = (ndp == 2) ? 1:0;
1194 #endif
1195         for (i = 0; i < ndp; i++) {
1196                 temp = roothub_portstatus (controller, i);
1197                 /* check for a device disconnect */
1198                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1199                         (RH_PS_PESC | RH_PS_CSC)) &&
1200                         ((temp & RH_PS_CCS) == 0)) {
1201                         res = i;
1202                         break;
1203                 }
1204         }
1205         return res;
1206 }
1207
1208 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1209                 void *buffer, int transfer_len, struct devrequest *cmd)
1210 {
1211         void * data = buffer;
1212         int leni = transfer_len;
1213         int len = 0;
1214         int stat = 0;
1215         __u32 datab[4];
1216         __u8 *data_buf = (__u8 *)datab;
1217         __u16 bmRType_bReq;
1218         __u16 wValue;
1219         __u16 wIndex;
1220         __u16 wLength;
1221
1222 #ifdef DEBUG
1223 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1224 #else
1225         wait_ms(1);
1226 #endif
1227         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1228                 info("Root-Hub submit IRQ: NOT implemented");
1229                 return 0;
1230         }
1231
1232         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1233         wValue        = le16_to_cpu (cmd->value);
1234         wIndex        = le16_to_cpu (cmd->index);
1235         wLength       = le16_to_cpu (cmd->length);
1236
1237         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1238                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1239
1240         switch (bmRType_bReq) {
1241         /* Request Destination:
1242            without flags: Device,
1243            RH_INTERFACE: interface,
1244            RH_ENDPOINT: endpoint,
1245            RH_CLASS means HUB here,
1246            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1247         */
1248
1249         case RH_GET_STATUS:
1250                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1251         case RH_GET_STATUS | RH_INTERFACE:
1252                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1253         case RH_GET_STATUS | RH_ENDPOINT:
1254                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1255         case RH_GET_STATUS | RH_CLASS:
1256                         *(__u32 *) data_buf = cpu_to_le32 (
1257                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1258                         OK (4);
1259         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1260                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1261
1262         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1263                 switch (wValue) {
1264                         case (RH_ENDPOINT_STALL): OK (0);
1265                 }
1266                 break;
1267
1268         case RH_CLEAR_FEATURE | RH_CLASS:
1269                 switch (wValue) {
1270                         case RH_C_HUB_LOCAL_POWER:
1271                                 OK(0);
1272                         case (RH_C_HUB_OVER_CURRENT):
1273                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1274                 }
1275                 break;
1276
1277         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1278                 switch (wValue) {
1279                         case (RH_PORT_ENABLE):
1280                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1281                         case (RH_PORT_SUSPEND):
1282                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1283                         case (RH_PORT_POWER):
1284                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1285                         case (RH_C_PORT_CONNECTION):
1286                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1287                         case (RH_C_PORT_ENABLE):
1288                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1289                         case (RH_C_PORT_SUSPEND):
1290                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1291                         case (RH_C_PORT_OVER_CURRENT):
1292                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1293                         case (RH_C_PORT_RESET):
1294                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1295                 }
1296                 break;
1297
1298         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1299                 switch (wValue) {
1300                         case (RH_PORT_SUSPEND):
1301                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1302                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1303                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1304                                             WR_RH_PORTSTAT (RH_PS_PRS);
1305                                         OK (0);
1306                         case (RH_PORT_POWER):
1307                                         WR_RH_PORTSTAT (RH_PS_PPS );
1308                                         wait_ms(100);
1309                                         OK (0);
1310                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1311                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1312                                             WR_RH_PORTSTAT (RH_PS_PES );
1313                                         OK (0);
1314                 }
1315                 break;
1316
1317         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1318
1319         case RH_GET_DESCRIPTOR:
1320                 switch ((wValue & 0xff00) >> 8) {
1321                         case (0x01): /* device descriptor */
1322                                 len = min_t(unsigned int,
1323                                           leni,
1324                                           min_t(unsigned int,
1325                                               sizeof (root_hub_dev_des),
1326                                               wLength));
1327                                 data_buf = root_hub_dev_des; OK(len);
1328                         case (0x02): /* configuration descriptor */
1329                                 len = min_t(unsigned int,
1330                                           leni,
1331                                           min_t(unsigned int,
1332                                               sizeof (root_hub_config_des),
1333                                               wLength));
1334                                 data_buf = root_hub_config_des; OK(len);
1335                         case (0x03): /* string descriptors */
1336                                 if(wValue==0x0300) {
1337                                         len = min_t(unsigned int,
1338                                                   leni,
1339                                                   min_t(unsigned int,
1340                                                       sizeof (root_hub_str_index0),
1341                                                       wLength));
1342                                         data_buf = root_hub_str_index0;
1343                                         OK(len);
1344                                 }
1345                                 if(wValue==0x0301) {
1346                                         len = min_t(unsigned int,
1347                                                   leni,
1348                                                   min_t(unsigned int,
1349                                                       sizeof (root_hub_str_index1),
1350                                                       wLength));
1351                                         data_buf = root_hub_str_index1;
1352                                         OK(len);
1353                         }
1354                         default:
1355                                 stat = USB_ST_STALLED;
1356                 }
1357                 break;
1358
1359         case RH_GET_DESCRIPTOR | RH_CLASS:
1360         {
1361                 __u32 temp = roothub_a (&gohci);
1362
1363                 data_buf [0] = 9;               /* min length; */
1364                 data_buf [1] = 0x29;
1365                 data_buf [2] = temp & RH_A_NDP;
1366 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1367                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1368 #endif
1369                 data_buf [3] = 0;
1370                 if (temp & RH_A_PSM)    /* per-port power switching? */
1371                         data_buf [3] |= 0x1;
1372                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1373                         data_buf [3] |= 0x10;
1374                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1375                         data_buf [3] |= 0x8;
1376
1377                 /* corresponds to data_buf[4-7] */
1378                 datab [1] = 0;
1379                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1380                 temp = roothub_b (&gohci);
1381                 data_buf [7] = temp & RH_B_DR;
1382                 if (data_buf [2] < 7) {
1383                         data_buf [8] = 0xff;
1384                 } else {
1385                         data_buf [0] += 2;
1386                         data_buf [8] = (temp & RH_B_DR) >> 8;
1387                         data_buf [10] = data_buf [9] = 0xff;
1388                 }
1389
1390                 len = min_t(unsigned int, leni,
1391                             min_t(unsigned int, data_buf [0], wLength));
1392                 OK (len);
1393         }
1394
1395         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1396
1397         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1398
1399         default:
1400                 dbg ("unsupported root hub command");
1401                 stat = USB_ST_STALLED;
1402         }
1403
1404 #ifdef  DEBUG
1405         ohci_dump_roothub (&gohci, 1);
1406 #else
1407         wait_ms(1);
1408 #endif
1409
1410         len = min_t(int, len, leni);
1411         if (data != data_buf)
1412             memcpy (data, data_buf, len);
1413         dev->act_len = len;
1414         dev->status = stat;
1415
1416 #ifdef DEBUG
1417         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1418 #else
1419         wait_ms(1);
1420 #endif
1421
1422         return stat;
1423 }
1424
1425 /*-------------------------------------------------------------------------*/
1426
1427 /* common code for handling submit messages - used for all but root hub */
1428 /* accesses. */
1429 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1430                 int transfer_len, struct devrequest *setup, int interval)
1431 {
1432         int stat = 0;
1433         int maxsize = usb_maxpacket(dev, pipe);
1434         int timeout;
1435         urb_priv_t *urb;
1436
1437         urb = malloc(sizeof(urb_priv_t));
1438         memset(urb, 0, sizeof(urb_priv_t));
1439
1440         urb->dev = dev;
1441         urb->pipe = pipe;
1442         urb->transfer_buffer = buffer;
1443         urb->transfer_buffer_length = transfer_len;
1444         urb->interval = interval;
1445
1446         /* device pulled? Shortcut the action. */
1447         if (devgone == dev) {
1448                 dev->status = USB_ST_CRC_ERR;
1449                 return 0;
1450         }
1451
1452 #ifdef DEBUG
1453         urb->actual_length = 0;
1454         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1455 #else
1456         wait_ms(1);
1457 #endif
1458         if (!maxsize) {
1459                 err("submit_common_message: pipesize for pipe %lx is zero",
1460                         pipe);
1461                 return -1;
1462         }
1463
1464         if (sohci_submit_job(urb, setup) < 0) {
1465                 err("sohci_submit_job failed");
1466                 return -1;
1467         }
1468
1469 #if 0
1470         wait_ms(10);
1471         /* ohci_dump_status(&gohci); */
1472 #endif
1473
1474         /* allow more time for a BULK device to react - some are slow */
1475 #define BULK_TO  5000   /* timeout in milliseconds */
1476         if (usb_pipetype (pipe) == PIPE_BULK)
1477                 timeout = BULK_TO;
1478         else
1479                 timeout = 100;
1480
1481         /* wait for it to complete */
1482         for (;;) {
1483                 /* check whether the controller is done */
1484                 stat = hc_interrupt();
1485                 if (stat < 0) {
1486                         stat = USB_ST_CRC_ERR;
1487                         break;
1488                 }
1489
1490                 /* NOTE: since we are not interrupt driven in U-Boot and always
1491                  * handle only one URB at a time, we cannot assume the
1492                  * transaction finished on the first successful return from
1493                  * hc_interrupt().. unless the flag for current URB is set,
1494                  * meaning that all TD's to/from device got actually
1495                  * transferred and processed. If the current URB is not
1496                  * finished we need to re-iterate this loop so as
1497                  * hc_interrupt() gets called again as there needs to be some
1498                  * more TD's to process still */
1499                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1500                         /* 0xff is returned for an SF-interrupt */
1501                         break;
1502                 }
1503
1504                 if (--timeout) {
1505                         wait_ms(1);
1506                         if (!urb->finished)
1507                                 dbg("\%");
1508
1509                 } else {
1510                         err("CTL:TIMEOUT ");
1511                         dbg("submit_common_msg: TO status %x\n", stat);
1512                         urb->finished = 1;
1513                         stat = USB_ST_CRC_ERR;
1514                         break;
1515                 }
1516         }
1517
1518         dev->status = stat;
1519         dev->act_len = transfer_len;
1520
1521 #ifdef DEBUG
1522         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1523 #else
1524         wait_ms(1);
1525 #endif
1526
1527         /* free TDs in urb_priv */
1528         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1529                 urb_free_priv (urb);
1530         return 0;
1531 }
1532
1533 /* submit routines called from usb.c */
1534 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1535                 int transfer_len)
1536 {
1537         info("submit_bulk_msg");
1538         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1539 }
1540
1541 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1542                 int transfer_len, struct devrequest *setup)
1543 {
1544         int maxsize = usb_maxpacket(dev, pipe);
1545
1546         info("submit_control_msg");
1547 #ifdef DEBUG
1548         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1549 #else
1550         wait_ms(1);
1551 #endif
1552         if (!maxsize) {
1553                 err("submit_control_message: pipesize for pipe %lx is zero",
1554                         pipe);
1555                 return -1;
1556         }
1557         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1558                 gohci.rh.dev = dev;
1559                 /* root hub - redirect */
1560                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1561                         setup);
1562         }
1563
1564         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1565 }
1566
1567 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1568                 int transfer_len, int interval)
1569 {
1570         info("submit_int_msg");
1571         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1572                         interval);
1573 }
1574
1575 /*-------------------------------------------------------------------------*
1576  * HC functions
1577  *-------------------------------------------------------------------------*/
1578
1579 /* reset the HC and BUS */
1580
1581 static int hc_reset (ohci_t *ohci)
1582 {
1583 #ifdef CONFIG_PCI_EHCI_DEVNO
1584         pci_dev_t pdev;
1585 #endif
1586         int timeout = 30;
1587         int smm_timeout = 50; /* 0,5 sec */
1588
1589         dbg("%s\n", __FUNCTION__);
1590
1591 #ifdef CONFIG_PCI_EHCI_DEVNO
1592         /*
1593          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1594          * resetting via EHCI registers only.
1595          */
1596         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1597         if (pdev != -1) {
1598                 u32 base;
1599                 int timeout = 1000;
1600
1601                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1602                 writel (readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
1603                         base + EHCI_USBCMD_OFF);
1604
1605                 while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
1606                         if (timeout-- <= 0) {
1607                                 printf("USB RootHub reset timed out!");
1608                                 break;
1609                         }
1610                         udelay(1);
1611                 }
1612         } else
1613                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1614 #endif
1615         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1616                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1617                 info("USB HC TakeOver from SMM");
1618                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1619                         wait_ms (10);
1620                         if (--smm_timeout == 0) {
1621                                 err("USB HC TakeOver failed!");
1622                                 return -1;
1623                         }
1624                 }
1625         }
1626
1627         /* Disable HC interrupts */
1628         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1629
1630         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1631                 ohci->slot_name,
1632                 readl(&ohci->regs->control));
1633
1634         /* Reset USB (needed by some controllers) */
1635         ohci->hc_control = 0;
1636         writel (ohci->hc_control, &ohci->regs->control);
1637
1638         /* HC Reset requires max 10 us delay */
1639         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1640         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1641                 if (--timeout == 0) {
1642                         err("USB HC reset timed out!");
1643                         return -1;
1644                 }
1645                 udelay (1);
1646         }
1647         return 0;
1648 }
1649
1650 /*-------------------------------------------------------------------------*/
1651
1652 /* Start an OHCI controller, set the BUS operational
1653  * enable interrupts
1654  * connect the virtual root hub */
1655
1656 static int hc_start (ohci_t * ohci)
1657 {
1658         __u32 mask;
1659         unsigned int fminterval;
1660
1661         ohci->disabled = 1;
1662
1663         /* Tell the controller where the control and bulk lists are
1664          * The lists are empty now. */
1665
1666         writel (0, &ohci->regs->ed_controlhead);
1667         writel (0, &ohci->regs->ed_bulkhead);
1668
1669         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1670
1671         fminterval = 0x2edf;
1672         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1673         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1674         writel (fminterval, &ohci->regs->fminterval);
1675         writel (0x628, &ohci->regs->lsthresh);
1676
1677         /* start controller operations */
1678         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1679         ohci->disabled = 0;
1680         writel (ohci->hc_control, &ohci->regs->control);
1681
1682         /* disable all interrupts */
1683         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1684                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1685                         OHCI_INTR_OC | OHCI_INTR_MIE);
1686         writel (mask, &ohci->regs->intrdisable);
1687         /* clear all interrupts */
1688         mask &= ~OHCI_INTR_MIE;
1689         writel (mask, &ohci->regs->intrstatus);
1690         /* Choose the interrupts we care about now  - but w/o MIE */
1691         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1692         writel (mask, &ohci->regs->intrenable);
1693
1694 #ifdef  OHCI_USE_NPS
1695         /* required for AMD-756 and some Mac platforms */
1696         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1697                 &ohci->regs->roothub.a);
1698         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1699 #endif  /* OHCI_USE_NPS */
1700
1701 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1702         /* POTPGT delay is bits 24-31, in 2 ms units. */
1703         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1704
1705         /* connect the virtual root hub */
1706         ohci->rh.devnum = 0;
1707
1708         return 0;
1709 }
1710
1711 /*-------------------------------------------------------------------------*/
1712
1713 /* Poll USB interrupt. */
1714 void usb_event_poll(void)
1715 {
1716         hc_interrupt();
1717 }
1718
1719 /* an interrupt happens */
1720
1721 static int hc_interrupt (void)
1722 {
1723         ohci_t *ohci = &gohci;
1724         struct ohci_regs *regs = ohci->regs;
1725         int ints;
1726         int stat = -1;
1727
1728         if ((ohci->hcca->done_head != 0) &&
1729             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1730                 ints =  OHCI_INTR_WDH;
1731         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1732                 ohci->disabled++;
1733                 err ("%s device removed!", ohci->slot_name);
1734                 return -1;
1735         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1736                 dbg("hc_interrupt: returning..\n");
1737                 return 0xff;
1738         }
1739
1740         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1741
1742         if (ints & OHCI_INTR_RHSC) {
1743                 got_rhsc = 1;
1744                 stat = 0xff;
1745         }
1746
1747         if (ints & OHCI_INTR_UE) {
1748                 ohci->disabled++;
1749                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1750                         ohci->slot_name);
1751                 /* e.g. due to PCI Master/Target Abort */
1752
1753 #ifdef  DEBUG
1754                 ohci_dump (ohci, 1);
1755 #else
1756         wait_ms(1);
1757 #endif
1758                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1759                 /* Make some non-interrupt context restart the controller. */
1760                 /* Count and limit the retries though; either hardware or */
1761                 /* software errors can go forever... */
1762                 hc_reset (ohci);
1763                 return -1;
1764         }
1765
1766         if (ints & OHCI_INTR_WDH) {
1767                 wait_ms(1);
1768                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1769                 (void)readl (&regs->intrdisable); /* flush */
1770                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1771                 writel (OHCI_INTR_WDH, &regs->intrenable);
1772                 (void)readl (&regs->intrdisable); /* flush */
1773         }
1774
1775         if (ints & OHCI_INTR_SO) {
1776                 dbg("USB Schedule overrun\n");
1777                 writel (OHCI_INTR_SO, &regs->intrenable);
1778                 stat = -1;
1779         }
1780
1781         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1782         if (ints & OHCI_INTR_SF) {
1783                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1784                 wait_ms(1);
1785                 writel (OHCI_INTR_SF, &regs->intrdisable);
1786                 if (ohci->ed_rm_list[frame] != NULL)
1787                         writel (OHCI_INTR_SF, &regs->intrenable);
1788                 stat = 0xff;
1789         }
1790
1791         writel (ints, &regs->intrstatus);
1792         return stat;
1793 }
1794
1795 /*-------------------------------------------------------------------------*/
1796
1797 /*-------------------------------------------------------------------------*/
1798
1799 /* De-allocate all resources.. */
1800
1801 static void hc_release_ohci (ohci_t *ohci)
1802 {
1803         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1804
1805         if (!ohci->disabled)
1806                 hc_reset (ohci);
1807 }
1808
1809 /*-------------------------------------------------------------------------*/
1810
1811 /*
1812  * low level initalisation routine, called from usb.c
1813  */
1814 static char ohci_inited = 0;
1815
1816 int usb_lowlevel_init(void)
1817 {
1818 #ifdef CONFIG_PCI_OHCI
1819         pci_dev_t pdev;
1820 #endif
1821
1822 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1823         /* cpu dependant init */
1824         if(usb_cpu_init())
1825                 return -1;
1826 #endif
1827
1828 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1829         /*  board dependant init */
1830         if(usb_board_init())
1831                 return -1;
1832 #endif
1833         memset (&gohci, 0, sizeof (ohci_t));
1834
1835         /* align the storage */
1836         if ((__u32)&ghcca[0] & 0xff) {
1837                 err("HCCA not aligned!!");
1838                 return -1;
1839         }
1840         phcca = &ghcca[0];
1841         info("aligned ghcca %p", phcca);
1842         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1843         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1844                 err("EDs not aligned!!");
1845                 return -1;
1846         }
1847         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1848         if ((__u32)gtd & 0x7) {
1849                 err("TDs not aligned!!");
1850                 return -1;
1851         }
1852         ptd = gtd;
1853         gohci.hcca = phcca;
1854         memset (phcca, 0, sizeof (struct ohci_hcca));
1855
1856         gohci.disabled = 1;
1857         gohci.sleeping = 0;
1858         gohci.irq = -1;
1859 #ifdef CONFIG_PCI_OHCI
1860         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1861
1862         if (pdev != -1) {
1863                 u16 vid, did;
1864                 u32 base;
1865                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1866                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1867                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1868                                 vid, did, (pdev >> 16) & 0xff,
1869                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1870                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1871                 printf("OHCI regs address 0x%08x\n", base);
1872                 gohci.regs = (struct ohci_regs *)base;
1873         } else
1874                 return -1;
1875 #else
1876         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1877 #endif
1878
1879         gohci.flags = 0;
1880         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1881
1882         if (hc_reset (&gohci) < 0) {
1883                 hc_release_ohci (&gohci);
1884                 err ("can't reset usb-%s", gohci.slot_name);
1885 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1886                 /* board dependant cleanup */
1887                 usb_board_init_fail();
1888 #endif
1889
1890 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1891                 /* cpu dependant cleanup */
1892                 usb_cpu_init_fail();
1893 #endif
1894                 return -1;
1895         }
1896
1897         /* FIXME this is a second HC reset; why?? */
1898         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1899            wait_ms(10); */
1900         if (hc_start (&gohci) < 0) {
1901                 err ("can't start usb-%s", gohci.slot_name);
1902                 hc_release_ohci (&gohci);
1903                 /* Initialization failed */
1904 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1905                 /* board dependant cleanup */
1906                 usb_board_stop();
1907 #endif
1908
1909 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1910                 /* cpu dependant cleanup */
1911                 usb_cpu_stop();
1912 #endif
1913                 return -1;
1914         }
1915
1916 #ifdef  DEBUG
1917         ohci_dump (&gohci, 1);
1918 #else
1919         wait_ms(1);
1920 #endif
1921         ohci_inited = 1;
1922         return 0;
1923 }
1924
1925 int usb_lowlevel_stop(void)
1926 {
1927         /* this gets called really early - before the controller has */
1928         /* even been initialized! */
1929         if (!ohci_inited)
1930                 return 0;
1931         /* TODO release any interrupts, etc. */
1932         /* call hc_release_ohci() here ? */
1933         hc_reset (&gohci);
1934
1935 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1936         /* board dependant cleanup */
1937         if(usb_board_stop())
1938                 return -1;
1939 #endif
1940
1941 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1942         /* cpu dependant cleanup */
1943         if(usb_cpu_stop())
1944                 return -1;
1945 #endif
1946         /* This driver is no longer initialised. It needs a new low-level
1947          * init (board/cpu) before it can be used again. */
1948         ohci_inited = 0;
1949         return 0;
1950 }
1951 #endif /* CONFIG_USB_OHCI_NEW */