include/asm-arm/arch-mx23/ocotp.h

   1 /* Copyright 2009-2010 Freescale Semiconductor, Inc.
   2  *
   3  * On-Chip OTP register descriptions
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18  */
  19 #ifndef OCOTP_H
  20 #define OCOTP_H
  21
  22 #include <asm/arch/mx23.h>
  23
  24 #define OCOTP_BASE      (MX23_REGS_BASE + 0x2c000)
  25
  26 #define OCOTP_CTRL              0x000
  27 #define OCOTP_CTRL_SET          0x004
  28 #define OCOTP_CTRL_CLR          0x008
  29 #define OCOTP_CTRL_TOG          0x00c
  30 #define OCOTP_DATA              0x010
  31 #define OCOTP_CUST0             0x020
  32 #define OCOTP_CUST1             0x030
  33 #define OCOTP_CUST2             0x040
  34 #define OCOTP_CUST3             0x050
  35 #define OCOTP_CRYPTO1           0x070
  36 #define OCOTP_CRYPTO2           0x080
  37 #define OCOTP_CRYPTO3           0x090
  38 #define OCOTP_HWCAP0            0x0a0
  39 #define OCOTP_HWCAP1            0x0b0
  40 #define OCOTP_HWCAP2            0x0c0
  41 #define OCOTP_HWCAP3            0x0d0
  42 #define OCOTP_HWCAP4            0x0e0
  43 #define OCOTP_HWCAP5            0x0f0
  44 #define OCOTP_SWCAP             0x100
  45 #define OCOTP_CUSTCAP           0x110
  46 #define OCOTP_LOCK              0x120
  47 #define OCOTP_OPS0              0x130
  48 #define OCOTP_OPS1              0x140
  49 #define OCOTP_OPS2              0x150
  50 #define OCOTP_OPS3              0x160
  51 #define OCOTP_UN0               0x170
  52 #define OCOTP_UN1               0x180
  53 #define OCOTP_UN2               0x190
  54 #define OCOTP_ROM0              0x1a0
  55 #define OCOTP_ROM1              0x1b0
  56 #define OCOTP_ROM2              0x1c0
  57 #define OCOTP_ROM3              0x1d0
  58 #define OCOTP_ROM4              0x1e0
  59 #define OCOTP_ROM5              0x1f0
  60 #define OCOTP_ROM6              0x200
  61 #define OCOTP_ROM7              0x210
  62 #define OCOTP_VERSION           0x220
  63
  64
  65 /* OCOTP_CTRL register bits, bit fields and values */
  66 #define CTRL_RD_BANK_OPEN       (1 << 12)
  67 #define CTRL_BUSY               (8 << 12)
  68
  69 #endif /* OCOTP_H */