include/asm-arm/arch-mx50/iomux.h

   1 /*
   2  * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  17  */
  18
  19 #ifndef __MACH_MX50_IOMUX_H__
  20 #define __MACH_MX50_IOMUX_H__
  21
  22 #include <common.h>
  23 #include <asm/io.h>
  24 #include <asm/arch/mx50.h>
  25 #include <asm/arch/mx50_pins.h>
  26
  27 typedef unsigned int iomux_pin_name_t;
  28
  29 /* various IOMUX output functions */
  30 typedef enum iomux_config {
  31         IOMUX_CONFIG_ALT0,      /*!< used as alternate function 0 */
  32         IOMUX_CONFIG_ALT1,      /*!< used as alternate function 1 */
  33         IOMUX_CONFIG_ALT2,      /*!< used as alternate function 2 */
  34         IOMUX_CONFIG_ALT3,      /*!< used as alternate function 3 */
  35         IOMUX_CONFIG_ALT4,      /*!< used as alternate function 4 */
  36         IOMUX_CONFIG_ALT5,      /*!< used as alternate function 5 */
  37         IOMUX_CONFIG_ALT6,      /*!< used as alternate function 6 */
  38         IOMUX_CONFIG_ALT7,      /*!< used as alternate function 7 */
  39         IOMUX_CONFIG_GPIO,      /*!< added to help user use GPIO mode */
  40         IOMUX_CONFIG_SION = 0x1 << 4,   /*!< used as LOOPBACK:MUX SION bit */
  41 } iomux_pin_cfg_t;
  42
  43 /* various IOMUX pad functions */
  44 typedef enum iomux_pad_config {
  45         PAD_CTL_SRE_SLOW = 0x0 << 0,
  46         PAD_CTL_SRE_FAST = 0x1 << 0,
  47         PAD_CTL_DRV_LOW = 0x0 << 1,
  48         PAD_CTL_DRV_MEDIUM = 0x1 << 1,
  49         PAD_CTL_DRV_HIGH = 0x2 << 1,
  50         PAD_CTL_DRV_MAX = 0x3 << 1,
  51         PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3,
  52         PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3,
  53         PAD_CTL_100K_PD = 0x0 << 4,
  54         PAD_CTL_47K_PU = 0x1 << 4,
  55         PAD_CTL_100K_PU = 0x2 << 4,
  56         PAD_CTL_22K_PU = 0x3 << 4,
  57         PAD_CTL_PUE_KEEPER = 0x0 << 6,
  58         PAD_CTL_PUE_PULL = 0x1 << 6,
  59         PAD_CTL_PKE_NONE = 0x0 << 7,
  60         PAD_CTL_PKE_ENABLE = 0x1 << 7,
  61         PAD_CTL_HYS_NONE = 0x0 << 8,
  62         PAD_CTL_HYS_ENABLE = 0x1 << 8,
  63         PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,
  64         PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,
  65         PAD_CTL_DRV_VOT_LOW = 0x0 << 13,
  66         PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,
  67 } iomux_pad_config_t;
  68
  69 /* various IOMUX input select register index */
  70 typedef enum iomux_input_select {
  71         MUX_IN_AUDMUX_P4_INPUT_DA_AMX_SELECT_I = 0,
  72         MUX_IN_AUDMUX_P4_INPUT_DB_AMX_SELECT_I,
  73         MUX_IN_AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT,
  74         MUX_IN_AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT,
  75         MUX_IN_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT,
  76         MUX_IN_AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT,
  77         MUX_IN_CCM_PLL1_BYPASS_CLK_SELECT_INPUT,
  78         MUX_IN_CCM_PLL2_BYPASS_CLK_SELECT_INPUT,
  79         MUX_IN_CCM_PLL3_BYPASS_CLK_SELECT_INPUT,
  80         MUX_IN_CSPI_IPP_IND_DATAREADY_B_SELECT_INPUT,
  81         MUX_IN_CSPI_IPP_IND_SS1_B_SELECT_INPUT,
  82         MUX_IN_CSPI_IPP_IND_SS2_B_SELECT_INPUT,
  83         MUX_IN_CSPI_IPP_IND_SS3_B_SELECT_INPUT,
  84         MUX_IN_ELCDIF_LCDIF_BUSY_SELECT_INPUT,
  85         MUX_IN_ELCDIF_LCDIF_RXDATA_0_SELECT_INPUT,
  86         MUX_IN_ELCDIF_LCDIF_RXDATA_1_SELECT_INPUT,
  87         MUX_IN_ELCDIF_LCDIF_RXDATA_2_SELECT_INPUT,
  88         MUX_IN_ELCDIF_LCDIF_RXDATA_3_SELECT_INPUT,
  89         MUX_IN_ELCDIF_LCDIF_RXDATA_4_SELECT_INPUT,
  90         MUX_IN_ELCDIF_LCDIF_RXDATA_5_SELECT_INPUT,
  91         MUX_IN_ELCDIF_LCDIF_RXDATA_6_SELECT_INPUT,
  92         MUX_IN_ELCDIF_LCDIF_RXDATA_7_SELECT_INPUT,
  93         MUX_IN_ELCDIF_LCDIF_RXDATA_8_SELECT_INPUT,
  94         MUX_IN_ELCDIF_LCDIF_RXDATA_9_SELECT_INPUT,
  95         MUX_IN_ELCDIF_LCDIF_RXDATA_10_SELECT_INPUT,
  96         MUX_IN_ELCDIF_LCDIF_RXDATA_11_SELECT_INPUT,
  97         MUX_IN_ELCDIF_LCDIF_RXDATA_12_SELECT_INPUT,
  98         MUX_IN_ELCDIF_LCDIF_RXDATA_13_SELECT_INPUT,
  99         MUX_IN_ELCDIF_LCDIF_RXDATA_14_SELECT_INPUT,
 100         MUX_IN_ELCDIF_LCDIF_RXDATA_15_SELECT_INPUT,
 101         MUX_IN_ELCDIF_VSYNC_I_SELECT_INPUT,
 102         MUX_IN_ESDHC2_IPP_CARD_DET_SELECT_INPUT,
 103         MUX_IN_ESDHC2_IPP_WP_ON_SELECT_INPUT,
 104         MUX_IN_ESDHC4_IPP_CARD_CLK_IN_SELECT_INPUT,
 105         MUX_IN_ESDHC4_IPP_CMD_IN_SELECT_INPUT,
 106         MUX_IN_ESDHC4_IPP_DAT0_IN_SELECT_INPUT,
 107         MUX_IN_ESDHC4_IPP_DAT1_IN_SELECT_INPUT,
 108         MUX_IN_ESDHC4_IPP_DAT2_IN_SELECT_INPUT,
 109         MUX_IN_ESDHC4_IPP_DAT3_IN_SELECT_INPUT,
 110         MUX_IN_ESDHC4_IPP_DAT4_IN_SELECT_INPUT,
 111         MUX_IN_ESDHC4_IPP_DAT5_IN_SELECT_INPUT,
 112         MUX_IN_ESDHC4_IPP_DAT6_IN_SELECT_INPUT,
 113         MUX_IN_ESDHC4_IPP_DAT7_IN_SELECT_INPUT,
 114         MUX_IN_FEC_FEC_COL_SELECT_INPUT,
 115         MUX_IN_FEC_FEC_MDI_SELECT_INPUT,
 116         MUX_IN_FEC_FEC_RDATA_0_SELECT_INPUT,
 117         MUX_IN_FEC_FEC_RDATA_1_SELECT_INPUT,
 118         MUX_IN_FEC_FEC_RX_CLK_SELECT_INPUT,
 119         MUX_IN_FEC_FEC_RX_DV_SELECT_INPUT,
 120         MUX_IN_FEC_FEC_RX_ER_SELECT_INPUT,
 121         MUX_IN_FEC_FEC_TX_CLK_SELECT_INPUT,
 122         MUX_IN_KPP_IPP_IND_COL_4_SELECT_INPUT,
 123         MUX_IN_KPP_IPP_IND_COL_5_SELECT_INPUT,
 124         MUX_IN_KPP_IPP_IND_COL_6_SELECT_INPUT,
 125         MUX_IN_KPP_IPP_IND_COL_7_SELECT_INPUT,
 126         MUX_IN_KPP_IPP_IND_ROW_4_SELECT_INPUT,
 127         MUX_IN_KPP_IPP_IND_ROW_5_SELECT_INPUT,
 128         MUX_IN_KPP_IPP_IND_ROW_6_SELECT_INPUT,
 129         MUX_IN_KPP_IPP_IND_ROW_7_SELECT_INPUT,
 130         MUX_IN_RAWNAND_U_GPMI_INPUT_GPMI_DQS_IN_SELECT_INPUT,
 131         MUX_IN_RAWNAND_U_GPMI_INPUT_GPMI_RDY0_IN_SELECT_INPUT,
 132         MUX_IN_SDMA_EVENTS_14_SELECT_INPUT,
 133         MUX_IN_SDMA_EVENTS_15_SELECT_INPUT,
 134         MUX_IN_UART1_IPP_UART_RTS_B_SELECT_INPUT,
 135         MUX_IN_UART1_IPP_UART_RXD_MUX_SELECT_INPUT,
 136         MUX_IN_UART2_IPP_UART_RTS_B_SELECT_INPUT,
 137         MUX_IN_UART2_IPP_UART_RXD_MUX_SELECT_INPUT,
 138         MUX_IN_UART3_IPP_UART_RTS_B_SELECT_INPUT,
 139         MUX_IN_UART3_IPP_UART_RXD_MUX_SELECT_INPUT,
 140         MUX_IN_UART4_IPP_UART_RTS_B_SELECT_INPUT,
 141         MUX_IN_UART4_IPP_UART_RXD_MUX_SELECT_INPUT,
 142         MUX_IN_UART5_IPP_UART_RTS_B_SELECT_INPUT,
 143         MUX_IN_UART5_IPP_UART_RXD_MUX_SELECT_INPUT,
 144         MUX_IN_USBOH1_IPP_IND_OTG_OC_SELECT_INPUT,
 145         MUX_IN_WEIMV2_IPP_IND_READ_DATA_0_SELECT_INPUT,
 146         MUX_IN_WEIMV2_IPP_IND_READ_DATA_1_SELECT_INPUT,
 147         MUX_IN_WEIMV2_IPP_IND_READ_DATA_2_SELECT_INPUT,
 148         MUX_IN_WEIMV2_IPP_IND_READ_DATA_3_SELECT_INPUT,
 149         MUX_IN_WEIMV2_IPP_IND_READ_DATA_4_SELECT_INPUT,
 150         MUX_IN_WEIMV2_IPP_IND_READ_DATA_5_SELECT_INPUT,
 151         MUX_IN_WEIMV2_IPP_IND_READ_DATA_6_SELECT_INPUT,
 152         MUX_IN_WEIMV2_IPP_IND_READ_DATA_7_SELECT_INPUT,
 153         MUX_IN_WEIMV2_IPP_IND_READ_DATA_8_SELECT_INPUT,
 154         MUX_IN_WEIMV2_IPP_IND_READ_DATA_9_SELECT_INPUT,
 155         MUX_IN_WEIMV2_IPP_IND_READ_DATA_10_SELECT_INPUT,
 156         MUX_IN_WEIMV2_IPP_IND_READ_DATA_11_SELECT_INPUT,
 157         MUX_IN_WEIMV2_IPP_IND_READ_DATA_12_SELECT_INPUT,
 158         MUX_IN_WEIMV2_IPP_IND_READ_DATA_13_SELECT_INPUT,
 159         MUX_IN_WEIMV2_IPP_IND_READ_DATA_14_SELECT_INPUT,
 160         MUX_IN_WEIMV2_IPP_IND_READ_DATA_15_SELECT_INPUT,
 161         MUX_INPUT_NUM_MUX,
 162 } iomux_input_select_t;
 163
 164 /* various IOMUX input functions */
 165 typedef enum iomux_input_config {
 166         INPUT_CTL_PATH0 = 0x0,
 167         INPUT_CTL_PATH1,
 168         INPUT_CTL_PATH2,
 169         INPUT_CTL_PATH3,
 170         INPUT_CTL_PATH4,
 171         INPUT_CTL_PATH5,
 172         INPUT_CTL_PATH6,
 173         INPUT_CTL_PATH7,
 174 } iomux_input_config_t;
 175
 176 struct mxc_iomux_pin_cfg {
 177         iomux_pin_name_t pin;
 178         u8 mux_mode;
 179         u16 pad_cfg;
 180         u8 in_select;
 181         u8 in_mode;
 182 };
 183
 184 /*
 185  * Request ownership for an IO pin. This function has to be the first one
 186  * being called before that pin is used. The caller has to check the
 187  * return value to make sure it returns 0.
 188  *
 189  * @param  pin          a name defined by \b iomux_pin_name_t
 190  * @param  config       config as defined in \b #iomux_pin_ocfg_t
 191  *
 192  * @return              0 if successful; Non-zero otherwise
 193  */
 194 int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config);
 195
 196 /*
 197  * Release ownership for an IO pin
 198  *
 199  * @param  pin          a name defined by \b iomux_pin_name_t
 200  * @param  config       config as defined in \b #iomux_pin_ocfg_t
 201  */
 202 void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config);
 203
 204 /*
 205  * This function configures the pad value for a IOMUX pin.
 206  *
 207  * @param  pin          a pin number as defined in \b #iomux_pin_name_t
 208  * @param  config      the ORed value of elements defined in
 209  *                             \b #iomux_pad_config_t
 210  */
 211 void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config);
 212
 213 /*
 214  * This function gets the current pad value for a IOMUX pin.
 215  *
 216  * @param  pin          a pin number as defined in \b #iomux_pin_name_t
 217  * @return              current pad value
 218  */
 219 unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin);
 220
 221 /*
 222  * This function configures input path.
 223  *
 224  * @param  input        index of input select register as defined in
 225  *                              \b #iomux_input_select_t
 226  * @param  config       the binary value of elements defined in \b #iomux_input_config_t
 227  */
 228 void mxc_iomux_set_input(iomux_input_select_t input, u32 config);
 229
 230 #endif                          /*  __MACH_MX50_IOMUX_H__ */