include/configs/cm_fx6.h

   1 /*
   2  * Config file for Compulab CM-FX6 board
   3  *
   4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
   5  *
   6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_CM_FX6_H
  12 #define __CONFIG_CM_FX6_H
  13
  14 #include <asm/arch/imx-regs.h>
  15 #include <config_distro_defaults.h>
  16 #include "mx6_common.h"
  17
  18 /* Machine config */
  19 #define CONFIG_SYS_LITTLE_ENDIAN
  20 #define CONFIG_MACH_TYPE                4273
  21
  22 #ifndef CONFIG_SPL_BUILD
  23 #define CONFIG_DM
  24 #define CONFIG_CMD_DM
  25
  26 #define CONFIG_DM_GPIO
  27 #define CONFIG_CMD_GPIO
  28
  29 #define CONFIG_DM_SERIAL
  30 #define CONFIG_SYS_MALLOC_F_LEN         (1 << 10)
  31 #endif
  32
  33 /* Display information on boot */
  34 #define CONFIG_DISPLAY_CPUINFO
  35 #define CONFIG_DISPLAY_BOARDINFO
  36 #define CONFIG_TIMESTAMP
  37
  38 /* CMD */
  39 #include <config_cmd_default.h>
  40 #define CONFIG_CMD_GREPENV
  41 #undef CONFIG_CMD_FLASH
  42 #undef CONFIG_CMD_LOADB
  43 #undef CONFIG_CMD_LOADS
  44 #undef CONFIG_CMD_XIMG
  45 #undef CONFIG_CMD_FPGA
  46 #undef CONFIG_CMD_IMLS
  47
  48 /* MMC */
  49 #define CONFIG_MMC
  50 #define CONFIG_CMD_MMC
  51 #define CONFIG_GENERIC_MMC
  52 #define CONFIG_FSL_ESDHC
  53 #define CONFIG_FSL_USDHC
  54 #define CONFIG_SYS_FSL_USDHC_NUM        3
  55 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
  56
  57 /* RAM */
  58 #define PHYS_SDRAM_1                    MMDC0_ARB_BASE_ADDR
  59 #define PHYS_SDRAM_2                    MMDC1_ARB_BASE_ADDR
  60 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  61 #define CONFIG_NR_DRAM_BANKS            2
  62 #define CONFIG_SYS_MEMTEST_START        0x10000000
  63 #define CONFIG_SYS_MEMTEST_END          0x10010000
  64 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  65 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  66 #define CONFIG_SYS_INIT_SP_OFFSET \
  67         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  68 #define CONFIG_SYS_INIT_SP_ADDR \
  69         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  70
  71 /* Serial console */
  72 #define CONFIG_MXC_UART
  73 #define CONFIG_MXC_UART_BASE            UART4_BASE
  74 #define CONFIG_BAUDRATE                 115200
  75 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  76
  77 /* Shell */
  78 #define CONFIG_SYS_PROMPT       "CM-FX6 # "
  79 #define CONFIG_SYS_CBSIZE       1024
  80 #define CONFIG_SYS_MAXARGS      16
  81 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
  82 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
  83                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  84
  85 /* SPI flash */
  86 #define CONFIG_SYS_NO_FLASH
  87 #define CONFIG_CMD_SF
  88 #define CONFIG_SF_DEFAULT_BUS           0
  89 #define CONFIG_SF_DEFAULT_CS            0
  90 #define CONFIG_SF_DEFAULT_SPEED         25000000
  91 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  92
  93 /* Environment */
  94 #define CONFIG_ENV_OVERWRITE
  95 #define CONFIG_ENV_IS_IN_SPI_FLASH
  96 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
  97 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
  98 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
  99 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 100 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
 101 #define CONFIG_ENV_SIZE                 (8 * 1024)
 102 #define CONFIG_ENV_OFFSET               (768 * 1024)
 103
 104 #define CONFIG_EXTRA_ENV_SETTINGS \
 105         "stdout=serial,vga\0" \
 106         "stderr=serial,vga\0" \
 107         "panel=HDMI\0" \
 108         "autoload=no\0" \
 109         "kernel=uImage-cm-fx6\0" \
 110         "script=boot.scr\0" \
 111         "dtb=cm-fx6.dtb\0" \
 112         "bootm_low=18000000\0" \
 113         "loadaddr=0x10800000\0" \
 114         "fdtaddr=0x11000000\0" \
 115         "console=ttymxc3,115200\0" \
 116         "ethprime=FEC0\0" \
 117         "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
 118         "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
 119         "doboot=bootm ${loadaddr}\0" \
 120         "doloadfdt=false\0" \
 121         "setboottypez=setenv kernel zImage-cm-fx6;" \
 122                 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
 123                 "setenv doloadfdt true;\0" \
 124         "setboottypem=setenv kernel uImage-cm-fx6;" \
 125                 "setenv doboot bootm ${loadaddr};" \
 126                 "setenv doloadfdt false;\0"\
 127         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
 128         "sataroot=/dev/sda2 rw rootwait\0" \
 129         "nandroot=/dev/mtdblock4 rw\0" \
 130         "nandrootfstype=ubifs\0" \
 131         "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
 132                 "${video}\0" \
 133         "sataargs=setenv bootargs console=${console} root=${sataroot} " \
 134                 "${video}\0" \
 135         "nandargs=setenv bootargs console=${console} " \
 136                 "root=${nandroot} " \
 137                 "rootfstype=${nandrootfstype} " \
 138                 "${video}\0" \
 139         "nandboot=if run nandloadkernel; then " \
 140                         "run nandloadfdt;" \
 141                         "run setboottypem;" \
 142                         "run storagebootcmd;" \
 143                         "run setboottypez;" \
 144                         "run storagebootcmd;" \
 145                 "fi;\0" \
 146         "run_eboot=echo Starting EBOOT ...; "\
 147                 "mmc dev 2 && " \
 148                 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
 149         "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
 150         "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
 151         "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
 152         "bootscript=echo Running bootscript from ${storagetype} ...;" \
 153                    "source ${loadaddr};\0" \
 154         "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
 155         "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
 156         "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
 157         "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
 158         "setupnandboot=setenv storagetype nand;\0" \
 159         "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
 160         "storagebootcmd=echo Booting from ${storagetype} ...;" \
 161                         "run ${storagetype}args; run doboot;\0" \
 162         "trybootk=if run loadkernel; then " \
 163                 "if ${doloadfdt}; then " \
 164                         "run loadfdt;" \
 165                 "fi;" \
 166                 "run storagebootcmd;" \
 167                 "fi;\0" \
 168         "trybootsmz=if run loadscript; then " \
 169                         "run bootscript;" \
 170                 "fi;" \
 171                 "run setboottypem;" \
 172                 "run trybootk;" \
 173                 "run setboottypez;" \
 174                 "run trybootk;\0"
 175
 176 #define CONFIG_BOOTCOMMAND \
 177         "run setupmmcboot;" \
 178         "mmc dev ${storagedev};" \
 179         "if mmc rescan; then " \
 180                 "run trybootsmz;" \
 181         "fi;" \
 182         "run setupusbboot;" \
 183         "if usb start; then "\
 184                 "if run loadscript; then " \
 185                         "run bootscript;" \
 186                 "fi;" \
 187         "fi;" \
 188         "run setupsataboot;" \
 189         "if sata init; then " \
 190                 "run trybootsmz;" \
 191         "fi;" \
 192         "run setupnandboot;" \
 193         "run nandboot;"
 194
 195 /* SPI */
 196 #define CONFIG_SPI
 197 #define CONFIG_MXC_SPI
 198 #define CONFIG_SPI_FLASH
 199 #define CONFIG_SPI_FLASH_ATMEL
 200 #define CONFIG_SPI_FLASH_EON
 201 #define CONFIG_SPI_FLASH_GIGADEVICE
 202 #define CONFIG_SPI_FLASH_MACRONIX
 203 #define CONFIG_SPI_FLASH_SPANSION
 204 #define CONFIG_SPI_FLASH_STMICRO
 205 #define CONFIG_SPI_FLASH_SST
 206 #define CONFIG_SPI_FLASH_WINBOND
 207
 208 /* NAND */
 209 #ifndef CONFIG_SPL_BUILD
 210 #define CONFIG_CMD_NAND
 211 #define CONFIG_SYS_NAND_BASE            0x40000000
 212 #define CONFIG_SYS_NAND_MAX_CHIPS       1
 213 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 214 #define CONFIG_NAND_MXS
 215 #define CONFIG_SYS_NAND_ONFI_DETECTION
 216 /* APBH DMA is required for NAND support */
 217 #define CONFIG_APBH_DMA
 218 #define CONFIG_APBH_DMA_BURST
 219 #define CONFIG_APBH_DMA_BURST8
 220 #endif
 221
 222 /* Ethernet */
 223 #define CONFIG_FEC_MXC
 224 #define CONFIG_FEC_MXC_PHYADDR          0
 225 #define CONFIG_FEC_XCV_TYPE             RGMII
 226 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 227 #define CONFIG_PHYLIB
 228 #define CONFIG_PHY_ATHEROS
 229 #define CONFIG_MII
 230 #define CONFIG_ETHPRIME                 "FEC0"
 231 #define CONFIG_ARP_TIMEOUT              200UL
 232 #define CONFIG_NET_RETRY_COUNT          5
 233
 234 /* USB */
 235 #define CONFIG_CMD_USB
 236 #define CONFIG_USB_EHCI
 237 #define CONFIG_USB_EHCI_MX6
 238 #define CONFIG_USB_STORAGE
 239 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 240 #define CONFIG_MXC_USB_FLAGS            0
 241 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 242 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
 243
 244 /* I2C */
 245 #define CONFIG_CMD_I2C
 246 #define CONFIG_SYS_I2C
 247 #define CONFIG_SYS_I2C_MXC
 248 #define CONFIG_SYS_I2C_SPEED            100000
 249 #define CONFIG_SYS_MXC_I2C3_SPEED       400000
 250
 251 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 252 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 253 #define CONFIG_SYS_I2C_EEPROM_BUS       2
 254
 255 /* SATA */
 256 #define CONFIG_CMD_SATA
 257 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 258 #define CONFIG_LIBATA
 259 #define CONFIG_LBA48
 260 #define CONFIG_DWC_AHSATA
 261 #define CONFIG_DWC_AHSATA_PORT_ID       0
 262 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 263
 264 /* GPIO */
 265 #define CONFIG_MXC_GPIO
 266
 267 /* Boot */
 268 #define CONFIG_ZERO_BOOTDELAY_CHECK
 269 #define CONFIG_LOADADDR                 0x10800000
 270 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 271 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
 272 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 273 #define CONFIG_SETUP_MEMORY_TAGS
 274 #define CONFIG_INITRD_TAG
 275 #define CONFIG_REVISION_TAG
 276 #define CONFIG_SERIAL_TAG
 277
 278 /* misc */
 279 #define CONFIG_SYS_GENERIC_BOARD
 280 #define CONFIG_STACKSIZE                        (128 * 1024)
 281 #define CONFIG_SYS_MALLOC_LEN                   (10 * 1024 * 1024)
 282 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      800 /* 400 KB */
 283 #define CONFIG_OF_BOARD_SETUP
 284
 285 /* SPL */
 286 #include "imx6_spl.h"
 287 #define CONFIG_SPL_BOARD_INIT
 288 #define CONFIG_SPL_MMC_SUPPORT
 289 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
 290 #define CONFIG_SYS_MONITOR_LEN  (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
 291 #define CONFIG_SPL_SPI_SUPPORT
 292 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 293 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
 294 #define CONFIG_SPL_SPI_LOAD
 295
 296 /* Display */
 297 #define CONFIG_VIDEO
 298 #define CONFIG_VIDEO_IPUV3
 299 #define CONFIG_IPUV3_CLK          260000000
 300 #define CONFIG_IMX_HDMI
 301 #define CONFIG_IMX_VIDEO_SKIP
 302 #define CONFIG_CFB_CONSOLE
 303 #define CONFIG_VGA_AS_SINGLE_DEVICE
 304 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 305 #define CONFIG_CONSOLE_MUX
 306 #define CONFIG_VIDEO_SW_CURSOR
 307
 308 #define CONFIG_VIDEO_LOGO
 309 #define CONFIG_VIDEO_BMP_LOGO
 310
 311 #endif  /* __CONFIG_CM_FX6_H */