2 * Config file for Compulab CM-FX6 board
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
14 #include <asm/arch/imx-regs.h>
15 #include <config_distro_defaults.h>
16 #include "mx6_common.h"
19 #define CONFIG_SYS_LITTLE_ENDIAN
20 #define CONFIG_MACH_TYPE 4273
22 #ifndef CONFIG_SPL_BUILD
23 #define CONFIG_CMD_GPIO
26 /* Display information on boot */
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_TIMESTAMP
32 #include <config_cmd_default.h>
33 #define CONFIG_CMD_GREPENV
34 #undef CONFIG_CMD_FLASH
35 #undef CONFIG_CMD_LOADB
36 #undef CONFIG_CMD_LOADS
37 #undef CONFIG_CMD_XIMG
38 #undef CONFIG_CMD_FPGA
39 #undef CONFIG_CMD_IMLS
43 #define CONFIG_CMD_MMC
44 #define CONFIG_GENERIC_MMC
45 #define CONFIG_FSL_ESDHC
46 #define CONFIG_FSL_USDHC
47 #define CONFIG_SYS_FSL_USDHC_NUM 3
48 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
51 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
52 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
53 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
54 #define CONFIG_NR_DRAM_BANKS 2
55 #define CONFIG_SYS_MEMTEST_START 0x10000000
56 #define CONFIG_SYS_MEMTEST_END 0x10010000
57 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
58 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
59 #define CONFIG_SYS_INIT_SP_OFFSET \
60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
61 #define CONFIG_SYS_INIT_SP_ADDR \
62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
65 #define CONFIG_MXC_UART
66 #define CONFIG_MXC_UART_BASE UART4_BASE
67 #define CONFIG_BAUDRATE 115200
68 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
71 #define CONFIG_SYS_PROMPT "CM-FX6 # "
72 #define CONFIG_SYS_CBSIZE 1024
73 #define CONFIG_SYS_MAXARGS 16
74 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
75 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
76 sizeof(CONFIG_SYS_PROMPT) + 16)
79 #define CONFIG_SYS_NO_FLASH
81 #define CONFIG_SF_DEFAULT_BUS 0
82 #define CONFIG_SF_DEFAULT_CS 0
83 #define CONFIG_SF_DEFAULT_SPEED 25000000
84 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
87 #define CONFIG_ENV_OVERWRITE
88 #define CONFIG_ENV_IS_IN_SPI_FLASH
89 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
90 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
91 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
92 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
93 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
94 #define CONFIG_ENV_SIZE (8 * 1024)
95 #define CONFIG_ENV_OFFSET (768 * 1024)
97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 "stdin=serial,usbkbd\0" \
99 "stdout=serial,vga\0" \
100 "stderr=serial,vga\0" \
103 "kernel=uImage-cm-fx6\0" \
104 "script=boot.scr\0" \
106 "bootm_low=18000000\0" \
107 "loadaddr=0x10800000\0" \
108 "fdtaddr=0x11000000\0" \
109 "console=ttymxc3,115200\0" \
111 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
112 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
113 "doboot=bootm ${loadaddr}\0" \
114 "doloadfdt=false\0" \
115 "setboottypez=setenv kernel zImage-cm-fx6;" \
116 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
117 "setenv doloadfdt true;\0" \
118 "setboottypem=setenv kernel uImage-cm-fx6;" \
119 "setenv doboot bootm ${loadaddr};" \
120 "setenv doloadfdt false;\0"\
121 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
122 "sataroot=/dev/sda2 rw rootwait\0" \
123 "nandroot=/dev/mtdblock4 rw\0" \
124 "nandrootfstype=ubifs\0" \
125 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
127 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
129 "nandargs=setenv bootargs console=${console} " \
130 "root=${nandroot} " \
131 "rootfstype=${nandrootfstype} " \
133 "nandboot=if run nandloadkernel; then " \
135 "run setboottypem;" \
136 "run storagebootcmd;" \
137 "run setboottypez;" \
138 "run storagebootcmd;" \
140 "run_eboot=echo Starting EBOOT ...; "\
142 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
143 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
144 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
145 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
146 "bootscript=echo Running bootscript from ${storagetype} ...;" \
147 "source ${loadaddr};\0" \
148 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
149 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
150 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
151 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
152 "setupnandboot=setenv storagetype nand;\0" \
153 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
154 "storagebootcmd=echo Booting from ${storagetype} ...;" \
155 "run ${storagetype}args; run doboot;\0" \
156 "trybootk=if run loadkernel; then " \
157 "if ${doloadfdt}; then " \
160 "run storagebootcmd;" \
162 "trybootsmz=if run loadscript; then " \
165 "run setboottypem;" \
167 "run setboottypez;" \
170 #define CONFIG_BOOTCOMMAND \
171 "run setupmmcboot;" \
172 "mmc dev ${storagedev};" \
173 "if mmc rescan; then " \
176 "run setupusbboot;" \
177 "if usb start; then "\
178 "if run loadscript; then " \
182 "run setupsataboot;" \
183 "if sata init; then " \
186 "run setupnandboot;" \
189 #define CONFIG_PREBOOT "usb start"
193 #define CONFIG_MXC_SPI
194 #define CONFIG_SPI_FLASH
195 #define CONFIG_SPI_FLASH_ATMEL
196 #define CONFIG_SPI_FLASH_EON
197 #define CONFIG_SPI_FLASH_GIGADEVICE
198 #define CONFIG_SPI_FLASH_MACRONIX
199 #define CONFIG_SPI_FLASH_SPANSION
200 #define CONFIG_SPI_FLASH_STMICRO
201 #define CONFIG_SPI_FLASH_SST
202 #define CONFIG_SPI_FLASH_WINBOND
205 #ifndef CONFIG_SPL_BUILD
206 #define CONFIG_CMD_NAND
207 #define CONFIG_SYS_NAND_BASE 0x40000000
208 #define CONFIG_SYS_NAND_MAX_CHIPS 1
209 #define CONFIG_SYS_MAX_NAND_DEVICE 1
210 #define CONFIG_NAND_MXS
211 #define CONFIG_SYS_NAND_ONFI_DETECTION
212 /* APBH DMA is required for NAND support */
213 #define CONFIG_APBH_DMA
214 #define CONFIG_APBH_DMA_BURST
215 #define CONFIG_APBH_DMA_BURST8
219 #define CONFIG_FEC_MXC
220 #define CONFIG_FEC_MXC_PHYADDR 0
221 #define CONFIG_FEC_XCV_TYPE RGMII
222 #define IMX_FEC_BASE ENET_BASE_ADDR
223 #define CONFIG_PHYLIB
224 #define CONFIG_PHY_ATHEROS
226 #define CONFIG_ETHPRIME "FEC0"
227 #define CONFIG_ARP_TIMEOUT 200UL
228 #define CONFIG_NET_RETRY_COUNT 5
231 #define CONFIG_CMD_USB
232 #define CONFIG_USB_EHCI
233 #define CONFIG_USB_EHCI_MX6
234 #define CONFIG_USB_STORAGE
235 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
236 #define CONFIG_MXC_USB_FLAGS 0
237 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
238 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
239 #define CONFIG_USB_KEYBOARD
240 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
241 #define CONFIG_SYS_STDIO_DEREGISTER
244 #define CONFIG_CMD_I2C
245 #define CONFIG_SYS_I2C
246 #define CONFIG_SYS_I2C_MXC
247 #define CONFIG_SYS_I2C_SPEED 100000
248 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
250 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
251 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
252 #define CONFIG_SYS_I2C_EEPROM_BUS 2
255 #define CONFIG_CMD_SATA
256 #define CONFIG_SYS_SATA_MAX_DEVICE 1
257 #define CONFIG_LIBATA
259 #define CONFIG_DWC_AHSATA
260 #define CONFIG_DWC_AHSATA_PORT_ID 0
261 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
264 #define CONFIG_MXC_GPIO
267 #define CONFIG_ZERO_BOOTDELAY_CHECK
268 #define CONFIG_LOADADDR 0x10800000
269 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
270 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
271 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
272 #define CONFIG_SETUP_MEMORY_TAGS
273 #define CONFIG_INITRD_TAG
274 #define CONFIG_REVISION_TAG
275 #define CONFIG_SERIAL_TAG
278 #define CONFIG_SYS_GENERIC_BOARD
279 #define CONFIG_STACKSIZE (128 * 1024)
280 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
281 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
282 #define CONFIG_OF_BOARD_SETUP
285 #include "imx6_spl.h"
286 #define CONFIG_SPL_BOARD_INIT
287 #define CONFIG_SPL_MMC_SUPPORT
288 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
289 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
290 #define CONFIG_SPL_SPI_SUPPORT
291 #define CONFIG_SPL_SPI_FLASH_SUPPORT
292 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
293 #define CONFIG_SPL_SPI_LOAD
297 #define CONFIG_VIDEO_IPUV3
298 #define CONFIG_IPUV3_CLK 260000000
299 #define CONFIG_IMX_HDMI
300 #define CONFIG_IMX_VIDEO_SKIP
301 #define CONFIG_CFB_CONSOLE
302 #define CONFIG_VGA_AS_SINGLE_DEVICE
303 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
304 #define CONFIG_CONSOLE_MUX
305 #define CONFIG_VIDEO_SW_CURSOR
307 #define CONFIG_SPLASH_SCREEN
308 #define CONFIG_SPLASH_SOURCE
309 #define CONFIG_CMD_BMP
310 #define CONFIG_VIDEO_BMP_RLE8
312 #define CONFIG_VIDEO_LOGO
313 #define CONFIG_VIDEO_BMP_LOGO
315 #endif /* __CONFIG_CM_FX6_H */