2 * (C) Copyright 2009-2010 Freescale Semiconductor
6 * Richard Woodruff <r-woodruff2@ti.com>
7 * Kshitij Gupta <kshitij@ti.com>
9 * Configuration settings for the Freescale i.MX31 PDK board.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/arch/mx25.h>
34 #include <asm/arch/mx25-regs.h>
36 /* High Level Configuration Options */
37 #define CONFIG_ARM926EJS 1 /* This is an arm1136 CPU core */
38 #define CONFIG_MX25 1 /* in a mx31 */
39 #define CONFIG_MX25_HCLK_FREQ 24000000
40 #define CONFIG_MX25_CLK32 32768
42 #define CONFIG_IMX_CSPI 1
43 #define IMX_CSPI_VER_0_7 1
44 #define CONFIG_IMX_SPI_CPLD
46 /* IF iMX25 3DS V-1.0 define it */
47 /* #define CONFIG_MX25_3DS_V10 */
49 #ifdef CONFIG_MX25_3DS_V10
50 #define MXC_MEMORY_MDDR
53 #define CONFIG_DISPLAY_CPUINFO
54 #define CONFIG_DISPLAY_BOARDINFO
56 #define CONFIG_SYS_64BIT_VSPRINTF
58 #define BOARD_LATE_INIT
60 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
61 #define CONFIG_SETUP_MEMORY_TAGS 1
62 #define CONFIG_INITRD_TAG 1
64 /* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
65 * program to initialize the SDRAM.
67 #define CONFIG_SKIP_RELOCATE_UBOOT
70 * Size of malloc() pool
72 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024)
73 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved initial data */
78 #define CONFIG_HARD_I2C 1
79 #define CONFIG_I2C_MXC 1
80 #define CONFIG_SYS_I2C_PORT I2C1_BASE
81 #define CONFIG_SYS_I2C_SPEED 40000
82 #define CONFIG_SYS_I2C_SLAVE 0xfe
84 #define CONFIG_MX25_UART 1
85 #define CONFIG_MX25_UART1 1
87 /* allow to overwrite serial and ethaddr */
88 #define CONFIG_ENV_OVERWRITE
89 #define CONFIG_CONS_INDEX 1
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
93 /***********************************************************
95 ***********************************************************/
97 #include <config_cmd_default.h>
99 #define CONFIG_CMD_I2C
100 #define CONFIG_CMD_MII
101 #define CONFIG_CMD_PING
102 /* #define CONFIG_CMD_SPI */
103 /* #define CONFIG_CMD_DATE */
104 #define CONFIG_CMD_NAND
105 #define CONFIG_CMD_MMC
106 #define CONFIG_MXC_NAND
112 #ifdef CONFIG_CMD_MMC
114 #define CONFIG_GENERIC_MMC
115 #define CONFIG_IMX_MMC
116 #define CONFIG_SYS_FSL_ESDHC_NUM 2
117 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
118 #define CONFIG_SYS_MMC_ENV_DEV 0
119 #define CONFIG_IMX_ESDHC_V1
120 #define CONFIG_DOS_PARTITION 1
121 #define CONFIG_CMD_FAT 1
124 /* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
125 * that CONFIG_NO_FLASH is undefined).
127 #undef CONFIG_CMD_IMLS
129 #define CONFIG_BOOTDELAY 3
131 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
133 #define CONFIG_EXTRA_ENV_SETTINGS \
135 "ethprime=smc911x-0\0" \
136 "uboot=u-boot.bin\0" \
137 "uboot_addr=0xa0000000\0" \
139 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
140 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
141 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
142 "bootcmd=run bootcmd_net\0" \
143 "bootcmd_net=run bootargs_base bootargs_nfs; " \
144 "tftpboot ${loadaddr} ${kernel}; bootm\0" \
145 "load_uboot=tftpboot ${loadaddr} ${uboot}\0" \
146 "splashimage=0x80800000\0"
149 #define CONFIG_SMC911X
150 #define CONFIG_SMC911X_CPLD
151 #define CONFIG_SMC911X_BASE 0
153 #define CONFIG_HAS_ETH1
154 #define CONFIG_CMD_NET
155 #define CONFIG_NET_RETRY_COUNT 100
156 #define CONFIG_CMD_DHCP
157 #define CONFIG_BOOTP_SUBNETMASK
158 #define CONFIG_BOOTP_GATEWAY
159 #define CONFIG_BOOTP_DNS
160 #define CONFIG_NET_MULTI
161 #define CONFIG_ETHPRIME
163 #define CONFIG_MXC_FEC
165 #define CONFIG_MII_GASKET
166 #define CONFIG_DISCOVER_PHY
168 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
169 #define CONFIG_IIM_MAC_ADDR_OFFSET 0x68
171 #define CONFIG_FEC0_IOBASE FEC_BASE
172 #define CONFIG_FEC0_PINMUX -1
173 #define CONFIG_FEC0_PHY_ADDR 0x1F
174 #define CONFIG_FEC0_MIIBASE -1
177 * Miscellaneous configurable options
179 #define CONFIG_SYS_LONGHELP /* undef to save memory */
180 #define CONFIG_SYS_PROMPT "MX25 U-Boot > "
181 #define CONFIG_AUTO_COMPLETE
182 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
183 /* Print Buffer Size */
184 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
185 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
186 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buf Size */
188 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest works on */
189 #define CONFIG_SYS_MEMTEST_END 0x10000
191 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* default load address */
193 #define CONFIG_SYS_HZ 1000
195 #define UBOOT_IMAGE_SIZE 0x40000
197 #define CONFIG_CMDLINE_EDITING 1
199 /*-----------------------------------------------------------------------
202 * The stack sizes are set up in start.S using the settings below
204 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
206 /*-----------------------------------------------------------------------
207 * Physical Memory Map
209 #define CONFIG_NR_DRAM_BANKS 1
210 #define PHYS_SDRAM_1 CSD0_BASE
212 /* iMX25 V-1.0 has 128MB but V-1.1 has only 64MB */
213 #ifdef CONFIG_MX25_3DS_V10
214 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
216 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
221 #define CONFIG_SPLASH_SCREEN
224 #ifdef CONFIG_SPLASH_SCREEN
226 #define CONFIG_MXC2_LCD 1
227 #undef LCD_TEST_PATTERN
228 #define CONFIG_FB_BASE 0x81400000
229 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
230 #define CONFIG_SPLASH_SCREEN 1
231 #define CONFIG_SPLASH_IS_IN_MMC 1
232 #define LCD_BPP LCD_COLOR16
233 /* #define CONFIG_SPLASH_SCREEN_ALIGN 1 */
235 #define CONFIG_CMD_BMP
236 #define CONFIG_BMP_24BPP 1
237 #define CONFIG_BMP_16BPP 1
241 #ifdef CONFIG_SPLASH_IS_IN_MMC
242 #define CONFIG_SPLASH_IMG_MMC_DEV 0
243 #define CONFIG_SPLASH_IMG_OFFSET 0x4c000
244 #define CONFIG_SPLASH_IMG_SIZE 0x19000
247 /* Monitor at beginning of flash */
248 /* #define CONFIG_FSL_ENV_IN_MMC */
249 #define CONFIG_FSL_ENV_IN_NAND
251 /*-----------------------------------------------------------------------
252 * FLASH and environment organization
254 #if defined(CONFIG_FSL_ENV_IN_NAND)
255 #define CONFIG_ENV_IS_IN_NAND 1
256 #define CONFIG_ENV_OFFSET 0x80000
257 #elif defined(CONFIG_FSL_ENV_IN_MMC)
258 #define CONFIG_ENV_IS_IN_MMC 1
259 #define CONFIG_ENV_OFFSET (768 * 1024)
261 #define CONFIG_ENV_IS_NOWHERE 1
264 #define CONFIG_ENV_SECT_SIZE (256 * 1024)
265 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
267 /*-----------------------------------------------------------------------
268 * NAND FLASH driver setup
270 #define CONFIG_SYS_NO_FLASH
271 #define NAND_MAX_CHIPS 1
272 #define CONFIG_SYS_MAX_NAND_DEVICE 1
273 #define CONFIG_SYS_NAND_BASE 0x40000000
276 * JFFS2 partitions TODO:
278 #undef CONFIG_JFFS2_CMDLINE
279 #define CONFIG_JFFS2_DEV "nand0"
281 #endif /* __CONFIG_H */