2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX50-ARM2 Freescale board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx50.h>
27 /* High Level Configuration Options */
30 #define CONFIG_MX50_ARM2
31 #define CONFIG_FLASH_HEADER
32 #define CONFIG_FLASH_HEADER_OFFSET 0x400
34 #define CONFIG_SKIP_RELOCATE_UBOOT
36 #define CONFIG_ARCH_CPU_INIT
37 #define CONFIG_ARCH_MMU
39 #define CONFIG_MX50_HCLK_FREQ 24000000
40 #define CONFIG_SYS_PLL2_FREQ 400
41 #define CONFIG_SYS_AHB_PODF 2
42 #define CONFIG_SYS_AXIA_PODF 0
43 #define CONFIG_SYS_AXIB_PODF 1
45 #define CONFIG_DISPLAY_CPUINFO
46 #define CONFIG_DISPLAY_BOARDINFO
48 #define CONFIG_SYS_64BIT_VSPRINTF
50 #define BOARD_LATE_INIT
52 * Disabled for now due to build problems under Debian and a significant
53 * increase in the final file size: 144260 vs. 109536 Bytes.
56 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57 #define CONFIG_REVISION_TAG 1
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
62 * Size of malloc() pool
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
65 /* size in bytes reserved for initial data */
66 #define CONFIG_SYS_GBL_DATA_SIZE 128
71 #define CONFIG_MX50_UART 1
72 #define CONFIG_MX50_UART1 1
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_CONS_INDEX 1
77 #define CONFIG_BAUDRATE 115200
78 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
80 /***********************************************************
82 ***********************************************************/
84 #include <config_cmd_default.h>
86 #define CONFIG_CMD_PING
87 #define CONFIG_CMD_DHCP
88 #define CONFIG_CMD_MII
89 #define CONFIG_CMD_NET
90 #define CONFIG_NET_RETRY_COUNT 100
91 #define CONFIG_NET_MULTI 1
92 #define CONFIG_BOOTP_SUBNETMASK
93 #define CONFIG_BOOTP_GATEWAY
94 #define CONFIG_BOOTP_DNS
96 #define CONFIG_CMD_MMC
97 #define CONFIG_CMD_ENV
99 /*#define CONFIG_CMD */
100 #define CONFIG_REF_CLK_FREQ CONFIG_MX50_HCLK_FREQ
102 #undef CONFIG_CMD_IMLS
104 #define CONFIG_BOOTDELAY 3
106 #define CONFIG_PRIME "FEC0"
108 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
109 #define CONFIG_RD_LOADADDR (CONFIG_LOADADDR + 0x300000)
111 #define CONFIG_EXTRA_ENV_SETTINGS \
114 "uboot=u-boot.bin\0" \
116 "nfsroot=/opt/eldk/arm\0" \
117 "bootargs_base=setenv bootargs console=ttymxc0,115200\0"\
118 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
119 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
120 "bootcmd_net=run bootargs_base bootargs_nfs; " \
121 "tftpboot ${loadaddr} ${kernel}; bootm\0" \
122 "bootargs_mmc=setenv bootargs ${bootargs} ip=dhcp " \
123 "root=/dev/mmcblk0p2 rootwait\0" \
124 "bootcmd_mmc=run bootargs_base bootargs_mmc; bootm\0" \
125 "bootcmd=run bootcmd_net\0" \
128 #define CONFIG_ARP_TIMEOUT 200UL
131 * Miscellaneous configurable options
133 #define CONFIG_SYS_LONGHELP /* undef to save memory */
134 #define CONFIG_SYS_PROMPT "ARM2 U-Boot > "
135 #define CONFIG_AUTO_COMPLETE
136 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
137 /* Print Buffer Size */
138 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
139 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
142 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
143 #define CONFIG_SYS_MEMTEST_END 0x10000
145 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
149 #define CONFIG_SYS_HZ 1000
151 #define CONFIG_CMDLINE_EDITING 1
153 #define CONFIG_FEC0_IOBASE FEC_BASE_ADDR
154 #define CONFIG_FEC0_PINMUX -1
155 #define CONFIG_FEC0_PHY_ADDR -1
156 #define CONFIG_FEC0_MIIBASE -1
158 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
160 #define CONFIG_MXC_FEC
162 #define CONFIG_MII_GASKET
163 #define CONFIG_DISCOVER_PHY
166 #define CONFIG_SPLASH_SCREEN
170 * SPLASH SCREEN Configs
172 #ifdef CONFIG_SPLASH_SCREEN
174 #undef LCD_TEST_PATTERN
175 #define CONFIG_FB_BASE (TEXT_BASE + 0x300000)
176 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
177 /* #define CONFIG_SPLASH_IS_IN_MMC 1 */
178 #define LCD_BPP LCD_MONOCHROME
179 /* #define CONFIG_SPLASH_SCREEN_ALIGN 1 */
181 #define CONFIG_MXC_EPDC 1
183 #define CONFIG_WORKING_BUF_ADDR (TEXT_BASE + 0x100000)
184 #define CONFIG_WAVEFORM_BUF_ADDR (TEXT_BASE + 0x200000)
185 #define CONFIG_WAVEFORM_FILE_OFFSET 0x100000
186 #define CONFIG_WAVEFORM_FILE_SIZE 0xB4000
187 #define CONFIG_WAVEFORM_FILE_IN_MMC
190 #ifdef CONFIG_SPLASH_IS_IN_MMC
191 #define CONFIG_SPLASH_IMG_OFFSET 0x4c000
192 #define CONFIG_SPLASH_IMG_SIZE 0x19000
198 #define CONFIG_CMD_I2C 1
199 #define CONFIG_HARD_I2C 1
200 #define CONFIG_I2C_MXC 1
201 #define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
202 #define CONFIG_SYS_I2C_SPEED 100000
203 #define CONFIG_SYS_I2C_SLAVE 0xfe
209 #define CONFIG_FSL_SF 1
210 #define CONFIG_CMD_SPI
211 #define CONFIG_CMD_SF
212 #define CONFIG_SPI_FLASH_IMX_ATMEL 1
213 #define CONFIG_SPI_FLASH_CS 1
214 #define CONFIG_IMX_CSPI
215 #define IMX_CSPI_VER_0_7 1
216 #define MAX_SPI_BYTES (8 * 4)
217 #define CONFIG_IMX_SPI_PMIC
218 #define CONFIG_IMX_SPI_PMIC_CS 0
223 #ifdef CONFIG_CMD_MMC
225 #define CONFIG_GENERIC_MMC
226 #define CONFIG_IMX_MMC
227 #define CONFIG_SYS_FSL_ESDHC_NUM 3
228 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
229 #define CONFIG_SYS_MMC_ENV_DEV 0
230 #define CONFIG_DOS_PARTITION 1
231 #define CONFIG_CMD_FAT 1
232 #define CONFIG_CMD_EXT2 1
234 /* detect whether ESDHC1, ESDHC2, or ESDHC3 is boot device */
235 #define CONFIG_DYNAMIC_MMC_DEVNO
237 #define CONFIG_BOOT_PARTITION_ACCESS
238 #define CONFIG_EMMC_DDR_MODE
240 /* Indicate to esdhc driver which ports support 8-bit data */
241 #define CONFIG_MMC_8BIT_PORTS 0x6 /* ports 1 and 2 */
244 /*-----------------------------------------------------------------------
247 * The stack sizes are set up in start.S using the settings below
249 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
251 /*-----------------------------------------------------------------------
252 * Physical Memory Map
254 #define CONFIG_NR_DRAM_BANKS 1
255 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
256 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
257 #define iomem_valid_addr(addr, size) \
258 (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
260 /*-----------------------------------------------------------------------
261 * FLASH and environment organization
263 #define CONFIG_SYS_NO_FLASH
265 /* Monitor at beginning of flash */
266 #define CONFIG_FSL_ENV_IN_MMC
268 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
269 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
271 #if defined(CONFIG_FSL_ENV_IN_NAND)
272 #define CONFIG_ENV_IS_IN_NAND 1
273 #define CONFIG_ENV_OFFSET 0x100000
274 #elif defined(CONFIG_FSL_ENV_IN_MMC)
275 #define CONFIG_ENV_IS_IN_MMC 1
276 #define CONFIG_ENV_OFFSET (768 * 1024)
277 #elif defined(CONFIG_FSL_ENV_IN_SF)
278 #define CONFIG_ENV_IS_IN_SPI_FLASH 1
279 #define CONFIG_ENV_SPI_CS 1
280 #define CONFIG_ENV_OFFSET (768 * 1024)
282 #define CONFIG_ENV_IS_NOWHERE 1
284 #endif /* __CONFIG_H */