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arm: mx5: clock: add support for changing CPU clock via cmdline
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1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Sricharan R    <r.sricharan@ti.com>
5  *
6  * Derived from OMAP4 done by:
7  *      Aneesh V <aneesh@ti.com>
8  *
9  * TI OMAP5 AND DRA7XX common configuration settings
10  *
11  * SPDX-License-Identifier:     GPL-2.0+ 
12  */
13
14 #ifndef __CONFIG_OMAP5_COMMON_H
15 #define __CONFIG_OMAP5_COMMON_H
16
17 /*
18  * High Level Configuration Options
19  */
20 #define CONFIG_OMAP     /* in a TI OMAP core */
21 #define CONFIG_OMAP54XX /* which is a 54XX */
22 #define CONFIG_OMAP_GPIO
23
24 /* Get CPU defs */
25 #include <asm/arch/cpu.h>
26 #include <asm/arch/omap.h>
27
28 /* Display CPU and Board Info */
29 #define CONFIG_DISPLAY_CPUINFO
30 #define CONFIG_DISPLAY_BOARDINFO
31
32 #define CONFIG_MISC_INIT_R
33
34 #define CONFIG_OF_LIBFDT
35 #define CONFIG_CMD_BOOTZ
36
37 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS
39 #define CONFIG_INITRD_TAG
40
41 /*
42  * Size of malloc() pool
43  * Total Size Environment - 128k
44  * Malloc - add 256k
45  */
46 #define CONFIG_ENV_SIZE                 (128 << 10)
47 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (256 << 10))
48 /* Vector Base */
49 #define CONFIG_SYS_CA9_VECTOR_BASE      SRAM_ROM_VECT_BASE
50
51 /*
52  * Hardware drivers
53  */
54
55 /*
56  * serial port - NS16550 compatible
57  */
58 #define V_NS16550_CLK                   48000000
59
60 #define CONFIG_SYS_NS16550
61 #define CONFIG_SYS_NS16550_SERIAL
62 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
63 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
64
65 /* CPU */
66 #define CONFIG_ARCH_CPU_INIT
67
68 /* I2C  */
69 #define CONFIG_HARD_I2C
70 #define CONFIG_SYS_I2C_SPEED            100000
71 #define CONFIG_SYS_I2C_SLAVE            1
72 #define CONFIG_DRIVER_OMAP34XX_I2C
73 #define CONFIG_I2C_MULTI_BUS
74
75 /* MMC */
76 #define CONFIG_GENERIC_MMC
77 #define CONFIG_MMC
78 #define CONFIG_OMAP_HSMMC
79 #define CONFIG_DOS_PARTITION
80
81 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
82
83 /* Flash */
84 #define CONFIG_SYS_NO_FLASH
85
86 /* Cache */
87 #define CONFIG_SYS_CACHELINE_SIZE       64
88 #define CONFIG_SYS_CACHELINE_SHIFT      6
89
90 /* commands to include */
91 #include <config_cmd_default.h>
92
93 /* Enabled commands */
94 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
95 #define CONFIG_CMD_FAT          /* FAT support                  */
96 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
97 #define CONFIG_CMD_MMC          /* MMC support                  */
98
99 /* Disabled commands */
100 #undef CONFIG_CMD_NET
101 #undef CONFIG_CMD_NFS
102 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
103 #undef CONFIG_CMD_IMLS          /* List all found images        */
104
105 /*
106  * Environment setup
107  */
108
109 #define CONFIG_BOOTDELAY        3
110 #define CONFIG_ENV_VARS_UBOOT_CONFIG
111 #define CONFIG_CMD_FS_GENERIC
112 #define CONFIG_CMD_EXT2
113 #define CONFIG_CMD_EXT4
114
115 #define CONFIG_ENV_OVERWRITE
116
117 #ifndef PARTS_DEFAULT
118 #define PARTS_DEFAULT
119 #endif
120
121 #define CONFIG_EXTRA_ENV_SETTINGS \
122         "loadaddr=0x82000000\0" \
123         "console=" CONSOLEDEV ",115200n8\0" \
124         "fdt_high=0xffffffff\0" \
125         "fdtaddr=0x80f80000\0" \
126         "fdtfile=undefined\0" \
127         "bootpart=0:2\0" \
128         "bootdir=/boot\0" \
129         "bootfile=zImage\0" \
130         "usbtty=cdc_acm\0" \
131         "vram=16M\0" \
132         "partitions=" PARTS_DEFAULT "\0" \
133         "optargs=\0" \
134         "mmcdev=0\0" \
135         "mmcroot=/dev/mmcblk0p2 rw\0" \
136         "mmcrootfstype=ext4 rootwait\0" \
137         "mmcargs=setenv bootargs console=${console} " \
138                 "${optargs} " \
139                 "vram=${vram} " \
140                 "root=${mmcroot} " \
141                 "rootfstype=${mmcrootfstype}\0" \
142         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
143         "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
144                 "source ${loadaddr}\0" \
145         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
146         "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
147                 "env import -t ${loadaddr} ${filesize}\0" \
148         "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
149         "mmcboot=echo Booting from mmc${mmcdev} ...; " \
150                 "run mmcargs; " \
151                 "bootz ${loadaddr} - ${fdtaddr}\0" \
152         "findfdt="\
153                 "if test $board_name = omap5_uevm; then " \
154                         "setenv fdtfile omap5-uevm.dtb; fi; " \
155                 "if test $board_name = dra7xx; then " \
156                         "setenv fdtfile dra7-evm.dtb; fi;" \
157                 "if test $fdtfile = undefined; then " \
158                         "echo WARNING: Could not determine device tree to use; fi; \0" \
159         "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
160
161 #define CONFIG_BOOTCOMMAND \
162         "run findfdt; " \
163         "mmc dev ${mmcdev}; if mmc rescan; then " \
164                 "if run loadbootscript; then " \
165                         "run bootscript; " \
166                 "else " \
167                         "if run loadbootenv; then " \
168                                 "run importbootenv; " \
169                         "fi;" \
170                         "if test -n ${uenvcmd}; then " \
171                                 "echo Running uenvcmd ...;" \
172                                 "run uenvcmd;" \
173                         "fi;" \
174                 "fi;" \
175                 "if run loadimage; then " \
176                         "run loadfdt; " \
177                         "run mmcboot; " \
178                 "fi; " \
179         "fi"
180
181 #define CONFIG_AUTO_COMPLETE            1
182
183 /*
184  * Miscellaneous configurable options
185  */
186
187 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
188 #define CONFIG_SYS_HUSH_PARSER  /* use "hush" command parser */
189 #define CONFIG_SYS_CBSIZE               256
190 /* Print Buffer Size */
191 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
192                                         sizeof(CONFIG_SYS_PROMPT) + 16)
193 #define CONFIG_SYS_MAXARGS              16
194 /* Boot Argument Buffer Size */
195 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
196
197 /*
198  * memtest setup
199  */
200 #define CONFIG_SYS_MEMTEST_START        0x80000000
201 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + (32 << 20))
202
203 /* Default load address */
204 #define CONFIG_SYS_LOAD_ADDR            0x80000000
205
206 /* Use General purpose timer 1 */
207 #define CONFIG_SYS_TIMERBASE            GPT2_BASE
208 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
209 #define CONFIG_SYS_HZ                   1000
210
211 /*
212  * SDRAM Memory Map
213  * Even though we use two CS all the memory
214  * is mapped to one contiguous block
215  */
216 #define CONFIG_NR_DRAM_BANKS    1
217
218 #define CONFIG_SYS_SDRAM_BASE           0x80000000
219 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
220                                          GENERATED_GBL_DATA_SIZE)
221
222 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
223
224 /* Defines for SDRAM init */
225 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
226 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
227 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
228 #endif
229
230 #ifndef CONFIG_SPL_BUILD
231 #define CONFIG_PALMAS_POWER
232 #endif
233
234 /* Defines for SPL */
235 #define CONFIG_SPL
236 #define CONFIG_SPL_FRAMEWORK
237 #define CONFIG_SPL_TEXT_BASE            0x40300350
238 #define CONFIG_SPL_MAX_SIZE             0x19000 /* 100K */
239 #define CONFIG_SPL_STACK                CONFIG_SYS_INIT_SP_ADDR
240 #define CONFIG_SPL_DISPLAY_PRINT
241
242 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
243 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
244 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
245 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
246
247 #define CONFIG_SPL_LIBCOMMON_SUPPORT
248 #define CONFIG_SPL_LIBDISK_SUPPORT
249 #define CONFIG_SPL_I2C_SUPPORT
250 #define CONFIG_SPL_MMC_SUPPORT
251 #define CONFIG_SPL_FAT_SUPPORT
252 #define CONFIG_SPL_LIBGENERIC_SUPPORT
253 #define CONFIG_SPL_SERIAL_SUPPORT
254 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
255
256 /*
257  * 64 bytes before this address should be set aside for u-boot.img's
258  * header. That is 80E7FFC0--0x80E80000 should not be used for any
259  * other needs.
260  */
261 #define CONFIG_SYS_TEXT_BASE            0x80E80000
262
263 /*
264  * BSS and malloc area 64MB into memory to allow enough
265  * space for the kernel at the beginning of memory
266  */
267 #define CONFIG_SPL_BSS_START_ADDR       0x84000000
268 #define CONFIG_SPL_BSS_MAX_SIZE         0x100000        /* 1 MB */
269 #define CONFIG_SYS_SPL_MALLOC_START     0x84100000
270 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
271 #define CONFIG_SPL_GPIO_SUPPORT
272
273 #endif /* __CONFIG_OMAP5_COMMON_H */