include/configs/tbs2910.h

   1 /*
   2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
   3  *
   4  * Configuration settings for the TBS2910 MatrixARM board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __TBS2910_CONFIG_H
  10 #define __TBS2910_CONFIG_H
  11
  12 #include "mx6_common.h"
  13 #include <asm/arch/imx-regs.h>
  14 #include <asm/imx-common/gpio.h>
  15
  16 /* General configuration */
  17 #define CONFIG_DISPLAY_CPUINFO
  18 #define CONFIG_DISPLAY_BOARDINFO_LATE
  19 #define CONFIG_SYS_THUMB_BUILD
  20
  21 #define CONFIG_MACH_TYPE                3980
  22
  23 #define CONFIG_CMDLINE_TAG
  24 #define CONFIG_SETUP_MEMORY_TAGS
  25 #define CONFIG_INITRD_TAG
  26 #define CONFIG_REVISION_TAG
  27 #define CONFIG_SYS_GENERIC_BOARD
  28
  29 #define CONFIG_BOARD_EARLY_INIT_F
  30 #define CONFIG_MXC_GPIO
  31 #define CONFIG_CMD_GPIO
  32
  33 #define CONFIG_SYS_LONGHELP
  34 #define CONFIG_SYS_HUSH_PARSER
  35 #define CONFIG_SYS_PROMPT               "Matrix U-Boot> "
  36 #define CONFIG_BOOTDELAY                3
  37 #define CONFIG_AUTO_COMPLETE
  38 #define CONFIG_CMDLINE_EDITING
  39 #define CONFIG_SYS_MAXARGS              16
  40 #define CONFIG_SYS_CBSIZE               1024
  41 #define CONFIG_SYS_PBSIZE \
  42         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  43 #define CONFIG_SYS_HZ                   1000
  44
  45 /* Physical Memory Map */
  46 #define CONFIG_NR_DRAM_BANKS            1
  47 #define CONFIG_SYS_SDRAM_BASE           MMDC0_ARB_BASE_ADDR
  48
  49 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  50 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  51 #define CONFIG_SYS_INIT_SP_OFFSET \
  52         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  53 #define CONFIG_SYS_INIT_SP_ADDR \
  54         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  55
  56 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024 * 1024)
  57
  58 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  59 #define CONFIG_SYS_MEMTEST_END \
  60         (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
  61
  62 #define CONFIG_SYS_TEXT_BASE            0x80000000
  63 #define CONFIG_SYS_BOOTMAPSZ            0x6C000000
  64 #define CONFIG_SYS_LOAD_ADDR            0x10800000
  65
  66 /* Serial console */
  67 #define CONFIG_MXC_UART
  68 #define CONFIG_MXC_UART_BASE            UART1_BASE /* select UART1/UART2 */
  69 #define CONFIG_BAUDRATE                 115200
  70
  71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  72 #define CONFIG_CONSOLE_MUX
  73 #define CONFIG_CONS_INDEX               1
  74
  75 /* *** Command definition *** */
  76 #include <config_cmd_default.h>
  77
  78 #undef CONFIG_CMD_IMLS
  79
  80 #define CONFIG_CMD_BMODE
  81 #define CONFIG_CMD_SETEXPR
  82 #define CONFIG_CMD_MEMTEST
  83 #define CONFIG_CMD_TIME
  84
  85 /* Filesystems / image support */
  86 #define CONFIG_CMD_EXT4
  87 #define CONFIG_CMD_FAT
  88 #define CONFIG_DOS_PARTITION
  89 #define CONFIG_EFI_PARTITION
  90 #define CONFIG_CMD_FS_GENERIC
  91
  92 #define CONFIG_OF_LIBFDT
  93 #define CONFIG_CMD_BOOTZ
  94 #define CONFIG_SUPPORT_RAW_INITRD
  95 #define CONFIG_FIT
  96
  97 /* MMC */
  98 #define CONFIG_FSL_ESDHC
  99 #define CONFIG_FSL_USDHC
 100 #define CONFIG_SYS_FSL_USDHC_NUM        3
 101 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
 102
 103 #define CONFIG_MMC
 104 #define CONFIG_CMD_MMC
 105 #define CONFIG_GENERIC_MMC
 106 #define CONFIG_BOUNCE_BUFFER
 107
 108 /* Ethernet */
 109 #define CONFIG_FEC_MXC
 110 #define CONFIG_CMD_PING
 111 #define CONFIG_CMD_DHCP
 112 #define CONFIG_CMD_MII
 113 #define CONFIG_CMD_NET
 114 #define CONFIG_FEC_MXC
 115 #define CONFIG_MII
 116 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 117 #define CONFIG_FEC_XCV_TYPE             RGMII
 118 #define CONFIG_ETHPRIME                 "FEC"
 119 #define CONFIG_FEC_MXC_PHYADDR          4
 120 #define CONFIG_PHYLIB
 121 #define CONFIG_PHY_ATHEROS
 122
 123 /* Framebuffer */
 124 #define CONFIG_VIDEO
 125 #ifdef CONFIG_VIDEO
 126 #define CONFIG_VIDEO_IPUV3
 127 #define CONFIG_IPUV3_CLK                260000000
 128 #define CONFIG_CFB_CONSOLE
 129 #define CONFIG_CFB_CONSOLE_ANSI
 130 #define CONFIG_VIDEO_SW_CURSOR
 131 #define CONFIG_VGA_AS_SINGLE_DEVICE
 132 #define CONFIG_VIDEO_BMP_RLE8
 133 #define CONFIG_IMX_HDMI
 134 #define CONFIG_IMX_VIDEO_SKIP
 135 #define CONFIG_CMD_HDMIDETECT
 136 #endif
 137
 138 /* PCI */
 139 #define CONFIG_CMD_PCI
 140 #ifdef CONFIG_CMD_PCI
 141 #define CONFIG_PCI
 142 #define CONFIG_PCI_PNP
 143 #define CONFIG_PCI_SCAN_SHOW
 144 #define CONFIG_PCIE_IMX
 145 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
 146 #endif
 147
 148 /* SATA */
 149 #define CONFIG_CMD_SATA
 150 #ifdef CONFIG_CMD_SATA
 151 #define CONFIG_DWC_AHSATA
 152 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 153 #define CONFIG_DWC_AHSATA_PORT_ID       0
 154 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 155 #define CONFIG_LBA48
 156 #define CONFIG_LIBATA
 157 #endif
 158
 159 /* USB */
 160 #define CONFIG_CMD_USB
 161 #ifdef CONFIG_CMD_USB
 162 #define CONFIG_USB_EHCI
 163 #define CONFIG_USB_EHCI_MX6
 164 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 165 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 166 #define CONFIG_USB_STORAGE
 167 #define CONFIG_USB_KEYBOARD
 168 #ifdef CONFIG_USB_KEYBOARD
 169 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 170 #define CONFIG_SYS_STDIO_DEREGISTER
 171 #define CONFIG_PREBOOT "if hdmidet; then usb start; fi"
 172 #endif /* CONFIG_USB_KEYBOARD */
 173 #endif /* CONFIG_CMD_USB      */
 174
 175 /* RTC */
 176 #define CONFIG_CMD_DATE
 177 #ifdef CONFIG_CMD_DATE
 178 #define CONFIG_CMD_I2C
 179 #define CONFIG_RTC_DS1307
 180 #define CONFIG_SYS_RTC_BUS_NUM          2
 181 #endif
 182
 183 /* I2C */
 184 #define CONFIG_CMD_I2C
 185 #ifdef CONFIG_CMD_I2C
 186 #define CONFIG_SYS_I2C
 187 #define CONFIG_SYS_I2C_MXC
 188 #define CONFIG_SYS_I2C_SPEED            100000
 189 #define CONFIG_I2C_EDID
 190 #endif
 191
 192 /* Fuses */
 193 #define CONFIG_CMD_FUSE
 194 #ifdef CONFIG_CMD_FUSE
 195 #define CONFIG_MXC_OCOTP
 196 #endif
 197
 198 #ifndef CONFIG_SYS_DCACHE_OFF
 199 #define CONFIG_CMD_CACHE
 200 #endif
 201
 202 /* Flash and environment organization */
 203 #define CONFIG_SYS_NO_FLASH
 204
 205 #define CONFIG_ENV_IS_IN_MMC
 206 #define CONFIG_SYS_MMC_ENV_DEV          2
 207 #define CONFIG_SYS_MMC_ENV_PART         1
 208 #define CONFIG_ENV_SIZE                 (8 * 1024)
 209 #define CONFIG_ENV_OFFSET               (384 * 1024)
 210 #define CONFIG_ENV_OVERWRITE
 211
 212 #define CONFIG_EXTRA_ENV_SETTINGS \
 213         "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
 214         "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
 215                         "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
 216         "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
 217         "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
 218                         "${bootargs_mmc3}\0" \
 219         "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
 220                         "rdinit=/sbin/init enable_wait_mode=off\0" \
 221         "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
 222                         "mmc read 0x10800000 0x800 0x4000; bootm\0" \
 223         "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
 224         "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
 225                         "run bootargs_upd; " \
 226                         "bootm 0x10800000 0x10d00000\0" \
 227         "console=ttymxc0\0" \
 228         "fan=gpio set 92\0" \
 229         "stdin=serial,usbkbd\0" \
 230         "stdout=serial,vga\0" \
 231         "stderr=serial,vga\0"
 232
 233 #define CONFIG_BOOTCOMMAND \
 234         "mmc rescan; " \
 235         "if run bootcmd_up1; then " \
 236                 "run bootcmd_up2; " \
 237         "else " \
 238                 "run bootcmd_mmc; " \
 239         "fi"
 240
 241 #endif                         /* __TBS2910_CONFIG_H * */