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1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  * Heungjun Kim <riverful.kim@samsung.com>
4  *
5  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14  * High Level Configuration Options
15  * (easy to change)
16  */
17 #define CONFIG_SAMSUNG          /* in a SAMSUNG core */
18 #define CONFIG_S5P              /* which is in a S5P Family */
19 #define CONFIG_EXYNOS4          /* which is in a EXYNOS4XXX */
20 #define CONFIG_EXYNOS4210       /* which is in a EXYNOS4210 */
21 #define CONFIG_TRATS            /* working with TRATS */
22 #define CONFIG_TIZEN            /* TIZEN lib */
23
24 #include <asm/arch/cpu.h>       /* get chip and board defs */
25
26 #define CONFIG_ARCH_CPU_INIT
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
29
30 #define CONFIG_SYS_L2CACHE_OFF
31 #ifndef CONFIG_SYS_L2CACHE_OFF
32 #define CONFIG_SYS_L2_PL310
33 #define CONFIG_SYS_PL310_BASE   0x10502000
34 #endif
35
36 #define CONFIG_SYS_SDRAM_BASE           0x40000000
37 #define CONFIG_SYS_TEXT_BASE            0x63300000
38
39 /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
40 #define CONFIG_SYS_CLK_FREQ_C210        24000000
41 #define CONFIG_SYS_CLK_FREQ             CONFIG_SYS_CLK_FREQ_C210
42
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_CMDLINE_TAG
45 #define CONFIG_REVISION_TAG
46 #define CONFIG_CMDLINE_EDITING
47 #define CONFIG_SKIP_LOWLEVEL_INIT
48 #define CONFIG_BOARD_EARLY_INIT_F
49
50 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */
51 #define MACH_TYPE_TRATS                 3928
52 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS
53
54 #include <asm/sizes.h>
55 /* Size of malloc() pool */
56 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (80 * SZ_1M))
57
58 /* select serial console configuration */
59 #define CONFIG_SERIAL2                  /* use SERIAL 2 */
60 #define CONFIG_BAUDRATE                 115200
61
62 /* MMC */
63 #define CONFIG_GENERIC_MMC
64 #define CONFIG_MMC
65 #define CONFIG_S5P_SDHCI
66 #define CONFIG_SDHCI
67 #define CONFIG_MMC_SDMA
68
69 /* PWM */
70 #define CONFIG_PWM
71
72 /* It should define before config_cmd_default.h */
73 #define CONFIG_SYS_NO_FLASH
74
75 /* Command definition */
76 #include <config_cmd_default.h>
77
78 #undef CONFIG_CMD_FPGA
79 #undef CONFIG_CMD_MISC
80 #undef CONFIG_CMD_NET
81 #undef CONFIG_CMD_NFS
82 #undef CONFIG_CMD_XIMG
83 #undef CONFIG_CMD_CACHE
84 #undef CONFIG_CMD_ONENAND
85 #undef CONFIG_CMD_MTDPARTS
86 #define CONFIG_CMD_MMC
87 #define CONFIG_CMD_DFU
88 #define CONFIG_CMD_GPT
89 #define CONFIG_CMD_SETEXPR
90
91 /* FAT */
92 #define CONFIG_CMD_FAT
93 #define CONFIG_FAT_WRITE
94
95 /* USB Composite download gadget - g_dnl */
96 #define CONFIG_USBDOWNLOAD_GADGET
97
98 /* TIZEN THOR downloader support */
99 #define CONFIG_CMD_THOR_DOWNLOAD
100 #define CONFIG_THOR_FUNCTION
101
102 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
103 #define DFU_DEFAULT_POLL_TIMEOUT 300
104 #define CONFIG_DFU_FUNCTION
105 #define CONFIG_DFU_MMC
106
107 /* USB Samsung's IDs */
108 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
109 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
110 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
111 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
112 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
113
114 #define CONFIG_BOOTDELAY                1
115 #define CONFIG_ZERO_BOOTDELAY_CHECK
116 #define CONFIG_BOOTARGS                 "Please use defined boot"
117 #define CONFIG_BOOTCOMMAND              "run mmcboot"
118
119 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
120 #define CONFIG_BOOTBLOCK                "10"
121 #define CONFIG_ENV_COMMON_BOOT          "${console} ${meminfo}"
122
123 /* Tizen - partitions definitions */
124 #define PARTS_CSA               "csa-mmc"
125 #define PARTS_BOOTLOADER        "u-boot"
126 #define PARTS_BOOT              "boot"
127 #define PARTS_ROOT              "platform"
128 #define PARTS_DATA              "data"
129 #define PARTS_CSC               "csc"
130 #define PARTS_UMS               "ums"
131
132 #define PARTS_DEFAULT \
133         "uuid_disk=${uuid_gpt_disk};" \
134         "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
135         "name="PARTS_BOOTLOADER",size=60MiB," \
136                 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
137         "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
138         "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
139         "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
140         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
141         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
142
143 #define CONFIG_DFU_ALT \
144         "u-boot mmc 80 400;" \
145         "uImage ext4 0 2;" \
146         "exynos4210-trats.dtb ext4 0 2;" \
147         ""PARTS_BOOT" part 0 2;" \
148         ""PARTS_ROOT" part 0 5;" \
149         ""PARTS_DATA" part 0 6;" \
150         ""PARTS_UMS" part 0 7;" \
151         "params.bin mmc 0x38 0x8\0"
152
153 #define CONFIG_ENV_OVERWRITE
154 #define CONFIG_SYS_CONSOLE_INFO_QUIET
155 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
156
157 #define CONFIG_ENV_VARS_UBOOT_CONFIG
158 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
159
160 #define CONFIG_EXTRA_ENV_SETTINGS \
161         "bootk=" \
162                 "run loaduimage;" \
163                 "if run loaddtb; then " \
164                         "bootm 0x40007FC0 - ${fdtaddr};" \
165                 "fi;" \
166                 "bootm 0x40007FC0;\0" \
167         "updatemmc=" \
168                 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
169                 "mmc boot 0 1 1 0\0" \
170         "updatebackup=" \
171                 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
172                 "mmc boot 0 1 1 0\0" \
173         "updatebootb=" \
174                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
175         "lpj=lpj=3981312\0" \
176         "nfsboot=" \
177                 "setenv bootargs root=/dev/nfs rw " \
178                 "nfsroot=${nfsroot},nolock,tcp " \
179                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
180                 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
181                 "; run bootk\0" \
182         "ramfsboot=" \
183                 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
184                 "${console} ${meminfo} " \
185                 "initrd=0x43000000,8M ramdisk=8192\0" \
186         "mmcboot=" \
187                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
188                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
189                 "run bootk\0" \
190         "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
191         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
192         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
193         "verify=n\0" \
194         "rootfstype=ext4\0" \
195         "console=" CONFIG_DEFAULT_CONSOLE \
196         "meminfo=crashkernel=32M@0x50000000\0" \
197         "nfsroot=/nfsroot/arm\0" \
198         "bootblock=" CONFIG_BOOTBLOCK "\0" \
199         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
200         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
201                 "${fdtfile}\0" \
202         "mmcdev=0\0" \
203         "mmcbootpart=2\0" \
204         "mmcrootpart=5\0" \
205         "opts=always_resume=1\0" \
206         "partitions=" PARTS_DEFAULT \
207         "dfu_alt_info=" CONFIG_DFU_ALT \
208         "spladdr=0x40000100\0" \
209         "splsize=0x200\0" \
210         "splfile=falcon.bin\0" \
211         "spl_export=" \
212                    "setexpr spl_imgsize ${splsize} + 8 ;" \
213                    "setenv spl_imgsize 0x${spl_imgsize};" \
214                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
215                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
216                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
217                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
218                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
219                    "spl export atags 0x40007FC0;" \
220                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
221                    "mw.l ${spl_addr_tmp} ${splsize};" \
222                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
223                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
224                    "setenv spl_imgsize;" \
225                    "setenv spl_imgaddr;" \
226                    "setenv spl_addr_tmp;\0" \
227         "fdtaddr=40800000\0" \
228
229
230 /* Miscellaneous configurable options */
231 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
232 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
233 #define CONFIG_SYS_PROMPT               "TRATS # "
234 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
235 #define CONFIG_SYS_PBSIZE               384     /* Print Buffer Size */
236 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
237 /* Boot Argument Buffer Size */
238 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
239 /* memtest works on */
240 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
241 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5000000)
242 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
243
244 /* TRATS has 4 banks of DRAM */
245 #define CONFIG_NR_DRAM_BANKS    4
246 #define SDRAM_BANK_SIZE         (256UL << 20UL) /* 256 MB */
247 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE
248 #define PHYS_SDRAM_1_SIZE       SDRAM_BANK_SIZE
249 #define PHYS_SDRAM_2            (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
250 #define PHYS_SDRAM_2_SIZE       SDRAM_BANK_SIZE
251 #define PHYS_SDRAM_3            (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
252 #define PHYS_SDRAM_3_SIZE       SDRAM_BANK_SIZE
253 #define PHYS_SDRAM_4            (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
254 #define PHYS_SDRAM_4_SIZE       SDRAM_BANK_SIZE
255
256 #define CONFIG_SYS_MEM_TOP_HIDE         (1 << 20)       /* ram console */
257
258 #define CONFIG_SYS_MONITOR_BASE         0x00000000
259 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
260
261 #define CONFIG_ENV_IS_IN_MMC
262 #define CONFIG_SYS_MMC_ENV_DEV          0
263 #define CONFIG_ENV_SIZE                 4096
264 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
265
266 #define CONFIG_DOS_PARTITION
267 #define CONFIG_EFI_PARTITION
268
269 /* EXT4 */
270 #define CONFIG_CMD_EXT4
271 #define CONFIG_CMD_EXT4_WRITE
272 /* Falcon mode definitions */
273 #define CONFIG_CMD_SPL
274 #define CONFIG_SYS_SPL_ARGS_ADDR        PHYS_SDRAM_1 + 0x100
275
276 /* GPT */
277 #define CONFIG_EFI_PARTITION
278 #define CONFIG_PARTITION_UUIDS
279
280 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
281 #define CONFIG_SYS_CACHELINE_SIZE       32
282
283 #define CONFIG_SYS_I2C
284 #define CONFIG_SYS_I2C_S3C24X0
285 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000
286 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0xFE
287 #define CONFIG_MAX_I2C_NUM              8
288 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
289 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
290 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x7F
291 #define CONFIG_SOFT_I2C_READ_REPEATED_START
292 #define CONFIG_SYS_I2C_INIT_BOARD
293
294 #include <asm/arch/gpio.h>
295
296 /* I2C FG */
297 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
298 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
299
300 #define CONFIG_POWER
301 #define CONFIG_POWER_I2C
302 #define CONFIG_POWER_MAX8997
303
304 #define CONFIG_POWER_FG
305 #define CONFIG_POWER_FG_MAX17042
306 #define CONFIG_POWER_MUIC
307 #define CONFIG_POWER_MUIC_MAX8997
308 #define CONFIG_POWER_BATTERY
309 #define CONFIG_POWER_BATTERY_TRATS
310 #define CONFIG_USB_GADGET
311 #define CONFIG_USB_GADGET_S3C_UDC_OTG
312 #define CONFIG_USB_GADGET_DUALSPEED
313 #define CONFIG_USB_GADGET_VBUS_DRAW     2
314 #define CONFIG_USB_CABLE_CHECK
315
316 /* Common misc for Samsung */
317 #define CONFIG_MISC_COMMON
318
319 #define CONFIG_MISC_INIT_R
320
321 /* Download menu - Samsung common */
322 #define CONFIG_LCD_MENU
323 #define CONFIG_LCD_MENU_BOARD
324
325 /* Download menu - definitions for check keys */
326 #ifndef __ASSEMBLY__
327 #include <power/max8997_pmic.h>
328
329 #define KEY_PWR_PMIC_NAME               "MAX8997_PMIC"
330 #define KEY_PWR_STATUS_REG              MAX8997_REG_STATUS1
331 #define KEY_PWR_STATUS_MASK             (1 << 0)
332 #define KEY_PWR_INTERRUPT_REG           MAX8997_REG_INT1
333 #define KEY_PWR_INTERRUPT_MASK          (1 << 0)
334
335 #define KEY_VOL_UP_GPIO                 exynos4_gpio_get(2, x2, 0)
336 #define KEY_VOL_DOWN_GPIO               exynos4_gpio_get(2, x2, 1)
337 #endif /* __ASSEMBLY__ */
338
339 /* LCD console */
340 #define LCD_BPP                 LCD_COLOR16
341 #define CONFIG_SYS_WHITE_ON_BLACK
342
343 /* LCD */
344 #define CONFIG_EXYNOS_FB
345 #define CONFIG_LCD
346 #define CONFIG_CMD_BMP
347 #define CONFIG_BMP_16BPP
348 #define CONFIG_FB_ADDR          0x52504000
349 #define CONFIG_S6E8AX0
350 #define CONFIG_EXYNOS_MIPI_DSIM
351 #define CONFIG_VIDEO_BMP_GZIP
352 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
353
354 #define CONFIG_CMD_USB_MASS_STORAGE
355 #define CONFIG_USB_GADGET_MASS_STORAGE
356
357 /* Pass open firmware flat tree */
358 #define CONFIG_OF_LIBFDT    1
359
360 #endif  /* __CONFIG_H */