2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 #ifndef __CONFIGS_TX28_H
14 #define __CONFIGS_TX28_H
16 #include <asm/sizes.h>
17 #include <asm/arch/regs-base.h>
20 * Ka-Ro TX28 board - SoC configuration
22 #define CONFIG_MX28 /* i.MX28 SoC */
23 #define CONFIG_MXS_GPIO /* GPIO control */
24 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
26 #define PHYS_SDRAM_1_SIZE SZ_64M
27 #define TX28_MOD_SUFFIX "1"
29 #define PHYS_SDRAM_1_SIZE SZ_128M
30 #define CONFIG_SYS_SPL_FIXED_BATT_SUPPLY
31 #define TX28_MOD_SUFFIX "0"
34 #ifndef CONFIG_SPL_BUILD
35 #define CONFIG_SKIP_LOWLEVEL_INIT
36 #define CONFIG_SHOW_ACTIVITY
37 #define CONFIG_ARCH_CPU_INIT
38 #define CONFIG_DISPLAY_CPUINFO
39 #define CONFIG_BOARD_LATE_INIT
40 #define CONFIG_BOARD_EARLY_INIT_F
42 /* LCD Logo and Splash screen support */
45 #define CONFIG_SPLASH_SCREEN
46 #define CONFIG_SPLASH_SCREEN_ALIGN
47 #define CONFIG_VIDEO_MXS
48 #define CONFIG_LCD_LOGO
49 #define LCD_BPP LCD_COLOR24
50 #define CONFIG_CMD_BMP
51 #define CONFIG_VIDEO_BMP_RLE8
52 #endif /* CONFIG_LCD */
53 #endif /* CONFIG_SPL_BUILD */
56 * Memory configuration options
58 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of SDRAM */
59 #define PHYS_SDRAM_1 0x40000000 /* SDRAM Bank #1 */
60 #define CONFIG_STACKSIZE SZ_64K
61 #define CONFIG_SYS_MALLOC_LEN SZ_4M
62 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
63 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
66 * U-Boot general configurations
68 #define CONFIG_SYS_LONGHELP
69 #define CONFIG_SYS_PROMPT "TX28 U-Boot > "
70 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
71 #define CONFIG_SYS_PBSIZE \
72 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
73 /* Print buffer size */
74 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
75 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
76 /* Boot argument buffer size */
77 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
78 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
79 #define CONFIG_CMDLINE_EDITING /* Command history etc */
81 #define CONFIG_SYS_64BIT_VSPRINTF
82 #define CONFIG_SYS_NO_FLASH
85 * Flattened Device Tree (FDT) support
87 #define CONFIG_OF_LIBFDT
88 #ifdef CONFIG_OF_LIBFDT
89 #define CONFIG_FDT_FIXUP_PARTITIONS
90 #define CONFIG_OF_EMBED
91 #define CONFIG_OF_BOARD_SETUP
92 #define CONFIG_DEFAULT_DEVICE_TREE tx28
93 #define CONFIG_ARCH_DEVICE_TREE mx28
94 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
100 #define xstr(s) str(s)
102 #define __pfx(x, s) (x##s)
103 #define _pfx(x, s) __pfx(x, s)
105 #define CONFIG_CMDLINE_TAG
106 #define CONFIG_SETUP_MEMORY_TAGS
107 #define CONFIG_BOOTDELAY 3
108 #define CONFIG_ZERO_BOOTDELAY_CHECK
109 #define CONFIG_SYS_AUTOLOAD "no"
110 #define CONFIG_BOOTFILE "uImage"
111 #define CONFIG_BOOTARGS "console=ttyAMA0,115200 ro debug panic=1"
112 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
113 #define CONFIG_LOADADDR 43000000
114 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
115 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
120 #define CONFIG_EXTRA_ENV_SETTINGS \
122 "baseboard=stk5-v3\0" \
123 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
124 " root=/dev/mmcblk0p3 rootwait\0" \
125 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
126 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
127 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
128 " root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"\
129 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
130 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
131 "bootcmd_nand=set autostart no;run bootargs_nand;" \
132 "nboot linux;run bootm_cmd\0" \
133 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
135 "bootm_cmd=fdt boardsetup;bootm ${loadaddr} - ${fdtaddr}\0" \
136 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
137 " mxsfb.mode=${video_mode} ${append_bootargs}\0" \
138 "fdtaddr=41000000\0" \
139 "mtdids=" MTDIDS_DEFAULT "\0" \
140 "mtdparts=" MTDPARTS_DEFAULT "\0" \
141 "nfsroot=/tftpboot/rootfs\0" \
142 "otg_mode=device\0" \
143 "touchpanel=tsc2007\0" \
146 #define MTD_NAME "gpmi-nand"
147 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
152 #include <config_cmd_default.h>
153 #define CONFIG_CMD_CACHE
154 #define CONFIG_CMD_MMC
155 #define CONFIG_CMD_NAND
156 #define CONFIG_CMD_MTDPARTS
157 #define CONFIG_CMD_BOOTCE
158 #define CONFIG_CMD_TIME
163 #define CONFIG_PL011_SERIAL
164 #define CONFIG_PL011_CLOCK 24000000
165 #define CONFIG_PL01x_PORTS { \
166 (void *)MXS_UARTDBG_BASE, \
168 #define CONFIG_CONS_INDEX 0 /* do not change! */
169 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
170 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
171 #define CONFIG_SYS_CONSOLE_INFO_QUIET
176 #define CONFIG_FEC_MXC
177 #ifdef CONFIG_FEC_MXC
178 /* This is required for the FEC driver to work with cache enabled */
179 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
181 #ifndef CONFIG_TX28_S
182 #define CONFIG_FEC_MXC_MULTI
184 #define IMX_FEC_BASE MXS_ENET0_BASE
185 #define CONFIG_FEC_MXC_PHYADDR 0x00
189 #define CONFIG_FEC_XCV_TYPE RMII
190 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
191 #define CONFIG_NET_MULTI
192 #define CONFIG_CMD_MII
193 #define CONFIG_CMD_DHCP
194 #define CONFIG_CMD_PING
195 /* Add for working with "strict" DHCP server */
196 #define CONFIG_BOOTP_SUBNETMASK
197 #define CONFIG_BOOTP_GATEWAY
198 #define CONFIG_BOOTP_DNS
204 #ifdef CONFIG_CMD_NAND
205 #define CONFIG_MTD_DEVICE
206 #define CONFIG_ENV_IS_IN_NAND
207 #define CONFIG_NAND_MXS
208 #define CONFIG_APBH_DMA
209 #define CONFIG_APBH_DMA_BURST
210 #define CONFIG_APBH_DMA_BURST8
211 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
212 #define CONFIG_CMD_NAND_TRIMFFS
213 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
214 #define CONFIG_SYS_MAX_FLASH_SECT 1024
215 #define CONFIG_SYS_MAX_FLASH_BANKS 1
216 #define CONFIG_SYS_NAND_MAX_CHIPS 1
217 #define CONFIG_SYS_MAX_NAND_DEVICE 1
218 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
219 #define CONFIG_SYS_NAND_USE_FLASH_BBT
220 #ifdef CONFIG_ENV_IS_IN_NAND
221 #define CONFIG_ENV_OVERWRITE
222 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
223 #define CONFIG_ENV_SIZE SZ_128K
224 #define CONFIG_ENV_RANGE 0x60000
225 #endif /* CONFIG_ENV_IS_IN_NAND */
226 #define CONFIG_SYS_NAND_BASE 0x00000000
227 #define CONFIG_CMD_ROMUPDATE
228 #endif /* CONFIG_CMD_NAND */
233 #ifdef CONFIG_CMD_MMC
234 #ifndef CONFIG_ENV_IS_IN_NAND
235 #define CONFIG_ENV_IS_IN_MMC
238 #define CONFIG_GENERIC_MMC
239 #define CONFIG_MXS_MMC
240 #define CONFIG_BOUNCE_BUFFER
242 #define CONFIG_DOS_PARTITION
243 #define CONFIG_CMD_FAT
244 #define CONFIG_CMD_EXT2
247 * Environments on MMC
249 #ifdef CONFIG_ENV_IS_IN_MMC
250 #define CONFIG_SYS_MMC_ENV_DEV 0
251 #define CONFIG_ENV_OVERWRITE
252 /* Associated with the MMC layout defined in mmcops.c */
253 #define CONFIG_ENV_OFFSET SZ_1K
254 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
255 #define CONFIG_DYNAMIC_MMC_DEVNO
256 #endif /* CONFIG_ENV_IS_IN_MMC */
257 #endif /* CONFIG_CMD_MMC */
259 #ifdef CONFIG_ENV_OFFSET_REDUND
260 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
261 "1m@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) "(u-boot)," \
262 xstr(CONFIG_ENV_RANGE) \
264 xstr(CONFIG_ENV_RANGE) \
265 "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
267 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
268 "1m@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) "(u-boot)," \
269 xstr(CONFIG_ENV_RANGE) \
270 "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
273 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
274 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
275 GENERATED_GBL_DATA_SIZE)
277 /* Defines for SPL */
279 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
280 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
281 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
282 #define CONFIG_SPL_LIBCOMMON_SUPPORT
283 #define CONFIG_SPL_LIBGENERIC_SUPPORT
284 #define CONFIG_SPL_SERIAL_SUPPORT
285 #define CONFIG_SPL_GPIO_SUPPORT
286 #define CONFIG_SYS_SPL_VDDD_VAL 1500
287 #define CONFIG_SYS_SPL_BATT_BO_LEVEL 2800
288 #define CONFIG_SYS_SPL_VDDMEM_VAL 0 /* VDDMEM is not utilized on TX28 */
290 #endif /* __CONFIGS_TX28_H */