4 * Copyright (C) 2012 Lothar Waßmann <LW@KARO-electronics.de>
7 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
23 #include <asm/sizes.h>
26 * Ka-Ro TX48 board - SoC configuration
29 #define CONFIG_AM33XX_GPIO
30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
31 #define CONFIG_SHOW_ACTIVITY
32 #define CONFIG_DISPLAY_CPUINFO
33 #define CONFIG_DISPLAY_BOARDINFO
34 #define CONFIG_BOARD_LATE_INIT
36 /* LCD Logo and Splash screen support */
39 #define CONFIG_SPLASH_SCREEN
40 #define CONFIG_SPLASH_SCREEN_ALIGN
41 #define CONFIG_VIDEO_DA8XX
42 #define DAVINCI_LCD_CNTL_BASE 0x4830e000
43 #define CONFIG_LCD_LOGO
44 #define LCD_BPP LCD_COLOR24
45 #define CONFIG_CMD_BMP
46 #define CONFIG_VIDEO_BMP_RLE8
47 #endif /* CONFIG_LCD */
50 #define V_OSCK 24000000 /* Clock output from T2 */
54 * Memory configuration options
56 #define CONFIG_SYS_SDRAM_DDR3
57 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of SDRAM */
58 #define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */
59 #define PHYS_SDRAM_1_SIZE SZ_256M
60 #define CONFIG_MAX_RAM_BANK_SIZE SZ_1G
62 #define CONFIG_STACKSIZE SZ_64K
63 #define CONFIG_SYS_MALLOC_LEN SZ_4M
65 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + SZ_64M)
66 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_8M)
69 * U-Boot general configurations
71 #define CONFIG_SYS_LONGHELP
72 #define CONFIG_SYS_PROMPT "TX48 U-Boot > "
73 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
74 #define CONFIG_SYS_PBSIZE \
75 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
76 /* Print buffer size */
77 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
78 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
79 /* Boot argument buffer size */
80 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
81 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
82 #define CONFIG_CMDLINE_EDITING /* Command history etc */
84 #define CONFIG_SYS_64BIT_VSPRINTF
85 #define CONFIG_SYS_NO_FLASH
88 * Flattened Device Tree (FDT) support
90 #ifdef CONFIG_OF_LIBFDT /* set via cmdline parameter thru boards.cfg */
91 #define CONFIG_FDT_FIXUP_PARTITIONS
92 #define CONFIG_OF_EMBED
93 #define CONFIG_OF_BOARD_SETUP
94 #define CONFIG_DEFAULT_DEVICE_TREE tx48
95 #define CONFIG_ARCH_DEVICE_TREE am33xx
96 #define CONFIG_MACH_TYPE (-1)
98 #ifndef MACH_TYPE_TIAM335EVM
99 #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
101 #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
107 #define xstr(s) str(s)
109 #define __pfx(x, s) (x##s)
110 #define _pfx(x, s) __pfx(x, s)
112 #define CONFIG_CMDLINE_TAG
113 #define CONFIG_SETUP_MEMORY_TAGS
114 #define CONFIG_BOOTDELAY 3
115 #define CONFIG_ZERO_BOOTDELAY_CHECK
116 #define CONFIG_SYS_AUTOLOAD "no"
117 #define CONFIG_BOOTFILE "uImage"
118 #define CONFIG_BOOTARGS "console=ttymO0,115200 ro debug panic=1"
119 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
120 #define CONFIG_LOADADDR 83000000
121 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
122 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
123 #define CONFIG_HW_WATCHDOG
128 #ifdef CONFIG_OF_LIBFDT
129 #define TX48_BOOTM_CMD \
130 "bootm_cmd=fdt boardsetup;bootm ${loadaddr} - ${fdtaddr}\0"
132 #define TX48_BOOTM_CMD \
136 #define CONFIG_EXTRA_ENV_SETTINGS \
138 "baseboard=stk5-v3\0" \
139 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
140 " root=/dev/mmcblk0p2 rootwait\0" \
141 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
142 " root=/dev/mtdblock4 rootfstype=jffs2\0" \
143 "nfsroot=/tftpboot/rootfs\0" \
144 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
145 " root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"\
146 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
147 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
148 "bootcmd_nand=set autostart no;run bootargs_nand;" \
149 "nboot linux;run bootm_cmd\0" \
150 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
153 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
154 " ${mtdparts} video=${video_mode} ${append_bootargs}\0" \
156 "fdtaddr=80004000\0" \
157 "mtdids=" MTDIDS_DEFAULT "\0" \
158 "mtdparts=" MTDPARTS_DEFAULT "\0" \
159 "otg_mode=device\0" \
160 "touchpanel=tsc2007\0" \
161 "video_mode=640x480MR-24@60\0"
163 #define MTD_NAME "omap2-nand.0"
164 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
169 #include <config_cmd_default.h>
170 #define CONFIG_CMD_CACHE
171 #define CONFIG_CMD_MMC
172 #define CONFIG_CMD_NAND
173 #define CONFIG_CMD_MTDPARTS
174 #define CONFIG_CMD_BOOTCE
179 #define CONFIG_SYS_NS16550
180 #define CONFIG_SYS_NS16550_SERIAL
181 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
182 #define CONFIG_SYS_NS16550_CLK 48000000
183 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
184 #define CONFIG_CONS_INDEX 1
185 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
186 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
187 #define CONFIG_SYS_CONSOLE_INFO_QUIET
192 #ifdef CONFIG_CMD_NET
193 #define CONFIG_DRIVER_TI_CPSW
195 #define CONFIG_CMD_MII
196 #define CONFIG_CMD_DHCP
197 #define CONFIG_CMD_PING
198 /* Add for working with "strict" DHCP server */
199 #define CONFIG_BOOTP_SUBNETMASK
200 #define CONFIG_BOOTP_GATEWAY
201 #define CONFIG_BOOTP_DNS
202 #define CONFIG_BOOTP_DNS2
204 #define CONFIG_NET_MULTI
205 #define CONFIG_PHY_GIGE
211 #ifdef CONFIG_CMD_NAND
212 #define CONFIG_MTD_DEVICE
213 #define CONFIG_ENV_IS_IN_NAND
214 #define CONFIG_NAND_AM33XX
215 #define GPMC_NAND_ECC_LP_x16_LAYOUT
216 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
217 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
218 #define CONFIG_SYS_NAND_OOBSIZE 64
219 #define CONFIG_SYS_NAND_ECCSIZE 512
220 #define CONFIG_SYS_NAND_ECCBYTES 14
221 #define CONFIG_SYS_NAND_ECCSTEPS 4
223 #define CONFIG_SYS_MAX_FLASH_SECT 1024
224 #define CONFIG_SYS_MAX_FLASH_BANKS 1
225 #define CONFIG_SYS_NAND_MAX_CHIPS 1
226 #define CONFIG_SYS_MAX_NAND_DEVICE 1
227 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
228 #define CONFIG_SYS_NAND_USE_FLASH_BBT
229 #ifdef CONFIG_ENV_IS_IN_NAND
230 #define CONFIG_ENV_OVERWRITE
231 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
232 #define CONFIG_ENV_SIZE 0x20000 /* 128 KiB */
234 #define CONFIG_ENV_OFFSET_REDUND 0x20000
235 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
238 #define CONFIG_SYS_NAND_BASE 0x08000000 /* must be defined but value is irrelevant */
239 #define NAND_BASE CONFIG_SYS_NAND_BASE
240 #endif /* CONFIG_CMD_NAND */
245 #ifdef CONFIG_CMD_MMC
246 #ifndef CONFIG_ENV_IS_IN_NAND
247 #define CONFIG_ENV_IS_IN_MMC
250 #define CONFIG_GENERIC_MMC
251 #define CONFIG_OMAP_HSMMC
252 #define CONFIG_OMAP_MMC_DEV_1
254 #define CONFIG_BOOT_PARTITION_ACCESS
255 #define CONFIG_DOS_PARTITION
256 #define CONFIG_CMD_FAT
257 #define CONFIG_CMD_EXT2
260 * Environments on MMC
262 #ifdef CONFIG_ENV_IS_IN_MMC
263 #define CONFIG_SYS_MMC_ENV_DEV 0
264 #define CONFIG_ENV_OVERWRITE
265 /* Associated with the MMC layout defined in mmcops.c */
266 #define CONFIG_ENV_OFFSET 0x400 /* 1 KB */
267 #define CONFIG_ENV_SIZE (0x20000 - 0x400) /* 127 KB */
268 #define CONFIG_DYNAMIC_MMC_DEVNO
269 #endif /* CONFIG_ENV_IS_IN_MMC */
270 #endif /* CONFIG_CMD_MMC */
272 #ifdef CONFIG_ENV_OFFSET_REDUND
273 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
274 "128k(u-boot-spl)," \
276 xstr(CONFIG_ENV_SIZE) \
278 xstr(CONFIG_ENV_SIZE) \
279 "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
281 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
282 "128k(u-boot-spl)," \
284 xstr(CONFIG_ENV_SIZE) \
285 "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
288 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
289 #define SRAM0_SIZE SZ_64K
290 #define CONFIG_SYS_INIT_SP_ADDR 0x4030B7FC
291 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
293 /* Platform/Board specific defs */
294 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
295 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
297 /* Defines for SPL */
299 #define CONFIG_SPL_BOARD_INIT
300 #define CONFIG_SPL_TEXT_BASE 0x402F0400
301 #define CONFIG_SPL_MAX_SIZE (46 * SZ_1K)
302 #define CONFIG_SPL_GPIO_SUPPORT
303 #ifdef CONFIG_NAND_AM33XX
304 #define CONFIG_SPL_NAND_SUPPORT
305 #define CONFIG_SPL_NAND_SIMPLE
306 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
307 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
308 CONFIG_SYS_NAND_PAGE_SIZE)
309 #define CONFIG_SYS_NAND_BLOCK_SIZE SZ_128K
310 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
311 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
312 10, 11, 12, 13, 14, 15, 16, 17, \
313 18, 19, 20, 21, 22, 23, 24, 25, \
314 26, 27, 28, 29, 30, 31, 32, 33, \
315 34, 35, 36, 37, 38, 39, 40, 41, \
316 42, 43, 44, 45, 46, 47, 48, 49, \
317 50, 51, 52, 53, 54, 55, 56, 57, }
320 #define CONFIG_SPL_BSS_START_ADDR PHYS_SDRAM_1
321 #define CONFIG_SPL_BSS_MAX_SIZE SZ_512K
323 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
324 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS (SZ_512K / 512)
325 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
326 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-tx48.img"
327 #define CONFIG_SPL_MMC_SUPPORT
328 #define CONFIG_SPL_FAT_SUPPORT
329 #define CONFIG_SPL_I2C_SUPPORT
331 #define CONFIG_SPL_LIBCOMMON_SUPPORT
332 #define CONFIG_SPL_LIBDISK_SUPPORT
333 #define CONFIG_SPL_LIBGENERIC_SUPPORT
334 #define CONFIG_SPL_SERIAL_SUPPORT
335 #define CONFIG_SPL_YMODEM_SUPPORT
336 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
339 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
340 * 64 bytes before this address should be set aside for u-boot.img's
341 * header. That is 0x800FFFC0--0x80100000 should not be used for any
344 #define CONFIG_SYS_TEXT_BASE 0x80800000
345 #define CONFIG_SYS_SPL_MALLOC_START (PHYS_SDRAM_1 + SZ_2M + SZ_32K)
346 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_1M
348 /* Since SPL did pll and ddr initialization for us,
349 * we don't need to do it twice.
351 #ifndef CONFIG_SPL_BUILD
352 #define CONFIG_SKIP_LOWLEVEL_INIT
355 #endif /* __TX48_H */