include/configs/tx48.h

   1 /*
   2  * tx48.h
   3  *
   4  * Copyright (C) 2012 Lothar Waßmann <LW@KARO-electronics.de>
   5  *
   6  * based on: am335x_evm
   7  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   8  *
   9  * SPDX-License-Identifier:      GPL-2.0
  10  *
  11  */
  12
  13 #ifndef __CONFIGS_TX48_H
  14 #define __CONFIGS_TX48_H
  15
  16 #include <asm/sizes.h>
  17
  18 /*
  19  * Ka-Ro TX48 board - SoC configuration
  20  */
  21 #define CONFIG_OMAP
  22 #define CONFIG_AM33XX
  23 #define CONFIG_AM33XX_GPIO
  24 #define CONFIG_SYS_HZ                   1000            /* Ticks per second */
  25
  26 #ifndef CONFIG_SPL_BUILD
  27 #define CONFIG_SKIP_LOWLEVEL_INIT
  28 #define CONFIG_SHOW_ACTIVITY
  29 #define CONFIG_DISPLAY_CPUINFO
  30 #define CONFIG_DISPLAY_BOARDINFO
  31 #define CONFIG_BOARD_LATE_INIT
  32
  33 /* LCD Logo and Splash screen support */
  34 #define CONFIG_LCD
  35 #ifdef CONFIG_LCD
  36 #define CONFIG_SPLASH_SCREEN
  37 #define CONFIG_SPLASH_SCREEN_ALIGN
  38 #define CONFIG_VIDEO_DA8XX
  39 #define DAVINCI_LCD_CNTL_BASE           0x4830e000
  40 #define CONFIG_LCD_LOGO
  41 #define LCD_BPP                         LCD_COLOR24
  42 #define CONFIG_CMD_BMP
  43 #define CONFIG_VIDEO_BMP_RLE8
  44 #endif /* CONFIG_LCD */
  45 #endif /* CONFIG_SPL_BUILD */
  46
  47 /* Clock Defines */
  48 #define V_OSCK                          24000000  /* Clock output from T2 */
  49 #define V_SCLK                          V_OSCK
  50
  51 /*
  52  * Memory configuration options
  53  */
  54 #define CONFIG_SYS_SDRAM_DDR3
  55 #define CONFIG_NR_DRAM_BANKS            1               /*  1 bank of SDRAM */
  56 #define PHYS_SDRAM_1                    0x80000000      /* SDRAM Bank #1 */
  57 #define CONFIG_MAX_RAM_BANK_SIZE        SZ_1G
  58
  59 #define CONFIG_STACKSIZE                SZ_64K
  60 #define CONFIG_SYS_MALLOC_LEN           SZ_4M
  61
  62 #define CONFIG_SYS_MEMTEST_START        (PHYS_SDRAM_1 + SZ_64M)
  63 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + SZ_8M)
  64
  65 #define CONFIG_SYS_CACHELINE_SIZE       64
  66
  67 /*
  68  * U-Boot general configurations
  69  */
  70 #define CONFIG_SYS_LONGHELP
  71 #define CONFIG_SYS_PROMPT               "TX48 U-Boot > "
  72 #define CONFIG_SYS_CBSIZE               2048            /* Console I/O buffer size */
  73 #define CONFIG_SYS_PBSIZE \
  74         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  75                                                 /* Print buffer size */
  76 #define CONFIG_SYS_MAXARGS              64      /* Max number of command args */
  77 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  78                                                 /* Boot argument buffer size */
  79 #define CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
  80 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
  81 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
  82
  83 #define CONFIG_SYS_64BIT_VSPRINTF
  84 #define CONFIG_SYS_NO_FLASH
  85
  86 /*
  87  * Flattened Device Tree (FDT) support
  88 */
  89 #ifdef CONFIG_OF_LIBFDT /* set via cmdline parameter thru boards.cfg */
  90 #define CONFIG_FDT_FIXUP_PARTITIONS
  91 #define CONFIG_OF_EMBED
  92 #define CONFIG_OF_BOARD_SETUP
  93 #define CONFIG_DEFAULT_DEVICE_TREE      tx48
  94 #define CONFIG_ARCH_DEVICE_TREE         am33xx
  95 #define CONFIG_MACH_TYPE                (-1)
  96 #define CONFIG_SYS_FDT_ADDR             (PHYS_SDRAM_1 + SZ_16M)
  97 #else
  98 #ifndef MACH_TYPE_TIAM335EVM
  99 #define MACH_TYPE_TIAM335EVM            3589     /* Until the next sync */
 100 #endif
 101 #define CONFIG_MACH_TYPE                MACH_TYPE_TIAM335EVM
 102 #endif
 103
 104 /*
 105  * Boot Linux
 106  */
 107 #define xstr(s) str(s)
 108 #define str(s)  #s
 109 #define __pfx(x, s)                     (x##s)
 110 #define _pfx(x, s)                      __pfx(x, s)
 111
 112 #define CONFIG_CMDLINE_TAG
 113 #define CONFIG_SETUP_MEMORY_TAGS
 114 #define CONFIG_BOOTDELAY                3
 115 #define CONFIG_ZERO_BOOTDELAY_CHECK
 116 #define CONFIG_SYS_AUTOLOAD             "no"
 117 #define CONFIG_BOOTFILE                 "uImage"
 118 #define CONFIG_BOOTARGS                 "console=ttyO0,115200 ro debug panic=1"
 119 #define CONFIG_BOOTCOMMAND              "run bootcmd_nand"
 120 #define CONFIG_LOADADDR                 83000000
 121 #define CONFIG_SYS_LOAD_ADDR            _pfx(0x, CONFIG_LOADADDR)
 122 #define CONFIG_U_BOOT_IMG_SIZE          SZ_1M
 123 #define CONFIG_HW_WATCHDOG
 124
 125 /*
 126  * Extra Environments
 127  */
 128 #ifdef CONFIG_OF_LIBFDT
 129 #define TX48_BOOTM_CMD                                                  \
 130         "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0"
 131 #define TX48_MTDPARTS_CMD ""
 132 #else
 133 #define TX48_BOOTM_CMD                                                  \
 134         "bootm_cmd=bootm\0"
 135 #define TX48_MTDPARTS_CMD " ${mtdparts}"
 136 #endif
 137
 138 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 139         "autostart=no\0"                                                \
 140         "baseboard=stk5-v3\0"                                           \
 141         "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}"    \
 142         " root=/dev/mmcblk0p2 rootwait\0"                               \
 143         "bootargs_nand=run default_bootargs;set bootargs ${bootargs}"   \
 144         " root=/dev/mtdblock4 rootfstype=jffs2\0"                       \
 145         "nfsroot=/tftpboot/rootfs\0"                                    \
 146         "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}"    \
 147         " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
 148         "bootcmd_mmc=set autostart no;run bootargs_mmc;"                \
 149         " fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0"             \
 150         "bootcmd_nand=set autostart no;run bootargs_nand;"              \
 151         " nboot linux;run bootm_cmd\0"                                  \
 152         "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;"           \
 153         " run bootm_cmd\0"                                              \
 154         TX48_BOOTM_CMD                                                  \
 155         "default_bootargs=set bootargs " CONFIG_BOOTARGS                \
 156         TX48_MTDPARTS_CMD                                               \
 157         " video=${video_mode} ${append_bootargs}\0"                     \
 158         "cpu_clk=" xstr(CONFIG_SYS_MPU_CLK) "\0"                        \
 159         "fdtaddr=81000000\0"                                            \
 160         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 161         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 162         "otg_mode=device\0"                                             \
 163         "touchpanel=tsc2007\0"                                          \
 164         "video_mode=da8xx-fb:640x480MR-24@60\0"
 165
 166 #define MTD_NAME                        "omap2-nand.0"
 167 #define MTDIDS_DEFAULT                  "nand0=" MTD_NAME
 168
 169 /*
 170  * U-Boot Commands
 171  */
 172 #include <config_cmd_default.h>
 173 #define CONFIG_CMD_CACHE
 174 #define CONFIG_CMD_MMC
 175 #define CONFIG_CMD_NAND
 176 #define CONFIG_CMD_MTDPARTS
 177 #define CONFIG_CMD_BOOTCE
 178 #define CONFIG_CMD_TIME
 179 #define CONFIG_CMD_MEMTEST
 180
 181 /*
 182  * Serial Driver
 183  */
 184 #define CONFIG_SYS_NS16550
 185 #define CONFIG_SYS_NS16550_SERIAL
 186 #define CONFIG_SYS_NS16550_MEM32
 187 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 188 #define CONFIG_SYS_NS16550_CLK          48000000
 189 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
 190 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
 191 #define CONFIG_SYS_NS16550_COM6         0x481aa000      /* UART5 */
 192
 193 #define CONFIG_SYS_NS16550_COM3         0x481aa000      /* UART2 */
 194 #define CONFIG_SYS_NS16550_COM4         0x481aa000      /* UART3 */
 195 #define CONFIG_SYS_NS16550_COM5         0x481aa000      /* UART4 */
 196 #define CONFIG_CONS_INDEX               1               /* one based! */
 197 #define CONFIG_BAUDRATE                 115200          /* Default baud rate */
 198 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, }
 199 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 200
 201 /*
 202  * Ethernet Driver
 203  */
 204 #ifdef CONFIG_CMD_NET
 205 #define CONFIG_DRIVER_TI_CPSW
 206 #define CONFIG_NET_MULTI
 207 #define CONFIG_PHY_GIGE
 208 #define CONFIG_PHY_SMSC
 209 #define CONFIG_PHYLIB
 210 #define CONFIG_MII
 211 #define CONFIG_CMD_MII
 212 #define CONFIG_CMD_DHCP
 213 #define CONFIG_CMD_PING
 214 /* Add for working with "strict" DHCP server */
 215 #define CONFIG_BOOTP_SUBNETMASK
 216 #define CONFIG_BOOTP_GATEWAY
 217 #define CONFIG_BOOTP_DNS
 218 #define CONFIG_BOOTP_DNS2
 219 #endif
 220
 221 /*
 222  * NAND flash driver
 223  */
 224 #ifdef CONFIG_CMD_NAND
 225 #define CONFIG_MTD_DEVICE
 226 #define CONFIG_ENV_IS_IN_NAND
 227 #define CONFIG_NAND_AM33XX
 228 #define GPMC_NAND_ECC_LP_x8_LAYOUT
 229 #define GPMC_NAND_HW_ECC_LAYOUT_KERNEL  GPMC_NAND_HW_ECC_LAYOUT
 230 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 231 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 232 #define CONFIG_SYS_NAND_OOBSIZE         64
 233 #define CONFIG_SYS_NAND_ECCSIZE         512
 234 #define CONFIG_SYS_NAND_ECCBYTES        14
 235 #define CONFIG_CMD_NAND_TRIMFFS
 236 #define CONFIG_SYS_NAND_MAX_CHIPS       1
 237 #define CONFIG_SYS_NAND_MAXBAD          20 /* Max. number of bad blocks guaranteed by manufacturer */
 238 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 239 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 240 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 241 #ifdef CONFIG_ENV_IS_IN_NAND
 242 #define CONFIG_ENV_OVERWRITE
 243 #define CONFIG_ENV_OFFSET               (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
 244 #define CONFIG_ENV_SIZE                 SZ_128K
 245 #define CONFIG_ENV_RANGE                0x60000
 246 #endif /* CONFIG_ENV_IS_IN_NAND */
 247 #define CONFIG_SYS_NAND_BASE            0x08000000 /* must be defined but value is irrelevant */
 248 #define NAND_BASE                       CONFIG_SYS_NAND_BASE
 249 #endif /* CONFIG_CMD_NAND */
 250
 251 /*
 252  * MMC Driver
 253  */
 254 #ifdef CONFIG_CMD_MMC
 255 #ifndef CONFIG_ENV_IS_IN_NAND
 256 #define CONFIG_ENV_IS_IN_MMC
 257 #endif
 258 #define CONFIG_MMC
 259 #define CONFIG_GENERIC_MMC
 260 #define CONFIG_OMAP_HSMMC
 261 #define CONFIG_OMAP_MMC_DEV_1
 262
 263 #define CONFIG_DOS_PARTITION
 264 #define CONFIG_CMD_FAT
 265 #define CONFIG_CMD_EXT2
 266
 267 /*
 268  * Environments on MMC
 269  */
 270 #ifdef CONFIG_ENV_IS_IN_MMC
 271 #define CONFIG_SYS_MMC_ENV_DEV          0
 272 #define CONFIG_ENV_OVERWRITE
 273 /* Associated with the MMC layout defined in mmcops.c */
 274 #define CONFIG_ENV_OFFSET               SZ_1K
 275 #define CONFIG_ENV_SIZE                 (SZ_128K - CONFIG_ENV_OFFSET)
 276 #define CONFIG_DYNAMIC_MMC_DEVNO
 277 #endif /* CONFIG_ENV_IS_IN_MMC */
 278 #endif /* CONFIG_CMD_MMC */
 279
 280 #ifdef CONFIG_ENV_OFFSET_REDUND
 281 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 282         "128k(u-boot-spl),"                                             \
 283         "1m(u-boot),"                                                   \
 284         xstr(CONFIG_ENV_RANGE)                                          \
 285         "(env),"                                                        \
 286         xstr(CONFIG_ENV_RANGE)                                          \
 287         "(env2),4m(linux),16m(rootfs),256k(dtb),107904k(userfs),512k@0x7f80000(bbt)ro"
 288 #else
 289 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 290         "128k(u-boot-spl),"                                             \
 291         "1m(u-boot),"                                                   \
 292         xstr(CONFIG_ENV_RANGE)                                          \
 293         "(env),4m(linux),16m(rootfs),256k(dtb),108288k(userfs),512k@0x7f80000(bbt)ro"
 294 #endif
 295
 296 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 297 #define SRAM0_SIZE                      SZ_64K
 298 #define OCMC_SRAM_BASE                  0x40300000
 299 #define CONFIG_SPL_STACK                (OCMC_SRAM_BASE + 0xb800)
 300 #define CONFIG_SYS_INIT_SP_ADDR         (PHYS_SDRAM_1 + SZ_32K)
 301
 302  /* Platform/Board specific defs */
 303 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
 304 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 305
 306 /* Defines for SPL */
 307 #define CONFIG_SPL
 308 #define CONFIG_SPL_FRAMEWORK
 309 #define CONFIG_SPL_BOARD_INIT
 310 #define CONFIG_SPL_MAX_SIZE             (46 * SZ_1K)
 311 #define CONFIG_SPL_GPIO_SUPPORT
 312 #ifdef CONFIG_NAND_AM33XX
 313 #define CONFIG_SPL_NAND_DRIVERS
 314 #define CONFIG_SPL_NAND_AM33XX_BCH
 315 #define CONFIG_SPL_NAND_SUPPORT
 316 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 317 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE /   \
 318                                         CONFIG_SYS_NAND_PAGE_SIZE)
 319 #define CONFIG_SYS_NAND_BLOCK_SIZE      SZ_128K
 320 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 321 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 322                                          10, 11, 12, 13, 14, 15, 16, 17, \
 323                                          18, 19, 20, 21, 22, 23, 24, 25, \
 324                                          26, 27, 28, 29, 30, 31, 32, 33, \
 325                                          34, 35, 36, 37, 38, 39, 40, 41, \
 326                                          42, 43, 44, 45, 46, 47, 48, 49, \
 327                                          50, 51, 52, 53, 54, 55, 56, 57, }
 328 #endif
 329
 330 #define CONFIG_SPL_BSS_START_ADDR       PHYS_SDRAM_1
 331 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_512K
 332
 333 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 334
 335 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 336 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 337 #define CONFIG_SPL_SERIAL_SUPPORT
 338 #define CONFIG_SPL_YMODEM_SUPPORT
 339 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 340
 341 /*
 342  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 343  * 64 bytes before this address should be set aside for u-boot.img's
 344  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 345  * other needs.
 346  */
 347 #define CONFIG_SYS_SPL_MALLOC_START     (PHYS_SDRAM_1 + SZ_2M + SZ_32K)
 348 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_1M
 349
 350 #endif  /* __CONFIGS_TX48_H */