2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #ifndef CONFIG_SOC_MX6UL
12 #define CONFIG_ARM_ERRATA_743622
13 #define CONFIG_ARM_ERRATA_751472
14 #define CONFIG_ARM_ERRATA_794072
15 #define CONFIG_ARM_ERRATA_761320
17 #ifndef CONFIG_SYS_L2CACHE_OFF
18 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_MXC_GPT_HCLK
28 #include <linux/kconfig.h>
29 #include <linux/sizes.h>
30 #include <asm/arch/imx-regs.h>
33 * Ka-Ro TX6 board - SoC configuration
35 #define CONFIG_SYS_MX6_HCLK 24000000
36 #define CONFIG_SYS_MX6_CLK32 32768
37 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
38 #define CONFIG_SHOW_ACTIVITY
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_SYS_GENERIC_BOARD
44 #define CONFIG_CMD_GPIO
46 #ifndef CONFIG_TX6_UBOOT_MFG
47 /* LCD Logo and Splash screen support */
49 #define CONFIG_SPLASH_SCREEN
50 #define CONFIG_SPLASH_SCREEN_ALIGN
51 #ifndef CONFIG_SOC_MX6UL
52 #define CONFIG_VIDEO_IPUV3
53 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
55 #define CONFIG_LCD_LOGO
56 #define LCD_BPP LCD_COLOR32
57 #define CONFIG_CMD_BMP
58 #define CONFIG_BMP_8BPP
59 #define CONFIG_BMP_16BPP
60 #define CONFIG_BMP_24BPP
61 #define CONFIG_BMP_32BPP
62 #define CONFIG_VIDEO_BMP_RLE8
63 #endif /* CONFIG_LCD */
64 #endif /* CONFIG_TX6_UBOOT_MFG */
67 * Memory configuration options
69 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
70 #ifndef CONFIG_SOC_MX6UL
71 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
72 #define CONFIG_SYS_MPU_CLK 792
74 #define PHYS_SDRAM_1 0x80000000 /* Base address of bank 1 */
75 #define CONFIG_SYS_MPU_CLK 528
77 #ifndef CONFIG_SYS_SDRAM_BUS_WIDTH
78 #if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
79 #define CONFIG_SYS_SDRAM_BUS_WIDTH 32
80 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
81 #define CONFIG_SYS_SDRAM_BUS_WIDTH 16
83 #define CONFIG_SYS_SDRAM_BUS_WIDTH 64
85 #endif /* CONFIG_SYS_SDRAM_BUS_WIDTH */
86 #define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * CONFIG_SYS_SDRAM_BUS_WIDTH)
87 #ifdef CONFIG_SOC_MX6Q
88 #define CONFIG_SYS_SDRAM_CLK 528
90 #define CONFIG_SYS_SDRAM_CLK 400
92 #define CONFIG_STACKSIZE SZ_128K
93 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
94 #define CONFIG_SYS_MALLOC_LEN SZ_8M
95 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
96 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
99 * U-Boot general configurations
101 #define CONFIG_SYS_LONGHELP
102 #if defined(CONFIG_SOC_MX6Q)
103 #elif defined(CONFIG_SOC_MX6DL)
104 #elif defined(CONFIG_SOC_MX6S)
105 #elif defined(CONFIG_SOC_MX6UL)
107 #error Unsupported i.MX6 processor variant
109 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
110 #define CONFIG_SYS_PBSIZE \
111 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
112 /* Print buffer size */
113 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
115 /* Boot argument buffer size */
116 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
117 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
118 #define CONFIG_CMDLINE_EDITING /* Command history etc */
120 #define CONFIG_SYS_64BIT_VSPRINTF
125 #define xstr(s) str(s)
127 #define __pfx(x, s) (x##s)
128 #define _pfx(x, s) __pfx(x, s)
130 #define CONFIG_CMDLINE_TAG
131 #define CONFIG_INITRD_TAG
132 #define CONFIG_SETUP_MEMORY_TAGS
133 #ifndef CONFIG_TX6_UBOOT_MFG
134 #define CONFIG_BOOTDELAY 1
136 #define CONFIG_BOOTDELAY 0
138 #define CONFIG_ZERO_BOOTDELAY_CHECK
139 #define CONFIG_SYS_AUTOLOAD "no"
140 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
141 #define CONFIG_BOOTFILE "uImage"
142 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
143 #ifndef CONFIG_TX6_UBOOT_MFG
144 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
146 #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \
147 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
148 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
149 #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000
151 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
153 #define CONFIG_DELAY_ENVIRONMENT
154 #endif /* CONFIG_TX6_UBOOT_MFG */
155 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
156 #define CONFIG_LOADADDR 82000000
157 #define CONFIG_FDTADDR 81000000
159 #define CONFIG_LOADADDR 18000000
160 #define CONFIG_FDTADDR 11000000
162 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
163 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
164 #ifndef CONFIG_SYS_LVDS_IF
165 #define DEFAULT_VIDEO_MODE "VGA"
167 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
173 #ifdef CONFIG_TX6_UBOOT_NOENV
174 #define CONFIG_EXTRA_ENV_SETTINGS \
177 "baseboard=stk5-v3\0" \
179 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
180 "mtdids=" MTDIDS_DEFAULT "\0" \
181 "mtdparts=" MTDPARTS_DEFAULT "\0"
183 #define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK)
185 #define CONFIG_EXTRA_ENV_SETTINGS \
187 "baseboard=stk5-v3\0" \
188 "bootargs_jffs2=run default_bootargs" \
189 ";setenv bootargs ${bootargs}" \
190 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
191 "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
193 "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
194 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
196 "bootargs_ubifs=run default_bootargs" \
197 ";setenv bootargs ${bootargs}" \
198 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
199 "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
201 "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
202 ";fatload mmc 0 ${loadaddr} uImage\0" \
203 CONFIG_SYS_BOOT_CMD_NAND \
204 "bootcmd_net=setenv autoload y;setenv autostart n" \
205 ";run bootargs_nfs" \
207 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
208 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
209 "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
210 "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
211 " ${append_bootargs}\0" \
214 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
215 CONFIG_SYS_FDTSAVE_CMD \
216 "mtdids=" MTDIDS_DEFAULT "\0" \
217 "mtdparts=" MTDPARTS_DEFAULT "\0" \
218 "nfsroot=/tftpboot/rootfs\0" \
219 "otg_mode=device\0" \
221 "touchpanel=tsc2007\0" \
222 "video_mode=" DEFAULT_VIDEO_MODE "\0"
223 #endif /* CONFIG_ENV_IS_NOWHERE */
225 #ifdef CONFIG_TX6_NAND
226 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
227 #define CONFIG_SYS_BOOT_CMD_NAND \
228 "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0"
229 #define CONFIG_SYS_FDTSAVE_CMD \
230 "fdtsave=fdt resize;nand erase.part dtb" \
231 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
232 #define MTD_NAME "gpmi-nand"
233 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
234 #define CONFIG_SYS_NAND_ONFI_DETECTION
235 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
236 #define ROOTPART_UUID_STR ""
237 #define EMMC_BOOT_ACK_STR ""
238 #define EMMC_BOOT_PART_STR ""
240 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
241 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
242 #define CONFIG_SYS_BOOT_CMD_NAND ""
243 #define CONFIG_SYS_FDTSAVE_CMD \
244 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
245 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
246 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
248 #define MTDIDS_DEFAULT ""
249 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
250 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
251 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
252 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
253 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
254 #endif /* CONFIG_TX6_NAND */
259 #define CONFIG_MXC_UART
260 #define CONFIG_MXC_UART_BASE UART1_BASE
261 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
262 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
263 #define CONFIG_SYS_CONSOLE_INFO_QUIET
264 #define CONFIG_CONS_INDEX 1
269 #define CONFIG_MXC_GPIO
274 #ifdef CONFIG_FEC_MXC
275 /* This is required for the FEC driver to work with cache enabled */
276 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
278 #ifndef CONFIG_SOC_MX6UL
279 #define CONFIG_FEC_MXC_PHYADDR 0
280 #define IMX_FEC_BASE ENET_BASE_ADDR
282 #define CONFIG_FEC_XCV_TYPE RMII
288 #ifdef CONFIG_HARD_I2C
289 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
290 #define CONFIG_SYS_I2C_SPEED 400000
291 #endif /* CONFIG_HARD_I2C */
292 #if defined(CONFIG_TX6_REV)
293 #if CONFIG_TX6_REV == 0x1
294 #define CONFIG_LTC3676
295 #elif CONFIG_TX6_REV == 0x2
296 #define CONFIG_RN5T618
297 #elif CONFIG_TX6_REV == 0x3
298 #define CONFIG_RN5T567
300 #error Unsupported TX6 module revision
302 #else /* CONFIG_TX6_REV */
303 /* autodetect which PMIC is present to derive TX6_REV */
304 #ifdef CONFIG_SOC_MX6UL
305 #define CONFIG_SYS_I2C
306 #define CONFIG_SYS_I2C_SOFT
307 #define CONFIG_SYS_I2C_SOFT_SPEED 400000
308 #define CONFIG_SOFT_I2C_GPIO_SCL IMX_GPIO_NR(5, 0)
309 #define CONFIG_SOFT_I2C_GPIO_SDA IMX_GPIO_NR(5, 1)
310 #define CONFIG_SOFT_I2C_READ_REPEATED_START
312 #define CONFIG_LTC3676 /* TX6_REV == 1 */
314 #define CONFIG_RN5T567 /* TX6_REV == 3 */
315 #endif /* CONFIG_TX6_REV */
317 #define CONFIG_ENV_OVERWRITE
322 #ifdef CONFIG_TX6_NAND
323 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
324 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
325 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
326 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
327 #define CONFIG_SYS_NAND_BASE 0x00000000
328 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
330 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
331 #define CONFIG_ENV_SIZE SZ_128K
332 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
333 #endif /* CONFIG_TX6_NAND */
335 #ifdef CONFIG_ENV_OFFSET_REDUND
336 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
338 xstr(CONFIG_SYS_ENV_PART_SIZE) \
340 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
342 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
344 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
345 #endif /* CONFIG_ENV_OFFSET_REDUND */
350 #ifdef CONFIG_FSL_ESDHC
351 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
353 #ifdef CONFIG_CMD_MMC
354 #define CONFIG_CMD_FAT
355 #define CONFIG_FAT_WRITE
356 #define CONFIG_CMD_EXT2
359 * Environments on MMC
361 #ifdef CONFIG_ENV_IS_IN_MMC
362 #define CONFIG_SYS_MMC_ENV_DEV 0
363 #define CONFIG_SYS_MMC_ENV_PART 0x1
364 #define CONFIG_DYNAMIC_MMC_DEVNO
365 #endif /* CONFIG_ENV_IS_IN_MMC */
366 #endif /* CONFIG_CMD_MMC */
368 #ifdef CONFIG_TX6_NAND
369 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
370 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
371 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
373 CONFIG_SYS_ENV_PART_STR \
374 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
375 xstr(CONFIG_SYS_DTB_PART_SIZE) \
376 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
377 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
378 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
380 #define MTDPARTS_DEFAULT ""
383 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
384 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
385 GENERATED_GBL_DATA_SIZE)
387 #endif /* __CONFIG_H */