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1 /*
2  * (C) Copyright 2009
3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
4  *
5  * Copyright (C) 2012 Stefan Roese <sr@denx.de>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14  * High Level Configuration Options
15  * (easy to change)
16  */
17 #define CONFIG_SPEAR600                         /* SPEAr600 SoC */
18 #define CONFIG_X600                             /* on X600 board */
19 #define CONFIG_SYS_GENERIC_BOARD
20
21 #include <asm/arch/hardware.h>
22
23 /* Timer, HZ specific defines */
24 #define CONFIG_SYS_HZ_CLOCK                     8300000
25
26 #define CONFIG_SYS_TEXT_BASE                    0x00800040
27 #define CONFIG_SYS_FLASH_BASE                   0xf8000000
28 /* Reserve 8KiB for SPL */
29 #define CONFIG_SPL_PAD_TO                       8192    /* decimal for 'dd' */
30 #define CONFIG_SYS_SPL_LEN                      CONFIG_SPL_PAD_TO
31 #define CONFIG_SYS_UBOOT_BASE                   (CONFIG_SYS_FLASH_BASE + \
32                                                  CONFIG_SYS_SPL_LEN)
33 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_FLASH_BASE
34 #define CONFIG_SYS_MONITOR_LEN                  0x60000
35
36 #define CONFIG_ENV_IS_IN_FLASH
37
38 /* Serial Configuration (PL011) */
39 #define CONFIG_SYS_SERIAL0                      0xD0000000
40 #define CONFIG_SYS_SERIAL1                      0xD0080000
41 #define CONFIG_PL01x_PORTS                      { (void *)CONFIG_SYS_SERIAL0, \
42                                                 (void *)CONFIG_SYS_SERIAL1 }
43 #define CONFIG_PL011_SERIAL
44 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
45 #define CONFIG_CONS_INDEX                       0
46 #define CONFIG_BAUDRATE                         115200
47 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
48                                                   57600, 115200 }
49 #define CONFIG_SYS_LOADS_BAUD_CHANGE
50
51 /* NOR FLASH config options */
52 #define CONFIG_ST_SMI
53 #define CONFIG_SYS_MAX_FLASH_BANKS              1
54 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
55 #define CONFIG_SYS_FLASH_ADDR_BASE              { CONFIG_SYS_FLASH_BASE }
56 #define CONFIG_SYS_MAX_FLASH_SECT               128
57 #define CONFIG_SYS_FLASH_EMPTY_INFO
58 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
59 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
60
61 /* NAND FLASH config options */
62 #define CONFIG_NAND_FSMC
63 #define CONFIG_SYS_NAND_SELF_INIT
64 #define CONFIG_SYS_MAX_NAND_DEVICE              1
65 #define CONFIG_SYS_NAND_BASE                    CONFIG_FSMC_NAND_BASE
66 #define CONFIG_MTD_ECC_SOFT
67 #define CONFIG_SYS_FSMC_NAND_8BIT
68 #define CONFIG_SYS_NAND_ONFI_DETECTION
69
70 /* UBI/UBI config options */
71 #define CONFIG_MTD_DEVICE
72 #define CONFIG_MTD_PARTITIONS
73 #define CONFIG_RBTREE
74
75 /* Ethernet config options */
76 #define CONFIG_MII
77 #define CONFIG_PHYLIB
78 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
79 #define CONFIG_PHY_ADDR         0       /* PHY address */
80 #define CONFIG_PHY_GIGE                 /* Include GbE speed/duplex detection */
81
82 #define CONFIG_SPEAR_GPIO
83
84 /* I2C config options */
85 #define CONFIG_SYS_I2C
86 #define CONFIG_SYS_I2C_DW
87 #define CONFIG_SYS_I2C_BASE                     0xD0200000
88 #define CONFIG_SYS_I2C_SPEED                    400000
89 #define CONFIG_SYS_I2C_SLAVE                    0x02
90 #define CONFIG_I2C_CHIPADDRESS                  0x50
91
92 #define CONFIG_RTC_M41T62       1
93 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
94
95 /* FPGA config options */
96 #define CONFIG_FPGA
97 #define CONFIG_FPGA_XILINX
98 #define CONFIG_FPGA_SPARTAN3
99 #define CONFIG_FPGA_COUNT       1
100
101 /*
102  * Command support defines
103  */
104 #define CONFIG_CMD_CACHE
105 #define CONFIG_CMD_DATE
106 #define CONFIG_CMD_DHCP
107 #define CONFIG_CMD_ENV
108 #define CONFIG_CMD_FPGA_LOADMK
109 #define CONFIG_CMD_GPIO
110 #define CONFIG_CMD_I2C
111 #define CONFIG_CMD_MII
112 #define CONFIG_CMD_MTDPARTS
113 #define CONFIG_CMD_NAND
114 #define CONFIG_CMD_PING
115 #define CONFIG_CMD_SAVES
116 #define CONFIG_CMD_UBI
117 #define CONFIG_CMD_UBIFS
118 #define CONFIG_LZO
119
120 #define CONFIG_BOOTDELAY                        3
121
122 #define CONFIG_SYS_HUSH_PARSER                  /* Use the HUSH parser  */
123 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
124
125 /*
126  * U-Boot Environment placing definitions.
127  */
128 #define CONFIG_ENV_SECT_SIZE                    0x00010000
129 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_MONITOR_BASE + \
130                                                  CONFIG_SYS_MONITOR_LEN)
131 #define CONFIG_ENV_SIZE                         0x02000
132 #define CONFIG_ENV_ADDR_REDUND                  (CONFIG_ENV_ADDR + \
133                                                  CONFIG_ENV_SECT_SIZE)
134 #define CONFIG_ENV_SIZE_REDUND                  (CONFIG_ENV_SIZE)
135
136 /* Miscellaneous configurable options */
137 #define CONFIG_ARCH_CPU_INIT
138 #define CONFIG_DISPLAY_CPUINFO
139 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
140 #define CONFIG_CMDLINE_TAG
141 #define CONFIG_OF_LIBFDT                /* enable passing of devicetree */
142 #define CONFIG_SETUP_MEMORY_TAGS
143 #define CONFIG_MISC_INIT_R
144 #define CONFIG_BOARD_LATE_INIT
145 #define CONFIG_LOOPW                    /* enable loopw command         */
146 #define CONFIG_MX_CYCLIC                /* enable mdc/mwc commands      */
147 #define CONFIG_ZERO_BOOTDELAY_CHECK
148
149 #define CONFIG_SYS_MEMTEST_START                0x00800000
150 #define CONFIG_SYS_MEMTEST_END                  0x04000000
151 #define CONFIG_SYS_MALLOC_LEN                   (1024 * 1024)
152 #define CONFIG_IDENT_STRING                     "-SPEAr"
153 #define CONFIG_SYS_LONGHELP
154 #define CONFIG_SYS_PROMPT                       "X600> "
155 #define CONFIG_CMDLINE_EDITING
156 #define CONFIG_SYS_CBSIZE                       256
157 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
158                                                  sizeof(CONFIG_SYS_PROMPT) + 16)
159 #define CONFIG_SYS_MAXARGS                      16
160 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
161 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
162 #define CONFIG_SYS_CONSOLE_INFO_QUIET
163
164 /* Use last 2 lwords in internal SRAM for bootcounter */
165 #define CONFIG_BOOTCOUNT_LIMIT
166 #define CONFIG_SYS_BOOTCOUNT_ADDR       0xd2801ff8
167
168 #define CONFIG_HOSTNAME                         x600
169 #define CONFIG_UBI_PART                         ubi0
170 #define CONFIG_UBIFS_VOLUME                     rootfs
171
172 #define MTDIDS_DEFAULT          "nand0=nand"
173 #define MTDPARTS_DEFAULT        "mtdparts=nand:64M(ubi0),64M(ubi1)"
174
175 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
176         "u-boot_addr=1000000\0"                                         \
177         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.spr\0"          \
178         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
179         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
180                 " +${filesize};"                                        \
181                 "erase " __stringify(CONFIG_SYS_MONITOR_BASE) " +${filesize};" \
182                 "cp.b ${u-boot_addr} " __stringify(CONFIG_SYS_MONITOR_BASE) \
183                 " ${filesize};"                                         \
184                 "protect on " __stringify(CONFIG_SYS_MONITOR_BASE)      \
185                 " +${filesize}\0"                                       \
186         "upd=run load update\0"                                         \
187         "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"            \
188         "part=" __stringify(CONFIG_UBI_PART) "\0"                       \
189         "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"                    \
190         "load_ubifs=tftp ${kernel_addr} ${ubifs}\0"                     \
191         "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
192                 " ${filesize}\0"                                        \
193         "upd_ubifs=run load_ubifs update_ubifs\0"                       \
194         "init_ubifs=nand erase.part ubi0;ubi part ${part};"             \
195                 "ubi create ${vol} 4000000\0"                           \
196         "netdev=eth0\0"                                                 \
197         "rootpath=/opt/eldk-4.2/arm\0"                                  \
198         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
199                 "nfsroot=${serverip}:${rootpath}\0"                     \
200         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
201         "boot_part=0\0"                                                 \
202         "altbootcmd=if test $boot_part -eq 0;then "                     \
203                         "echo Switching to partition 1!;"               \
204                         "setenv boot_part 1;"                           \
205                 "else; "                                                \
206                         "echo Switching to partition 0!;"               \
207                         "setenv boot_part 0;"                           \
208                 "fi;"                                                   \
209                 "saveenv;boot\0"                                        \
210         "ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "               \
211                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
212         "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"              \
213         "kernel_fs=/boot/uImage \0"                                     \
214         "kernel_addr=1000000\0"                                         \
215         "dtb=" __stringify(CONFIG_HOSTNAME) "/"                         \
216                 __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
217         "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"           \
218         "dtb_addr=1800000\0"                                            \
219         "load_kernel=tftp ${kernel_addr} ${kernel}\0"                   \
220         "load_dtb=tftp ${dtb_addr} ${dtb}\0"                            \
221         "addip=setenv bootargs ${bootargs} "                            \
222                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
223                 ":${hostname}:${netdev}:off panic=1\0"                  \
224         "addcon=setenv bootargs ${bootargs} console=ttyAMA0,"           \
225                 "${baudrate}\0"                                         \
226         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
227         "net_nfs=run load_dtb load_kernel; "                            \
228                 "run nfsargs addip addcon addmtd addmisc;"              \
229                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
230         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
231         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
232         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"         \
233                 " addcon addmisc addmtd;"                               \
234                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
235         "ubifs_mount=ubi part ubi${boot_part};ubifsmount ubi:rootfs\0"  \
236         "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"             \
237                 "ubifsload ${dtb_addr} ${dtb_fs};\0"                    \
238         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
239                 "addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"   \
240         "bootcmd=run nand_ubifs\0"                                      \
241         "\0"
242
243 /* Stack sizes */
244 #define CONFIG_STACKSIZE                        (512 * 1024)
245
246 /* Physical Memory Map */
247 #define CONFIG_NR_DRAM_BANKS                    1
248 #define PHYS_SDRAM_1                            0x00000000
249 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
250
251 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
252 #define CONFIG_SYS_INIT_RAM_ADDR                0xD2800000
253 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
254
255 #define CONFIG_SYS_INIT_SP_OFFSET               \
256         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
257
258 #define CONFIG_SYS_INIT_SP_ADDR                 \
259         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
260
261 /*
262  * SPL related defines
263  */
264 #define CONFIG_SPL_TEXT_BASE    0xd2800b00
265 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
266 #define CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
267
268 #define CONFIG_SPL_SERIAL_SUPPORT
269 #define CONFIG_SPL_LIBCOMMON_SUPPORT    /* image.c */
270 #define CONFIG_SPL_LIBGENERIC_SUPPORT   /* string.c */
271 #define CONFIG_SPL_NO_PRINTF
272
273 /*
274  * Please select/define only one of the following
275  * Each definition corresponds to a supported DDR chip.
276  * DDR configuration is based on the following selection
277  */
278 #define CONFIG_DDR_MT47H64M16           1
279 #define CONFIG_DDR_MT47H32M16           0
280 #define CONFIG_DDR_MT47H128M8           0
281
282 /*
283  * Synchronous/Asynchronous operation of DDR
284  *
285  * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
286  * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
287  * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
288  */
289 #define CONFIG_DDR_2HCLK                1
290 #define CONFIG_DDR_HCLK                 0
291 #define CONFIG_DDR_PLL2                 0
292
293 /*
294  * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
295  * or not. Modify/Add to only these macros to define new boot types
296  */
297 #define USB_BOOT_SUPPORTED              0
298 #define PCIE_BOOT_SUPPORTED             0
299 #define SNOR_BOOT_SUPPORTED             1
300 #define NAND_BOOT_SUPPORTED             1
301 #define PNOR_BOOT_SUPPORTED             0
302 #define TFTP_BOOT_SUPPORTED             0
303 #define UART_BOOT_SUPPORTED             0
304 #define SPI_BOOT_SUPPORTED              0
305 #define I2C_BOOT_SUPPORTED              0
306 #define MMC_BOOT_SUPPORTED              0
307
308 #endif  /* __CONFIG_H */