include/configs/yosemite.h

   1 /*
   2  * (C) Copyright 2005-2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /************************************************************************
   9  * yosemite.h - configuration for Yosemite & Yellowstone boards
  10  ***********************************************************************/
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /*-----------------------------------------------------------------------
  15  * High Level Configuration Options
  16  *----------------------------------------------------------------------*/
  17 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
  18 #ifndef CONFIG_YELLOWSTONE
  19 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
  20 #define CONFIG_HOSTNAME         yosemite
  21 #else
  22 #define CONFIG_440GR            1       /* Specific PPC440GR support    */
  23 #define CONFIG_HOSTNAME         yellowstone
  24 #endif
  25 #define CONFIG_440              1       /* ... PPC440 family            */
  26 #define CONFIG_4xx              1       /* ... PPC4xx family            */
  27 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
  28
  29 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
  30
  31 /*
  32  * Include common defines/options for all AMCC eval boards
  33  */
  34 #include "amcc-common.h"
  35
  36 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  37 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
  38 #define CONFIG_BOARD_RESET      1       /* call board_reset()           */
  39
  40 /*-----------------------------------------------------------------------
  41  * Base addresses -- Note these are effective addresses where the
  42  * actual resources get mapped (not physical addresses)
  43  *----------------------------------------------------------------------*/
  44 #define CONFIG_SYS_FLASH_BASE           0xfc000000          /* start of FLASH   */
  45 #define CONFIG_SYS_PCI_MEMBASE          0xa0000000          /* mapped pci memory*/
  46 #define CONFIG_SYS_PCI_MEMBASE1        CONFIG_SYS_PCI_MEMBASE  + 0x10000000
  47 #define CONFIG_SYS_PCI_MEMBASE2        CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
  48 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
  49
  50 /*Don't change either of these*/
  51 #define CONFIG_SYS_PCI_BASE             0xe0000000          /* internal PCI regs*/
  52 /*Don't change either of these*/
  53
  54 #define CONFIG_SYS_USB_DEVICE          0x50000000
  55 #define CONFIG_SYS_NVRAM_BASE_ADDR     0x80000000
  56 #define CONFIG_SYS_BCSR_BASE            (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000)
  57 #define CONFIG_SYS_BOOT_BASE_ADDR      0xf0000000
  58
  59 /*-----------------------------------------------------------------------
  60  * Initial RAM & stack pointer (placed in SDRAM)
  61  *----------------------------------------------------------------------*/
  62 #define CONFIG_SYS_INIT_RAM_DCACHE      1               /* d-cache as init ram  */
  63 #define CONFIG_SYS_INIT_RAM_ADDR        0x70000000              /* DCache       */
  64 #define CONFIG_SYS_INIT_RAM_SIZE        (4 << 10)
  65 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  66 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  67
  68 /*-----------------------------------------------------------------------
  69  * Serial Port
  70  *----------------------------------------------------------------------*/
  71 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  72 #define CONFIG_SYS_EXT_SERIAL_CLOCK     11059200 /* use external 11.059MHz clk  */
  73
  74 /*-----------------------------------------------------------------------
  75  * Environment
  76  *----------------------------------------------------------------------*/
  77 /*
  78  * Define here the location of the environment variables (FLASH or EEPROM).
  79  * Note: DENX encourages to use redundant environment in FLASH.
  80  */
  81 #if 1
  82 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
  83 #else
  84 #define CONFIG_ENV_IS_IN_EEPROM 1       /* use EEPROM for environment vars      */
  85 #endif
  86
  87 /*-----------------------------------------------------------------------
  88  * FLASH related
  89  *----------------------------------------------------------------------*/
  90 #define CONFIG_SYS_FLASH_CFI                            /* The flash is CFI compatible  */
  91 #define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver        */
  92 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1                /* AMD RESET for STM 29W320DB!  */
  93
  94 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
  95 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
  96
  97 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
  98 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
  99
 100 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster)     */
 101
 102 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 103
 104 #ifdef CONFIG_ENV_IS_IN_FLASH
 105 #define CONFIG_ENV_SECT_SIZE    0x20000 /* size of one complete sector          */
 106 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 107 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
 108
 109 /* Address and size of Redundant Environment Sector     */
 110 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 111 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 112 #endif /* CONFIG_ENV_IS_IN_FLASH */
 113
 114 /*-----------------------------------------------------------------------
 115  * DDR SDRAM
 116  *----------------------------------------------------------------------*/
 117 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
 118 #define CONFIG_SYS_KBYTES_SDRAM        (128 * 1024)    /* 128MB             */
 119 #define CONFIG_SYS_SDRAM_BANKS          (2)
 120
 121 /*-----------------------------------------------------------------------
 122  * I2C
 123  *----------------------------------------------------------------------*/
 124 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
 125
 126 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 127 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
 128 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 129 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 130 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 131
 132 #ifdef CONFIG_ENV_IS_IN_EEPROM
 133 #define CONFIG_ENV_SIZE         0x200       /* Size of Environment vars */
 134 #define CONFIG_ENV_OFFSET               0x0
 135 #endif /* CONFIG_ENV_IS_IN_EEPROM */
 136
 137 /* I2C SYSMON (LM75, AD7414 is almost compatible)                       */
 138 #define CONFIG_DTT_LM75         1               /* ON Semi's LM75       */
 139 #define CONFIG_DTT_AD7414       1               /* use AD7414           */
 140 #define CONFIG_DTT_SENSORS      {0}             /* Sensor addresses     */
 141 #define CONFIG_SYS_DTT_MAX_TEMP 70
 142 #define CONFIG_SYS_DTT_LOW_TEMP -30
 143 #define CONFIG_SYS_DTT_HYSTERESIS       3
 144
 145 /*
 146  * Default environment variables
 147  */
 148 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 149         CONFIG_AMCC_DEF_ENV                                             \
 150         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 151         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
 152         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 153         "kernel_addr=fc000000\0"                                        \
 154         "ramdisk_addr=fc180000\0"                                       \
 155         ""
 156
 157 #define CONFIG_HAS_ETH0         1       /* add support for "ethaddr"    */
 158 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 159 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
 160 #define CONFIG_PHY1_ADDR        3
 161
 162 /* Partitions */
 163 #define CONFIG_MAC_PARTITION
 164 #define CONFIG_DOS_PARTITION
 165 #define CONFIG_ISO_PARTITION
 166
 167 #ifdef CONFIG_440EP
 168 /* USB */
 169 #define CONFIG_USB_OHCI_NEW
 170 #define CONFIG_USB_STORAGE
 171 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 172
 173 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 174 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
 175 #define CONFIG_SYS_USB_OHCI_REGS_BASE   (CONFIG_SYS_PERIPHERAL_BASE | 0x1000)
 176 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "ppc440"
 177 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 178
 179 /* Comment this out to enable USB 1.1 device */
 180 #define USB_2_0_DEVICE
 181
 182 #define CONFIG_SUPPORT_VFAT
 183 #endif /* CONFIG_440EP */
 184
 185 #ifdef DEBUG
 186 #define CONFIG_PANIC_HANG
 187 #else
 188 #define CONFIG_HW_WATCHDOG                      /* watchdog */
 189 #endif
 190
 191 /*
 192  * Commands additional to the ones defined in amcc-common.h
 193  */
 194 #define CONFIG_CMD_DTT
 195 #define CONFIG_CMD_PCI
 196
 197 #ifdef CONFIG_440EP
 198     #define CONFIG_CMD_USB
 199     #define CONFIG_CMD_FAT
 200     #define CONFIG_CMD_EXT2
 201 #endif
 202
 203 /*-----------------------------------------------------------------------
 204  * PCI stuff
 205  *-----------------------------------------------------------------------
 206  */
 207 /* General PCI */
 208 #define CONFIG_PCI                      /* include pci support          */
 209 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 210 #undef  CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
 211 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 212 #define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
 213
 214 /* Board-specific PCI */
 215 #define CONFIG_SYS_PCI_TARGET_INIT
 216 #define CONFIG_SYS_PCI_MASTER_INIT
 217
 218 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
 219 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe   /* Whatever */
 220
 221 /*-----------------------------------------------------------------------
 222  * External Bus Controller (EBC) Setup
 223  *----------------------------------------------------------------------*/
 224 #define CONFIG_SYS_FLASH                CONFIG_SYS_FLASH_BASE
 225 #define CONFIG_SYS_CPLD         0x80000000
 226
 227 /* Memory Bank 0 (NOR-FLASH) initialization                                     */
 228 #define CONFIG_SYS_EBC_PB0AP            0x03017300
 229 #define CONFIG_SYS_EBC_PB0CR            (CONFIG_SYS_FLASH | 0xda000)
 230
 231 /* Memory Bank 2 (CPLD) initialization                                          */
 232 #define CONFIG_SYS_EBC_PB2AP            0x04814500
 233 #define CONFIG_SYS_EBC_PB2CR            (CONFIG_SYS_CPLD | 0x18000)
 234
 235 #define CONFIG_SYS_BCSR5_PCI66EN        0x80
 236
 237 #endif  /* __CONFIG_H */