include/gdsys_fpga.h

   1 /*
   2  * (C) Copyright 2010
   3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __GDSYS_FPGA_H
   9 #define __GDSYS_FPGA_H
  10
  11 int init_func_fpga(void);
  12
  13 enum {
  14         FPGA_STATE_DONE_FAILED = 1 << 0,
  15         FPGA_STATE_REFLECTION_FAILED = 1 << 1,
  16         FPGA_STATE_PLATFORM = 1 << 2,
  17 };
  18
  19 int get_fpga_state(unsigned dev);
  20 void print_fpga_state(unsigned dev);
  21
  22 struct ihs_gpio {
  23         u16 read;
  24         u16 clear;
  25         u16 set;
  26 };
  27
  28 struct ihs_i2c {
  29         u16 write_mailbox;
  30         u16 write_mailbox_ext;
  31         u16 read_mailbox;
  32         u16 read_mailbox_ext;
  33 };
  34
  35 struct ihs_osd {
  36         u16 version;
  37         u16 features;
  38         u16 control;
  39         u16 xy_size;
  40         u16 xy_scale;
  41         u16 x_pos;
  42         u16 y_pos;
  43 };
  44
  45 #ifdef CONFIG_NEO
  46 struct ihs_fpga {
  47         u16 reflection_low;     /* 0x0000 */
  48         u16 versions;           /* 0x0002 */
  49         u16 fpga_features;      /* 0x0004 */
  50         u16 fpga_version;       /* 0x0006 */
  51         u16 reserved_0[8187];   /* 0x0008 */
  52         u16 reflection_high;    /* 0x3ffe */
  53 };
  54 #endif
  55
  56 #ifdef CONFIG_IO
  57 struct ihs_fpga {
  58         u16 reflection_low;     /* 0x0000 */
  59         u16 versions;           /* 0x0002 */
  60         u16 fpga_features;      /* 0x0004 */
  61         u16 fpga_version;       /* 0x0006 */
  62         u16 reserved_0[5];      /* 0x0008 */
  63         u16 quad_serdes_reset;  /* 0x0012 */
  64         u16 reserved_1[8181];   /* 0x0014 */
  65         u16 reflection_high;    /* 0x3ffe */
  66 };
  67 #endif
  68
  69 #ifdef CONFIG_IO64
  70 struct ihs_fpga {
  71         u16 reflection_low;     /* 0x0000 */
  72         u16 versions;           /* 0x0002 */
  73         u16 fpga_features;      /* 0x0004 */
  74         u16 fpga_version;       /* 0x0006 */
  75         u16 reserved_0[5];      /* 0x0008 */
  76         u16 quad_serdes_reset;  /* 0x0012 */
  77         u16 reserved_1[502];    /* 0x0014 */
  78         u16 ch0_status_int;     /* 0x0400 */
  79         u16 ch0_config_int;     /* 0x0402 */
  80         u16 reserved_2[126];    /* 0x0404 */
  81         u16 ch0_hicb_status_int;/* 0x0500 */
  82         u16 ch0_hicb_config_int;/* 0x0502 */
  83         u16 reserved_3[7549];   /* 0x0504 */
  84         u16 reflection_high;    /* 0x3ffe */
  85 };
  86 #endif
  87
  88 #ifdef CONFIG_IOCON
  89 struct ihs_fpga {
  90         u16 reflection_low;     /* 0x0000 */
  91         u16 versions;           /* 0x0002 */
  92         u16 fpga_version;       /* 0x0004 */
  93         u16 fpga_features;      /* 0x0006 */
  94         u16 reserved_0[6];      /* 0x0008 */
  95         struct ihs_gpio gpio;   /* 0x0014 */
  96         u16 mpc3w_control;      /* 0x001a */
  97         u16 reserved_1[19];     /* 0x001c */
  98         u16 videocontrol;       /* 0x0042 */
  99         u16 reserved_2[93];     /* 0x0044 */
 100         u16 reflection_high;    /* 0x00fe */
 101         struct ihs_osd osd;     /* 0x0100 */
 102         u16 reserved_3[889];    /* 0x010e */
 103         u16 videomem;           /* 0x0800 */
 104 };
 105 #endif
 106
 107 #ifdef CONFIG_DLVISION_10G
 108 struct ihs_fpga {
 109         u16 reflection_low;     /* 0x0000 */
 110         u16 versions;           /* 0x0002 */
 111         u16 fpga_version;       /* 0x0004 */
 112         u16 fpga_features;      /* 0x0006 */
 113         u16 reserved_0[10];     /* 0x0008 */
 114         u16 extended_interrupt; /* 0x001c */
 115         u16 reserved_1[9];      /* 0x001e */
 116         struct ihs_i2c i2c;     /* 0x0030 */
 117         u16 reserved_2[16];     /* 0x0038 */
 118         u16 mpc3w_control;      /* 0x0058 */
 119         u16 reserved_3[34];     /* 0x005a */
 120         u16 videocontrol;       /* 0x009e */
 121         u16 reserved_4[176];    /* 0x00a0 */
 122         struct ihs_osd osd;     /* 0x0200 */
 123         u16 reserved_5[761];    /* 0x020e */
 124         u16 videomem;           /* 0x0800 */
 125 };
 126 #endif
 127
 128 #endif