nand_spl/nand_boot.c

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18  * MA 02111-1307 USA
  19  */
  20
  21 #include <common.h>
  22 #include <nand.h>
  23 #include <asm/io.h>
  24
  25 #define CONFIG_SYS_NAND_READ_DELAY \
  26         { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
  27
  28 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
  29
  30 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
  31 /*
  32  * NAND command for small page NAND devices (512)
  33  */
  34 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
  35 {
  36         struct nand_chip *this = mtd->priv;
  37         int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
  38
  39         if (this->dev_ready)
  40                 while (!this->dev_ready(mtd))
  41                         ;
  42         else
  43                 CONFIG_SYS_NAND_READ_DELAY;
  44
  45         /* Begin command latch cycle */
  46         this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  47         /* Set ALE and clear CLE to start address cycle */
  48         /* Column address */
  49         this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
  50         this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
  51         this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
  52                        NAND_CTRL_ALE); /* A[24:17] */
  53 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
  54         /* One more address cycle for devices > 32MiB */
  55         this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
  56                        NAND_CTRL_ALE); /* A[28:25] */
  57 #endif
  58         /* Latch in address */
  59         this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  60
  61         /*
  62          * Wait a while for the data to be ready
  63          */
  64         if (this->dev_ready)
  65                 while (!this->dev_ready(mtd))
  66                         ;
  67         else
  68                 CONFIG_SYS_NAND_READ_DELAY;
  69
  70         return 0;
  71 }
  72 #else
  73 /*
  74  * NAND command for large page NAND devices (2k)
  75  */
  76 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
  77 {
  78         struct nand_chip *this = mtd->priv;
  79         int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
  80
  81         if (this->dev_ready)
  82                 while (!this->dev_ready(mtd))
  83                         ;
  84         else
  85                 CONFIG_SYS_NAND_READ_DELAY;
  86
  87         /* Emulate NAND_CMD_READOOB */
  88         if (cmd == NAND_CMD_READOOB) {
  89                 offs += CONFIG_SYS_NAND_PAGE_SIZE;
  90                 cmd = NAND_CMD_READ0;
  91         }
  92
  93         /* Shift the offset from byte addressing to word addressing. */
  94         if (this->options & NAND_BUSWIDTH_16)
  95                 offs >>= 1;
  96
  97         /* Begin command latch cycle */
  98         this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  99         /* Set ALE and clear CLE to start address cycle */
 100         /* Column address */
 101         this->cmd_ctrl(mtd, offs & 0xff,
 102                        NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
 103         this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
 104         /* Row address */
 105         this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
 106         this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff),
 107                        NAND_CTRL_ALE); /* A[27:20] */
 108 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
 109         /* One more address cycle for devices > 128MiB */
 110         this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
 111                        NAND_CTRL_ALE); /* A[31:28] */
 112 #endif
 113         /* Latch in address */
 114         this->cmd_ctrl(mtd, NAND_CMD_READSTART,
 115                        NAND_CTRL_CLE | NAND_CTRL_CHANGE);
 116         this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
 117
 118         /*
 119          * Wait a while for the data to be ready
 120          */
 121         if (this->dev_ready)
 122                 while (!this->dev_ready(mtd))
 123                         ;
 124         else
 125                 CONFIG_SYS_NAND_READ_DELAY;
 126
 127         return 0;
 128 }
 129 #endif
 130
 131 static int nand_is_bad_block(struct mtd_info *mtd, int block)
 132 {
 133         struct nand_chip *this = mtd->priv;
 134
 135         nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
 136
 137         /*
 138          * Read one byte
 139          */
 140         if (readb(this->IO_ADDR_R) != 0xff)
 141                 return 1;
 142
 143         return 0;
 144 }
 145
 146 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
 147 {
 148         struct nand_chip *this = mtd->priv;
 149         u_char *ecc_calc;
 150         u_char *ecc_code;
 151         u_char *oob_data;
 152         int i;
 153         int eccsize = CONFIG_SYS_NAND_ECCSIZE;
 154         int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
 155         int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
 156         uint8_t *p = dst;
 157         int stat;
 158
 159         nand_command(mtd, block, page, 0, NAND_CMD_READ0);
 160
 161         /* No malloc available for now, just use some temporary locations
 162          * in SDRAM
 163          */
 164         ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
 165         ecc_code = ecc_calc + 0x100;
 166         oob_data = ecc_calc + 0x200;
 167
 168         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 169                 this->ecc.hwctl(mtd, NAND_ECC_READ);
 170                 this->read_buf(mtd, p, eccsize);
 171                 this->ecc.calculate(mtd, p, &ecc_calc[i]);
 172         }
 173         this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
 174
 175         /* Pick the ECC bytes out of the oob data */
 176         for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
 177                 ecc_code[i] = oob_data[nand_ecc_pos[i]];
 178
 179         eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
 180         p = dst;
 181
 182         for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 183                 /* No chance to do something with the possible error message
 184                  * from correct_data(). We just hope that all possible errors
 185                  * are corrected by this routine.
 186                  */
 187                 stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
 188         }
 189
 190         return 0;
 191 }
 192
 193 static int nand_load(struct mtd_info *mtd, unsigned int offs,
 194                      unsigned int uboot_size, uchar *dst)
 195 {
 196         unsigned int block, lastblock;
 197         unsigned int page;
 198
 199         /*
 200          * offs has to be aligned to a page address!
 201          */
 202         block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
 203         lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
 204         page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
 205
 206         while (block <= lastblock) {
 207                 if (!nand_is_bad_block(mtd, block)) {
 208                         /*
 209                          * Skip bad blocks
 210                          */
 211                         while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
 212                                 nand_read_page(mtd, block, page, dst);
 213                                 dst += CONFIG_SYS_NAND_PAGE_SIZE;
 214                                 page++;
 215                         }
 216
 217                         page = 0;
 218                 } else {
 219                         lastblock++;
 220                 }
 221
 222                 block++;
 223         }
 224
 225         return 0;
 226 }
 227
 228 /*
 229  * The main entry for NAND booting. It's necessary that SDRAM is already
 230  * configured and available since this code loads the main U-Boot image
 231  * from NAND into SDRAM and starts it from there.
 232  */
 233 void nand_boot(void)
 234 {
 235         struct nand_chip nand_chip;
 236         nand_info_t nand_info;
 237         int ret;
 238         __attribute__((noreturn)) void (*uboot)(void);
 239
 240         /*
 241          * Init board specific nand support
 242          */
 243         nand_chip.select_chip = NULL;
 244         nand_info.priv = &nand_chip;
 245         nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void  __iomem *)CONFIG_SYS_NAND_BASE;
 246         nand_chip.dev_ready = NULL;     /* preset to NULL */
 247         board_nand_init(&nand_chip);
 248
 249         if (nand_chip.select_chip)
 250                 nand_chip.select_chip(&nand_info, 0);
 251
 252         /*
 253          * Load U-Boot image from NAND into RAM
 254          */
 255         ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
 256                         (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
 257
 258 #ifdef CONFIG_NAND_ENV_DST
 259         nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 260                   (uchar *)CONFIG_NAND_ENV_DST);
 261
 262 #ifdef CONFIG_ENV_OFFSET_REDUND
 263         nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
 264                   (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
 265 #endif
 266 #endif
 267
 268         if (nand_chip.select_chip)
 269                 nand_chip.select_chip(&nand_info, -1);
 270
 271         /*
 272          * Jump to U-Boot image
 273          */
 274         uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 275         (*uboot)();
 276 }