arm: mx5: clock: add support for changing CPU clock via cmdline
[karo-tx-uboot.git] / nand_spl / nand_boot_fsl_elbc.c
1 /*
2  * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
3  *
4  * (C) Copyright 2006-2008
5  * Stefan Roese, DENX Software Engineering, sr@denx.de.
6  *
7  * Copyright (c) 2008 Freescale Semiconductor, Inc.
8  * Author: Scott Wood <scottwood@freescale.com>
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #include <common.h>
14 #include <asm/io.h>
15 #include <asm/fsl_lbc.h>
16 #include <linux/mtd/nand.h>
17
18 #define WINDOW_SIZE 8192
19
20 static void nand_wait(void)
21 {
22         fsl_lbc_t *regs = LBC_BASE_ADDR;
23
24         for (;;) {
25                 uint32_t status = in_be32(&regs->ltesr);
26
27                 if (status == 1)
28                         return;
29
30                 if (status & 1) {
31                         puts("read failed (ltesr)\n");
32                         for (;;);
33                 }
34         }
35 }
36
37 static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
38 {
39         fsl_lbc_t *regs = LBC_BASE_ADDR;
40         uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
41         const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
42         const int block_shift = large ? 17 : 14;
43         const int block_size = 1 << block_shift;
44         const int page_size = large ? 2048 : 512;
45         const int bad_marker = large ? page_size + 0 : page_size + 5;
46         int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
47         int pos = 0;
48
49         if (offs & (block_size - 1)) {
50                 puts("bad offset\n");
51                 for (;;);
52         }
53
54         if (large) {
55                 fmr |= FMR_ECCM;
56                 __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
57                         (NAND_CMD_READSTART << FCR_CMD1_SHIFT),
58                         &regs->fcr);
59                 __raw_writel(
60                         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
61                         (FIR_OP_CA  << FIR_OP1_SHIFT) |
62                         (FIR_OP_PA  << FIR_OP2_SHIFT) |
63                         (FIR_OP_CW1 << FIR_OP3_SHIFT) |
64                         (FIR_OP_RBW << FIR_OP4_SHIFT),
65                         &regs->fir);
66         } else {
67                 __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, &regs->fcr);
68                 __raw_writel(
69                         (FIR_OP_CW0 << FIR_OP0_SHIFT) |
70                         (FIR_OP_CA  << FIR_OP1_SHIFT) |
71                         (FIR_OP_PA  << FIR_OP2_SHIFT) |
72                         (FIR_OP_RBW << FIR_OP3_SHIFT),
73                         &regs->fir);
74         }
75
76         __raw_writel(0, &regs->fbcr);
77
78         while (pos < uboot_size) {
79                 int i = 0;
80                 __raw_writel(offs >> block_shift, &regs->fbar);
81
82                 do {
83                         int j;
84                         unsigned int page_offs = (offs & (block_size - 1)) << 1;
85
86                         __raw_writel(~0, &regs->ltesr);
87                         __raw_writel(0, &regs->lteatr);
88                         __raw_writel(page_offs, &regs->fpar);
89                         __raw_writel(fmr, &regs->fmr);
90                         sync();
91                         __raw_writel(0, &regs->lsor);
92                         nand_wait();
93
94                         page_offs %= WINDOW_SIZE;
95
96                         /*
97                          * If either of the first two pages are marked bad,
98                          * continue to the next block.
99                          */
100                         if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
101                                 puts("skipping\n");
102                                 offs = (offs + block_size) & ~(block_size - 1);
103                                 pos &= ~(block_size - 1);
104                                 break;
105                         }
106
107                         for (j = 0; j < page_size; j++)
108                                 dst[pos + j] = buf[page_offs + j];
109
110                         pos += page_size;
111                         offs += page_size;
112                 } while ((offs & (block_size - 1)) && (pos < uboot_size));
113         }
114 }
115
116 /*
117  * The main entry for NAND booting. It's necessary that SDRAM is already
118  * configured and available since this code loads the main U-Boot image
119  * from NAND into SDRAM and starts it from there.
120  */
121 void nand_boot(void)
122 {
123         __attribute__((noreturn)) void (*uboot)(void);
124
125         /*
126          * Load U-Boot image from NAND into RAM
127          */
128         nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
129                   (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
130
131         /*
132          * Jump to U-Boot image
133          */
134         puts("transfering control\n");
135         /*
136          * Clean d-cache and invalidate i-cache, to
137          * make sure that no stale data is executed.
138          */
139         flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
140         uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
141         uboot();
142 }