patches/0035-ENGR00116083-Recovery-mode-support-for-Android-on-m.patch

   1 From c1383a7a5b47035bf08809bf973536af16047640 Mon Sep 17 00:00:00 2001
   2 From: Terry Lv <r65388@freescale.com>
   3 Date: Sun, 30 Aug 2009 22:04:05 +0800
   4 Subject: [PATCH] ENGR00116083: Recovery mode support for Android on mx51.
   5
   6 Recovery mode support for Android on mx51.
   7
   8 Signed-off-by: Terry Lv <r65388@freescale.com>
   9 ---
  10  Makefile                                  |    2 +
  11  board/freescale/imx51/imx51.c             |   98 +++++
  12  board/freescale/mx51_3stack/mx51_3stack.c |  108 +++++-
  13  drivers/input/Makefile                    |    1 +
  14  drivers/input/mxc_keyb.c                  |  598 +++++++++++++++++++++++++++++
  15  drivers/mtd/nand/mxc_nand.c               |    2 +-
  16  include/asm-arm/arch-mx51/keypad.h        |   65 ++++
  17  include/configs/imx51.h                   |    6 +-
  18  include/configs/imx51_android.h           |  297 ++++++++++++++
  19  include/configs/mx25_3stack.h             |    4 +-
  20  include/configs/mx35_3stack.h             |    2 +-
  21  include/configs/mx51_3stack.h             |   35 ++-
  22  include/configs/mx51_3stack_android.h     |  289 ++++++++++++++
  23  include/mxc_keyb.h                        |  201 ++++++++++
  24  14 files changed, 1695 insertions(+), 13 deletions(-)
  25
  26 diff --git a/Makefile b/Makefile
  27 index 840bfe7..b131cc7 100644
  28 --- a/Makefile
  29 +++ b/Makefile
  30 @@ -3242,9 +3242,11 @@ mx35_3stack_config      \
  31  mx35_3stack_mmc_config: unconfig
  32         @$(MKCONFIG) $(@:_config=) arm arm1136 mx35_3stack freescale mx35
  33
  34 +imx51_android_config   \
  35  imx51_config           : unconfig
  36         @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 imx51 freescale mx51
  37
  38 +mx51_3stack_android_config     \
  39  mx51_3stack_config     : unconfig
  40         @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx51_3stack freescale mx51
  41
  42 diff --git a/board/freescale/imx51/imx51.c b/board/freescale/imx51/imx51.c
  43 index c8efa0f..364f224 100644
  44 --- a/board/freescale/imx51/imx51.c
  45 +++ b/board/freescale/imx51/imx51.c
  46 @@ -29,6 +29,8 @@
  47  #include <asm/arch/iomux.h>
  48  #include <asm/errno.h>
  49  #include <i2c.h>
  50 +#include <mxc_keyb.h>
  51 +#include <asm/arch/keypad.h>
  52  #include "board-imx51.h"
  53  #include <asm/arch/imx_spi.h>
  54  #include <asm/arch/imx_spi_pmic.h>
  55 @@ -457,6 +459,24 @@ int sdhc_init(void)
  56
  57  #endif
  58
  59 +#if defined(CONFIG_MXC_KPD)
  60 +int setup_mxc_kpd()
  61 +{
  62 +       mxc_request_iomux(MX51_PIN_KEY_COL0, IOMUX_CONFIG_ALT0);
  63 +       mxc_request_iomux(MX51_PIN_KEY_COL1, IOMUX_CONFIG_ALT0);
  64 +       mxc_request_iomux(MX51_PIN_KEY_COL2, IOMUX_CONFIG_ALT0);
  65 +       mxc_request_iomux(MX51_PIN_KEY_COL3, IOMUX_CONFIG_ALT0);
  66 +       mxc_request_iomux(MX51_PIN_KEY_COL4, IOMUX_CONFIG_ALT0);
  67 +       mxc_request_iomux(MX51_PIN_KEY_COL5, IOMUX_CONFIG_ALT0);
  68 +       mxc_request_iomux(MX51_PIN_KEY_ROW0, IOMUX_CONFIG_ALT0);
  69 +       mxc_request_iomux(MX51_PIN_KEY_ROW1, IOMUX_CONFIG_ALT0);
  70 +       mxc_request_iomux(MX51_PIN_KEY_ROW2, IOMUX_CONFIG_ALT0);
  71 +       mxc_request_iomux(MX51_PIN_KEY_ROW3, IOMUX_CONFIG_ALT0);
  72 +
  73 +       return 0;
  74 +}
  75 +#endif
  76 +
  77  int board_init(void)
  78  {
  79         setup_soc_rev();
  80 @@ -474,7 +494,85 @@ int board_init(void)
  81  #ifdef BOARD_LATE_INIT
  82  int board_late_init(void)
  83  {
  84 +#if defined(CONFIG_FSL_ANDROID) && defined(CONFIG_MXC_KPD)
  85 +       struct kpp_key_info key_info = {0, 0};
  86 +       int switch_delay = CONFIG_ANDROID_BOOTMOD_DELAY;
  87 +       int state = 0, boot_mode_switch = 0;
  88 +#endif
  89 +
  90         power_init();
  91 +
  92 +#if defined(CONFIG_FSL_ANDROID) && defined(CONFIG_MXC_KPD)
  93 +       mxc_kpp_init();
  94 +
  95 +       puts("Press home + power to enter recovery mode ...\n");
  96 +
  97 +       while ((switch_delay > 0) && (!boot_mode_switch)) {
  98 +               int i;
  99 +
 100 +               --switch_delay;
 101 +               /* delay 100 * 10ms */
 102 +               for (i = 0; !boot_mode_switch && i < 100; ++i) {
 103 +                       /* A state machine to scan home + power key */
 104 +                       /* Check for home + power */
 105 +                       if (mxc_kpp_getc(&key_info)) {
 106 +                               switch (state) {
 107 +                               case 0:
 108 +                                       /* First press */
 109 +                                       if (TEST_HOME_KEY_DEPRESS(key_info.val, key_info.evt)) {
 110 +                                               /* Press Home */
 111 +                                               state = 1;
 112 +                                       } else if (TEST_POWER_KEY_DEPRESS(key_info.val, key_info.evt)) {
 113 +                                               state = 2;
 114 +                                       } else {
 115 +                                               state = 0;
 116 +                                       }
 117 +                                       break;
 118 +                               case 1:
 119 +                                       /* Home is already pressed, try to detect Power */
 120 +                                       if (TEST_POWER_KEY_DEPRESS(key_info.val,
 121 +                                                   key_info.evt)) {
 122 +                                               boot_mode_switch = 1;
 123 +                                       } else {
 124 +                                           if (TEST_HOME_KEY_DEPRESS(key_info.val,
 125 +                                                       key_info.evt))
 126 +                                               state = 1;
 127 +                                           else
 128 +                                               state = 0;
 129 +                                       }
 130 +                                       break;
 131 +                               case 2:
 132 +                                       /* Power is already pressed, try to detect Home */
 133 +                                       if (TEST_HOME_KEY_DEPRESS(key_info.val,
 134 +                                                   key_info.evt)) {
 135 +                                               boot_mode_switch = 1;
 136 +                                       } else {
 137 +                                               if (TEST_POWER_KEY_DEPRESS(key_info.val,
 138 +                                                           key_info.evt))
 139 +                                                       state = 2;
 140 +                                               else
 141 +                                                       state = 0;
 142 +                                       }
 143 +                                       break;
 144 +                               default:
 145 +                                       break;
 146 +                               }
 147 +
 148 +                               if (1 == boot_mode_switch) {
 149 +                                       printf("Boot mode switched to recovery mode!\n");
 150 +                                       /* Set env to recovery mode */
 151 +                                       setenv("bootargs_android", CONFIG_ANDROID_RECOVERY_BOOTARGS);
 152 +                                       setenv("bootcmd_android", CONFIG_ANDROID_RECOVERY_BOOTCMD);
 153 +                                       setenv("bootcmd", "run bootcmd_android");
 154 +                                       break;
 155 +                               }
 156 +                       }
 157 +               }
 158 +               for (i = 0; i < 100; ++i)
 159 +                       udelay(10000);
 160 +       }
 161 +#endif
 162 +
 163         return 0;
 164  }
 165  #endif
 166 diff --git a/board/freescale/mx51_3stack/mx51_3stack.c b/board/freescale/mx51_3stack/mx51_3stack.c
 167 index 9ddee40..3d8756e 100644
 168 --- a/board/freescale/mx51_3stack/mx51_3stack.c
 169 +++ b/board/freescale/mx51_3stack/mx51_3stack.c
 170 @@ -29,6 +29,8 @@
 171  #include <asm/arch/mx51_pins.h>
 172  #include <asm/arch/iomux.h>
 173  #include <i2c.h>
 174 +#include <mxc_keyb.h>
 175 +#include <asm/arch/keypad.h>
 176  #include "board-mx51_3stack.h"
 177
 178  DECLARE_GLOBAL_DATA_PTR;
 179 @@ -175,6 +177,84 @@ int board_init(void)
 180  #ifdef BOARD_LATE_INIT
 181  int board_late_init(void)
 182  {
 183 +#if defined(CONFIG_FSL_ANDROID) && defined(CONFIG_MXC_KPD)
 184 +       struct kpp_key_info key_info = {0, 0};
 185 +       int switch_delay = CONFIG_ANDROID_BOOTMOD_DELAY;
 186 +       int state = 0, boot_mode_switch = 0;
 187 +#endif
 188 +
 189 +
 190 +#if defined(CONFIG_FSL_ANDROID) && defined(CONFIG_MXC_KPD)
 191 +       mxc_kpp_init();
 192 +
 193 +       puts("Press home + power to enter recovery mode ...\n");
 194 +
 195 +       while ((switch_delay > 0) && (!boot_mode_switch)) {
 196 +               int i;
 197 +
 198 +               --switch_delay;
 199 +               /* delay 100 * 10ms */
 200 +               for (i = 0; !boot_mode_switch && i < 100; ++i) {
 201 +                       /* A state machine to scan home + power key */
 202 +                       /* Check for home + power */
 203 +                       if (mxc_kpp_getc(&key_info)) {
 204 +                               switch (state) {
 205 +                               case 0:
 206 +                                       /* First press */
 207 +                                       if (TEST_HOME_KEY_DEPRESS(key_info.val, key_info.evt)) {
 208 +                                               /* Press Home */
 209 +                                               state = 1;
 210 +                                       } else if (TEST_POWER_KEY_DEPRESS(key_info.val, key_info.evt)) {
 211 +                                               state = 2;
 212 +                                       } else {
 213 +                                               state = 0;
 214 +                                       }
 215 +                                       break;
 216 +                               case 1:
 217 +                                       /* Home is already pressed, try to detect Power */
 218 +                                       if (TEST_POWER_KEY_DEPRESS(key_info.val,
 219 +                                                   key_info.evt)) {
 220 +                                               boot_mode_switch = 1;
 221 +                                       } else {
 222 +                                           if (TEST_HOME_KEY_DEPRESS(key_info.val,
 223 +                                                       key_info.evt))
 224 +                                               state = 2;
 225 +                                           else
 226 +                                               state = 0;
 227 +                                       }
 228 +                                       break;
 229 +                               case 2:
 230 +                                       /* Power is already pressed, try to detect Home */
 231 +                                       if (TEST_HOME_KEY_DEPRESS(key_info.val,
 232 +                                                   key_info.evt)) {
 233 +                                               boot_mode_switch = 1;
 234 +                                       } else {
 235 +                                               if (TEST_POWER_KEY_DEPRESS(key_info.val,
 236 +                                                           key_info.evt))
 237 +                                                       state = 1;
 238 +                                               else
 239 +                                                       state = 0;
 240 +                                       }
 241 +                                       break;
 242 +                               default:
 243 +                                       break;
 244 +                               }
 245 +
 246 +                               if (1 == boot_mode_switch) {
 247 +                                       printf("Boot mode switched to recovery mode!\n");
 248 +                                       /* Set env to recovery mode */
 249 +                                       setenv("bootargs_android", CONFIG_ANDROID_RECOVERY_BOOTARGS);
 250 +                                       setenv("bootcmd_android", CONFIG_ANDROID_RECOVERY_BOOTCMD);
 251 +                                       setenv("bootcmd", "run bootcmd_android");
 252 +                                       break;
 253 +                               }
 254 +                       }
 255 +               }
 256 +               for (i = 0; i < 100; ++i)
 257 +                       udelay(10000);
 258 +       }
 259 +#endif
 260 +
 261         return 0;
 262  }
 263  #endif
 264 @@ -182,6 +262,15 @@ int board_late_init(void)
 265  int checkboard(void)
 266  {
 267         printf("Board: MX51 3STACK [");
 268 +
 269 +       if (system_rev & CHIP_REV_2_0) {
 270 +               printf("2.0 [");
 271 +       } else if (system_rev & CHIP_REV_1_1) {
 272 +               printf("1.1 [");
 273 +       } else {
 274 +               printf("1.0 [");
 275 +       }
 276 +
 277         switch (__REG(SRC_BASE_ADDR + 0x8)) {
 278         case 0x0001:
 279                 printf("POR");
 280 @@ -216,7 +305,6 @@ int board_eth_init(bd_t *bis)
 281  int sdhc_init(void)
 282  {
 283         u32 interface_esdhc = 0;
 284 -       u32 pad_val = 0;
 285         s32 status = 0;
 286
 287         interface_esdhc = (readl(SRC_BASE_ADDR + 0x4) & (0x00180000)) >> 19;
 288 @@ -288,3 +376,21 @@ int sdhc_init(void)
 289  }
 290
 291  #endif
 292 +
 293 +#if defined(CONFIG_MXC_KPD)
 294 +int setup_mxc_kpd()
 295 +{
 296 +       mxc_request_iomux(MX51_PIN_KEY_COL0, IOMUX_CONFIG_ALT0);
 297 +       mxc_request_iomux(MX51_PIN_KEY_COL1, IOMUX_CONFIG_ALT0);
 298 +       mxc_request_iomux(MX51_PIN_KEY_COL2, IOMUX_CONFIG_ALT0);
 299 +       mxc_request_iomux(MX51_PIN_KEY_COL3, IOMUX_CONFIG_ALT0);
 300 +       mxc_request_iomux(MX51_PIN_KEY_COL4, IOMUX_CONFIG_ALT0);
 301 +       mxc_request_iomux(MX51_PIN_KEY_COL5, IOMUX_CONFIG_ALT0);
 302 +       mxc_request_iomux(MX51_PIN_KEY_ROW0, IOMUX_CONFIG_ALT0);
 303 +       mxc_request_iomux(MX51_PIN_KEY_ROW1, IOMUX_CONFIG_ALT0);
 304 +       mxc_request_iomux(MX51_PIN_KEY_ROW2, IOMUX_CONFIG_ALT0);
 305 +       mxc_request_iomux(MX51_PIN_KEY_ROW3, IOMUX_CONFIG_ALT0);
 306 +
 307 +       return 0;
 308 +}
 309 +#endif
 310 diff --git a/drivers/input/Makefile b/drivers/input/Makefile
 311 index 9a14407..fcf9643 100644
 312 --- a/drivers/input/Makefile
 313 +++ b/drivers/input/Makefile
 314 @@ -30,6 +30,7 @@ ifdef CONFIG_PS2KBD
 315  COBJS-y += keyboard.o pc_keyb.o
 316  COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 317  endif
 318 +COBJS-${CONFIG_MXC_KPD} += mxc_keyb.o
 319
 320  COBJS  := $(COBJS-y)
 321  SRCS   := $(COBJS:.o=.c)
 322 diff --git a/drivers/input/mxc_keyb.c b/drivers/input/mxc_keyb.c
 323 new file mode 100644
 324 index 0000000..8682b79
 325 --- /dev/null
 326 +++ b/drivers/input/mxc_keyb.c
 327 @@ -0,0 +1,598 @@
 328 +/*
 329 + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
 330 + */
 331 +
 332 +/*
 333 + * The code contained herein is licensed under the GNU General Public
 334 + * License. You may obtain a copy of the GNU General Public License
 335 + * Version 2 or later at the following locations:
 336 + *
 337 + * http://www.opensource.org/licenses/gpl-license.html
 338 + * http://www.gnu.org/copyleft/gpl.html
 339 + */
 340 +
 341 +/*!
 342 + * @file mxc_keyb.c
 343 + *
 344 + * @brief Driver for the Freescale Semiconductor MXC keypad port.
 345 + *
 346 + * The keypad driver is designed as a standard Input driver which interacts
 347 + * with low level keypad port hardware. Upon opening, the Keypad driver
 348 + * initializes the keypad port. When the keypad interrupt happens the driver
 349 + * calles keypad polling timer and scans the keypad matrix for key
 350 + * press/release. If all key press/release happened it comes out of timer and
 351 + * waits for key press interrupt. The scancode for key press and release events
 352 + * are passed to Input subsytem.
 353 + *
 354 + * @ingroup keypad
 355 + */
 356 +
 357 +#include <asm/io.h>
 358 +#include <common.h>
 359 +#include <asm/errno.h>
 360 +#include <asm/arch/keypad.h>
 361 +#include <linux/types.h>
 362 +#include <malloc.h>
 363 +
 364 +/*
 365 + *  * Module header file
 366 + *   */
 367 +#include <mxc_keyb.h>
 368 +
 369 +/*!
 370 + * Comment KPP_DEBUG to disable debug messages
 371 + */
 372 +
 373 +#undef KPP_DEBUG
 374 +
 375 +#ifdef KPP_DEBUG
 376 +#define        KPP_PRINTF(fmt, args...)        printf(fmt , ##args)
 377 +
 378 +static void mxc_kpp_dump_regs()
 379 +{
 380 +       unsigned short t1, t2, t3;
 381 +
 382 +       t1 = __raw_readw(KPCR);
 383 +       t2 = __raw_readw(KPSR);
 384 +       t3 = __raw_readw(KDDR);
 385 +       /*
 386 +       KPP_PRINTF("KPCR=0x%04x, KPSR=0x%04x, KDDR=0x%04x\n",
 387 +               t1, t2, t3);
 388 +               */
 389 +}
 390 +#else
 391 +#define KPP_PRINTF(fmt, args...)
 392 +#endif
 393 +
 394 +static u16 mxc_key_mapping[] = CONFIG_MXC_KEYMAPPING;
 395 +
 396 +/*!
 397 + * This structure holds the keypad private data structure.
 398 + */
 399 +static struct keypad_priv kpp_dev;
 400 +
 401 +/*! Indicates if the key pad device is enabled. */
 402 +
 403 +/*! This static variable indicates whether a key event is pressed/released. */
 404 +static unsigned short KPress;
 405 +
 406 +/*! cur_rcmap and prev_rcmap array is used to detect key press and release. */
 407 +static unsigned short *cur_rcmap;      /* max 64 bits (8x8 matrix) */
 408 +static unsigned short *prev_rcmap;
 409 +
 410 +/*!
 411 + * Debounce polling period(10ms) in system ticks.
 412 + */
 413 +static unsigned short KScanRate = (10 * CONFIG_SYS_HZ) / 1000;
 414 +
 415 +/*!
 416 + * These arrays are used to store press and release scancodes.
 417 + */
 418 +static short **press_scancode;
 419 +static short **release_scancode;
 420 +
 421 +static const unsigned short *mxckpd_keycodes;
 422 +static unsigned short mxckpd_keycodes_size;
 423 +
 424 +/*!
 425 + * These functions are used to configure and the GPIO pins for keypad to
 426 + * activate and deactivate it.
 427 + */
 428 +extern void setup_mxc_kpd(void);
 429 +
 430 +/*!
 431 + * This function is called to scan the keypad matrix to find out the key press
 432 + * and key release events. Make scancode and break scancode are generated for
 433 + * key press and key release events.
 434 + *
 435 + * The following scanning sequence are done for
 436 + * keypad row and column scanning,
 437 + * -# Write 1's to KPDR[15:8], setting column data to 1's
 438 + * -# Configure columns as totem pole outputs(for quick discharging of keypad
 439 + * capacitance)
 440 + * -# Configure columns as open-drain
 441 + * -# Write a single column to 0, others to 1.
 442 + * -# Sample row inputs and save data. Multiple key presses can be detected on
 443 + * a single column.
 444 + * -# Repeat steps the above steps for remaining columns.
 445 + * -# Return all columns to 0 in preparation for standby mode.
 446 + * -# Clear KPKD and KPKR status bit(s) by writing to a 1,
 447 + *    Set the KPKR synchronizer chain by writing "1" to KRSS register,
 448 + *    Clear the KPKD synchronizer chain by writing "1" to KDSC register
 449 + *
 450 + * @result    Number of key pressed/released.
 451 + */
 452 +static int mxc_kpp_scan_matrix()
 453 +{
 454 +       unsigned short reg_val;
 455 +       int col, row;
 456 +       short scancode = 0;
 457 +       int keycnt = 0;         /* How many keys are still pressed */
 458 +
 459 +       /*
 460 +        * wmb() linux kernel function which guarantees orderings in write
 461 +        * operations
 462 +        */
 463 +       /* wmb(); */
 464 +
 465 +       /* save cur keypad matrix to prev */
 466 +       memcpy(prev_rcmap, cur_rcmap, kpp_dev.kpp_rows * sizeof(prev_rcmap[0]));
 467 +       memset(cur_rcmap, 0, kpp_dev.kpp_rows * sizeof(cur_rcmap[0]));
 468 +
 469 +       for (col = 0; col < kpp_dev.kpp_cols; col++) {  /* Col */
 470 +               /* 2. Write 1.s to KPDR[15:8] setting column data to 1.s */
 471 +               reg_val = __raw_readw(KPDR);
 472 +               reg_val |= 0xff00;
 473 +               __raw_writew(reg_val, KPDR);
 474 +
 475 +               /*
 476 +                * 3. Configure columns as totem pole outputs(for quick
 477 +                * discharging of keypad capacitance)
 478 +                */
 479 +               reg_val = __raw_readw(KPCR);
 480 +               reg_val &= 0x00ff;
 481 +               __raw_writew(reg_val, KPCR);
 482 +
 483 +               udelay(2);
 484 +
 485 +#ifdef KPP_DEBUG
 486 +               mxc_kpp_dump_regs();
 487 +#endif
 488 +
 489 +               /*
 490 +                * 4. Configure columns as open-drain
 491 +                */
 492 +               reg_val = __raw_readw(KPCR);
 493 +               reg_val |= ((1 << kpp_dev.kpp_cols) - 1) << 8;
 494 +               __raw_writew(reg_val, KPCR);
 495 +
 496 +               /*
 497 +                * 5. Write a single column to 0, others to 1.
 498 +                * 6. Sample row inputs and save data. Multiple key presses
 499 +                * can be detected on a single column.
 500 +                * 7. Repeat steps 2 - 6 for remaining columns.
 501 +                */
 502 +
 503 +               /* Col bit starts at 8th bit in KPDR */
 504 +               reg_val = __raw_readw(KPDR);
 505 +               reg_val &= ~(1 << (8 + col));
 506 +               __raw_writew(reg_val, KPDR);
 507 +
 508 +               /* Delay added to avoid propagating the 0 from column to row
 509 +                * when scanning. */
 510 +
 511 +               udelay(5);
 512 +
 513 +#ifdef KPP_DEBUG
 514 +               mxc_kpp_dump_regs();
 515 +#endif
 516 +
 517 +               /* Read row input */
 518 +               reg_val = __raw_readw(KPDR);
 519 +               for (row = 0; row < kpp_dev.kpp_rows; row++) {  /* sample row */
 520 +                       if (TEST_BIT(reg_val, row) == 0) {
 521 +                               cur_rcmap[row] = BITSET(cur_rcmap[row], col);
 522 +                               keycnt++;
 523 +                       }
 524 +               }
 525 +       }
 526 +
 527 +       /*
 528 +        * 8. Return all columns to 0 in preparation for standby mode.
 529 +        * 9. Clear KPKD and KPKR status bit(s) by writing to a .1.,
 530 +        * set the KPKR synchronizer chain by writing "1" to KRSS register,
 531 +        * clear the KPKD synchronizer chain by writing "1" to KDSC register
 532 +        */
 533 +       reg_val = 0x00;
 534 +       __raw_writew(reg_val, KPDR);
 535 +       reg_val = __raw_readw(KPDR);
 536 +       reg_val = __raw_readw(KPSR);
 537 +       reg_val |= KBD_STAT_KPKD | KBD_STAT_KPKR | KBD_STAT_KRSS |
 538 +           KBD_STAT_KDSC;
 539 +       __raw_writew(reg_val, KPSR);
 540 +
 541 +#ifdef KPP_DEBUG
 542 +       mxc_kpp_dump_regs();
 543 +#endif
 544 +
 545 +       /* Check key press status change */
 546 +
 547 +       /*
 548 +        * prev_rcmap array will contain the previous status of the keypad
 549 +        * matrix.  cur_rcmap array will contains the present status of the
 550 +        * keypad matrix. If a bit is set in the array, that (row, col) bit is
 551 +        * pressed, else it is not pressed.
 552 +        *
 553 +        * XORing these two variables will give us the change in bit for
 554 +        * particular row and column.  If a bit is set in XOR output, then that
 555 +        * (row, col) has a change of status from the previous state.  From
 556 +        * the diff variable the key press and key release of row and column
 557 +        * are found out.
 558 +        *
 559 +        * If the key press is determined then scancode for key pressed
 560 +        * can be generated using the following statement:
 561 +        *    scancode = ((row * 8) + col);
 562 +        *
 563 +        * If the key release is determined then scancode for key release
 564 +        * can be generated using the following statement:
 565 +        *    scancode = ((row * 8) + col) + MXC_KEYRELEASE;
 566 +        */
 567 +       for (row = 0; row < kpp_dev.kpp_rows; row++) {
 568 +               unsigned char diff;
 569 +
 570 +               /*
 571 +                * Calculate the change in the keypad row status
 572 +                */
 573 +               diff = prev_rcmap[row] ^ cur_rcmap[row];
 574 +
 575 +               for (col = 0; col < kpp_dev.kpp_cols; col++) {
 576 +                       if ((diff >> col) & 0x1) {
 577 +                               /* There is a status change on col */
 578 +                               if ((prev_rcmap[row] & BITSET(0, col)) == 0) {
 579 +                                       /*
 580 +                                        * Previous state is 0, so now
 581 +                                        * a key is pressed
 582 +                                        */
 583 +                                       scancode =
 584 +                                           ((row * kpp_dev.kpp_cols) +
 585 +                                            col);
 586 +                                       KPress = 1;
 587 +                                       kpp_dev.iKeyState = KStateUp;
 588 +
 589 +                                       KPP_PRINTF("Press   (%d, %d) scan=%d "
 590 +                                                "Kpress=%d\n",
 591 +                                                row, col, scancode, KPress);
 592 +                                       press_scancode[row][col] =
 593 +                                           (short)scancode;
 594 +                               } else {
 595 +                                       /*
 596 +                                        * Previous state is not 0, so
 597 +                                        * now a key is released
 598 +                                        */
 599 +                                       scancode =
 600 +                                           (row * kpp_dev.kpp_cols) +
 601 +                                           col + MXC_KEYRELEASE;
 602 +                                       KPress = 0;
 603 +                                       kpp_dev.iKeyState = KStateDown;
 604 +
 605 +                                       KPP_PRINTF
 606 +                                           ("Release (%d, %d) scan=%d Kpress=%d\n",
 607 +                                            row, col, scancode, KPress);
 608 +                                       release_scancode[row][col] =
 609 +                                           (short)scancode;
 610 +                                       keycnt++;
 611 +                               }
 612 +                       }
 613 +               }
 614 +       }
 615 +
 616 +       return keycnt;
 617 +}
 618 +
 619 +static int mxc_kpp_reset()
 620 +{
 621 +       unsigned short reg_val;
 622 +       int i;
 623 +
 624 +       /*
 625 +       * Stop scanning and wait for interrupt.
 626 +       * Enable press interrupt and disable release interrupt.
 627 +       */
 628 +       __raw_writew(0x00FF, KPDR);
 629 +       reg_val = __raw_readw(KPSR);
 630 +       reg_val |= (KBD_STAT_KPKR | KBD_STAT_KPKD);
 631 +       reg_val |= KBD_STAT_KRSS | KBD_STAT_KDSC;
 632 +       __raw_writew(reg_val, KPSR);
 633 +       reg_val |= KBD_STAT_KDIE;
 634 +       reg_val &= ~KBD_STAT_KRIE;
 635 +       __raw_writew(reg_val, KPSR);
 636 +
 637 +#ifdef KPP_DEBUG
 638 +       mxc_kpp_dump_regs();
 639 +#endif
 640 +
 641 +       /*
 642 +       * No more keys pressed... make sure unwanted key codes are
 643 +       * not given upstairs
 644 +       */
 645 +       for (i = 0; i < kpp_dev.kpp_rows; i++) {
 646 +               memset(press_scancode[i], -1,
 647 +                       sizeof(press_scancode[0][0]) * kpp_dev.kpp_cols);
 648 +               memset(release_scancode[i], -1,
 649 +                       sizeof(release_scancode[0][0]) *
 650 +                       kpp_dev.kpp_cols);
 651 +       }
 652 +
 653 +       return 0;
 654 +}
 655 +
 656 +int mxc_kpp_getc(struct kpp_key_info *key_info)
 657 +{
 658 +       int col, row;
 659 +       static int key_cnt;
 660 +       unsigned short reg_val;
 661 +       short scancode = 0;
 662 +
 663 +       reg_val = __raw_readw(KPSR);
 664 +
 665 +       if (!key_cnt) {
 666 +               if (reg_val & KBD_STAT_KPKD) {
 667 +                       /*
 668 +                       * Disable key press(KDIE status bit) interrupt
 669 +                       */
 670 +                       reg_val &= ~KBD_STAT_KDIE;
 671 +                       __raw_writew(reg_val, KPSR);
 672 +
 673 +#ifdef KPP_DEBUG
 674 +                       mxc_kpp_dump_regs();
 675 +#endif
 676 +
 677 +                       key_cnt = mxc_kpp_scan_matrix();
 678 +               } else {
 679 +                       return 0;
 680 +               }
 681 +       }
 682 +
 683 +       /*
 684 +       * This switch case statement is the
 685 +       * implementation of state machine of debounc
 686 +       * logic for key press/release.
 687 +       * The explaination of state machine is as
 688 +       * follows:
 689 +       *
 690 +       * KStateUp State:
 691 +       * This is in intial state of the state machine
 692 +       * this state it checks for any key presses.
 693 +       * The key press can be checked using the
 694 +       * variable KPress. If KPress is set, then key
 695 +       * press is identified and switches the to
 696 +       * KStateFirstDown state for key press to
 697 +       * debounce.
 698 +       *
 699 +       * KStateFirstDown:
 700 +       * After debounce delay(10ms), if the KPress is
 701 +       * still set then pass scancode generated to
 702 +       * input device and change the state to
 703 +       * KStateDown, else key press debounce is not
 704 +       * satisfied so change the state to KStateUp.
 705 +       *
 706 +       * KStateDown:
 707 +       * In this state it checks for any key release.
 708 +       * If KPress variable is cleared, then key
 709 +       * release is indicated and so, switch the
 710 +       * state to KStateFirstUp else to state
 711 +       * KStateDown.
 712 +       *
 713 +       * KStateFirstUp:
 714 +       * After debounce delay(10ms), if the KPress is
 715 +       * still reset then pass the key release
 716 +       * scancode to input device and change
 717 +       * the state to KStateUp else key release is
 718 +       * not satisfied so change the state to
 719 +       * KStateDown.
 720 +       */
 721 +
 722 +       for (row = 0; row < kpp_dev.kpp_rows; row++) {
 723 +               for (col = 0; col < kpp_dev.kpp_cols; col++) {
 724 +                       if ((press_scancode[row][col] != -1)) {
 725 +                               /* Still Down, so add scancode */
 726 +                               scancode =
 727 +                                   press_scancode[row][col];
 728 +
 729 +                               key_info->val = mxckpd_keycodes[scancode];
 730 +                               key_info->evt = KDepress;
 731 +
 732 +                               KPP_PRINTF("KStateFirstDown: scan=%d val=%d\n",
 733 +                                       scancode, mxckpd_keycodes[scancode]);
 734 +                               kpp_dev.iKeyState = KStateDown;
 735 +                               press_scancode[row][col] = -1;
 736 +
 737 +                               goto key_detect;
 738 +                       }
 739 +               }
 740 +       }
 741 +
 742 +       for (row = 0; row < kpp_dev.kpp_rows; row++) {
 743 +               for (col = 0; col < kpp_dev.kpp_cols; col++) {
 744 +                       if ((release_scancode[row][col] != -1)) {
 745 +                               scancode =
 746 +                                   release_scancode[row][col];
 747 +                               scancode =
 748 +                                       scancode - MXC_KEYRELEASE;
 749 +
 750 +                               key_info->val = mxckpd_keycodes[scancode];
 751 +                               key_info->evt = KRelease;
 752 +
 753 +                               KPP_PRINTF("KStateFirstUp: scan=%d val=%d\n",
 754 +                                       scancode, mxckpd_keycodes[scancode]);
 755 +
 756 +                               kpp_dev.iKeyState = KStateUp;
 757 +                               release_scancode[row][col] = -1;
 758 +
 759 +                               goto key_detect;
 760 +                       }
 761 +               }
 762 +       }
 763 +
 764 +       return 0;
 765 +
 766 +key_detect:
 767 +       /* udelay(KScanRate); */
 768 +       key_cnt = mxc_kpp_scan_matrix();
 769 +
 770 +       if (0 == key_cnt)
 771 +               mxc_kpp_reset();
 772 +       return 1;
 773 +}
 774 +
 775 +/*!
 776 + * This function is called to free the allocated memory for local arrays
 777 + */
 778 +static void mxc_kpp_free_allocated(void)
 779 +{
 780 +       int i;
 781 +
 782 +       if (press_scancode) {
 783 +               for (i = 0; i < kpp_dev.kpp_rows; i++) {
 784 +                       if (press_scancode[i])
 785 +                               free(press_scancode[i]);
 786 +               }
 787 +               free(press_scancode);
 788 +       }
 789 +
 790 +       if (release_scancode) {
 791 +               for (i = 0; i < kpp_dev.kpp_rows; i++) {
 792 +                       if (release_scancode[i])
 793 +                               free(release_scancode[i]);
 794 +               }
 795 +               free(release_scancode);
 796 +       }
 797 +
 798 +       if (cur_rcmap)
 799 +               free(cur_rcmap);
 800 +
 801 +       if (prev_rcmap)
 802 +               free(prev_rcmap);
 803 +}
 804 +
 805 +/*!
 806 + * This function is called during the driver binding process.
 807 + *
 808 + * @param   pdev  the device structure used to store device specific
 809 + *                information that is used by the suspend, resume and remove
 810 + *                functions.
 811 + *
 812 + * @return  The function returns 0 on successful registration. Otherwise returns
 813 + *          specific error code.
 814 + */
 815 +int mxc_kpp_init()
 816 +{
 817 +       int i;
 818 +       int retval;
 819 +       unsigned int reg_val;
 820 +
 821 +       kpp_dev.kpp_cols = CONFIG_MXC_KPD_COLMAX;
 822 +       kpp_dev.kpp_rows = CONFIG_MXC_KPD_ROWMAX;
 823 +
 824 +       /* clock and IOMUX configuration for keypad */
 825 +       setup_mxc_kpd();
 826 +
 827 +       /* Configure keypad */
 828 +
 829 +       /* Enable number of rows in keypad (KPCR[7:0])
 830 +        * Configure keypad columns as open-drain (KPCR[15:8])
 831 +        *
 832 +        * Configure the rows/cols in KPP
 833 +        * LSB nibble in KPP is for 8 rows
 834 +        * MSB nibble in KPP is for 8 cols
 835 +        */
 836 +       reg_val = __raw_readw(KPCR);
 837 +       reg_val |= (1  << kpp_dev.kpp_rows) - 1;        /* LSB */
 838 +       reg_val |= ((1 << kpp_dev.kpp_cols) - 1) << 8;  /* MSB */
 839 +       __raw_writew(reg_val, KPCR);
 840 +
 841 +       /* Write 0's to KPDR[15:8] */
 842 +       reg_val = __raw_readw(KPDR);
 843 +       reg_val &= 0x00ff;
 844 +       __raw_writew(reg_val, KPDR);
 845 +
 846 +       /* Configure columns as output,
 847 +        * rows as input (KDDR[15:0]) */
 848 +       reg_val = __raw_readw(KDDR);
 849 +       reg_val |= 0xff00;
 850 +       reg_val &= 0xff00;
 851 +       __raw_writew(reg_val, KDDR);
 852 +
 853 +       /* Clear the KPKD Status Flag
 854 +        * and Synchronizer chain. */
 855 +       reg_val = __raw_readw(KPSR);
 856 +       reg_val &= ~(KBD_STAT_KPKR | KBD_STAT_KPKD);
 857 +       reg_val |= KBD_STAT_KPKD;
 858 +       reg_val |= KBD_STAT_KRSS | KBD_STAT_KDSC;
 859 +       __raw_writew(reg_val, KPSR);
 860 +       /* Set the KDIE control bit, and clear the KRIE
 861 +        * control bit (avoid false release events). */
 862 +       reg_val |= KBD_STAT_KDIE;
 863 +       reg_val &= ~KBD_STAT_KRIE;
 864 +       __raw_writew(reg_val, KPSR);
 865 +
 866 +#ifdef KPP_DEBUG
 867 +       mxc_kpp_dump_regs();
 868 +#endif
 869 +
 870 +       mxckpd_keycodes = mxc_key_mapping;
 871 +       mxckpd_keycodes_size = kpp_dev.kpp_cols * kpp_dev.kpp_rows;
 872 +
 873 +       if ((mxckpd_keycodes == (void *)0)
 874 +           || (mxckpd_keycodes_size == 0)) {
 875 +               retval = -ENODEV;
 876 +               goto err;
 877 +       }
 878 +
 879 +       /* allocate required memory */
 880 +       press_scancode   = (short **)malloc(kpp_dev.kpp_rows * sizeof(press_scancode[0]));
 881 +       release_scancode = (short **)malloc(kpp_dev.kpp_rows * sizeof(release_scancode[0]));
 882 +
 883 +       if (!press_scancode || !release_scancode) {
 884 +               retval = -ENOMEM;
 885 +               goto err;
 886 +       }
 887 +
 888 +       for (i = 0; i < kpp_dev.kpp_rows; i++) {
 889 +               press_scancode[i] = (short *)malloc(kpp_dev.kpp_cols
 890 +                                           * sizeof(press_scancode[0][0]));
 891 +               release_scancode[i] =
 892 +                   (short *)malloc(kpp_dev.kpp_cols * sizeof(release_scancode[0][0]));
 893 +
 894 +               if (!press_scancode[i] || !release_scancode[i]) {
 895 +                       retval = -ENOMEM;
 896 +                       goto err;
 897 +               }
 898 +       }
 899 +
 900 +       cur_rcmap =
 901 +           (unsigned short *)malloc(kpp_dev.kpp_rows * sizeof(cur_rcmap[0]));
 902 +       prev_rcmap =
 903 +           (unsigned short *)malloc(kpp_dev.kpp_rows * sizeof(prev_rcmap[0]));
 904 +
 905 +       if (!cur_rcmap || !prev_rcmap) {
 906 +               retval = -ENOMEM;
 907 +               goto err;
 908 +       }
 909 +
 910 +       for (i = 0; i < kpp_dev.kpp_rows; i++) {
 911 +               memset(press_scancode[i], -1,
 912 +                      sizeof(press_scancode[0][0]) * kpp_dev.kpp_cols);
 913 +               memset(release_scancode[i], -1,
 914 +                      sizeof(release_scancode[0][0]) * kpp_dev.kpp_cols);
 915 +       }
 916 +       memset(cur_rcmap, 0, kpp_dev.kpp_rows * sizeof(cur_rcmap[0]));
 917 +       memset(prev_rcmap, 0, kpp_dev.kpp_rows * sizeof(prev_rcmap[0]));
 918 +
 919 +       return 0;
 920 +
 921 +err:
 922 +       mxc_kpp_free_allocated();
 923 +       return retval;
 924 +}
 925 +
 926 diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
 927 index f6dd23b..cf27c66 100644
 928 --- a/drivers/mtd/nand/mxc_nand.c
 929 +++ b/drivers/mtd/nand/mxc_nand.c
 930 @@ -547,7 +547,7 @@ static u16 mxc_do_status_auto(struct mtd_info *mtd)
 931                  */
 932                 do {
 933                         raw_write(NFC_AUTO_STATE, REG_NFC_OPS);
 934 -               #ifdef CONFIG_MX51
 935 +               #if defined(CONFIG_MX51_3DS) || defined(CONFIG_MX51_BBG)
 936                         /* mx51to2 NFC need wait the op done */
 937                         if (is_soc_rev(CHIP_REV_2_0) == 0)
 938                                 wait_op_done(TROP_US_DELAY);
 939 diff --git a/include/asm-arm/arch-mx51/keypad.h b/include/asm-arm/arch-mx51/keypad.h
 940 new file mode 100644
 941 index 0000000..23ae4fe
 942 --- /dev/null
 943 +++ b/include/asm-arm/arch-mx51/keypad.h
 944 @@ -0,0 +1,65 @@
 945 +/*
 946 + * (C) Copyright 2009 Freescale Semiconductor, Inc.
 947 + *
 948 + * Configuration settings for the MX51-3Stack Freescale board.
 949 + *
 950 + * This program is free software; you can redistribute it and/or
 951 + * modify it under the terms of the GNU General Public License as
 952 + * published by the Free Software Foundation; either version 2 of
 953 + * the License, or (at your option) any later version.
 954 + *
 955 + * This program is distributed in the hope that it will be useful,
 956 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 957 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 958 + * GNU General Public License for more details.
 959 + *
 960 + * You should have received a copy of the GNU General Public License
 961 + * along with this program; if not, write to the Free Software
 962 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 963 + * MA 02111-1307 USA
 964 + */
 965 +
 966 +#ifndef _MXC_KEYPAD_H_
 967 +#define _MXC_KEYPAD_H_
 968 +
 969 +#include <config.h>
 970 +
 971 +#define KEY_1                   2
 972 +#define KEY_2                   3
 973 +#define KEY_3                   4
 974 +#define KEY_F1                  59
 975 +#define KEY_UP                  103
 976 +#define KEY_F2                  60
 977 +
 978 +#define KEY_4                   5
 979 +#define KEY_5                   6
 980 +#define KEY_6                   7
 981 +#define KEY_LEFT                105
 982 +#define KEY_SELECT              0x161
 983 +#define KEY_RIGHT               106
 984 +
 985 +#define KEY_7                   8
 986 +#define KEY_8                   9
 987 +#define KEY_9                   10
 988 +#define KEY_F3                  61
 989 +#define KEY_DOWN                108
 990 +#define KEY_F4                  62
 991 +
 992 +#define KEY_0                   11
 993 +#define KEY_OK                  0x160
 994 +#define KEY_ESC                 1
 995 +#define KEY_ENTER               28
 996 +#define KEY_MENU                139     /* Menu (show menu) */
 997 +#define KEY_BACK                158     /* AC Back */
 998 +
 999 +#if defined(CONFIG_MX51_BBG)
1000 +#define TEST_HOME_KEY_DEPRESS(k, e)  (((k) == (KEY_F1)) && (((e) == (KDepress))))
1001 +#define TEST_POWER_KEY_DEPRESS(k, e) (((k) == (KEY_RIGHT)) && (((e) == (KDepress))))
1002 +#elif defined(CONFIG_MX51_3DS)
1003 +#define TEST_HOME_KEY_DEPRESS(k, e)  (((k) == (KEY_MENU)) && (((e) == (KDepress))))
1004 +#define TEST_POWER_KEY_DEPRESS(k, e) (((k) == (KEY_F2)) && (((e) == (KDepress))))
1005 +#else
1006 +# error Undefined board type!
1007 +#endif
1008 +
1009 +#endif
1010 diff --git a/include/configs/imx51.h b/include/configs/imx51.h
1011 index 8d81fff..23347d1 100644
1012 --- a/include/configs/imx51.h
1013 +++ b/include/configs/imx51.h
1014 @@ -32,7 +32,7 @@
1015  #define CONFIG_L2_OFF
1016
1017  #define CONFIG_MXC             1
1018 -#define CONFIG_MX51            1       /* in a mx51 */
1019 +#define CONFIG_MX51_BBG                1       /* in a mx51 */
1020  #define CONFIG_FLASH_HEADER    1
1021  #define CONFIG_FLASH_HEADER_OFFSET 0x400
1022  #define CONFIG_FLASH_HEADER_BARKER 0xB1
1023 @@ -244,11 +244,11 @@
1024         #define CONFIG_ENV_OFFSET       0x100000
1025  #elif defined(CONFIG_FSL_ENV_IN_MMC)
1026         #define CONFIG_ENV_IS_IN_MMC    1
1027 -       #define CONFIG_ENV_OFFSET       (1024 * 1024)
1028 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1029  #elif defined(CONFIG_FSL_ENV_IN_SF)
1030         #define CONFIG_ENV_IS_IN_SPI_FLASH      1
1031         #define CONFIG_ENV_SPI_CS               1
1032 -       #define CONFIG_ENV_OFFSET       (1024 * 1024)
1033 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1034  #else
1035         #define CONFIG_ENV_IS_NOWHERE   1
1036  #endif
1037 diff --git a/include/configs/imx51_android.h b/include/configs/imx51_android.h
1038 new file mode 100644
1039 index 0000000..55bcfbf
1040 --- /dev/null
1041 +++ b/include/configs/imx51_android.h
1042 @@ -0,0 +1,297 @@
1043 +/*
1044 + * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
1045 + *
1046 + * (C) Copyright 2009 Freescale Semiconductor, Inc.
1047 + *
1048 + * Configuration settings for the MX51-3Stack Freescale board.
1049 + *
1050 + * This program is free software; you can redistribute it and/or
1051 + * modify it under the terms of the GNU General Public License as
1052 + * published by the Free Software Foundation; either version 2 of
1053 + * the License, or (at your option) any later version.
1054 + *
1055 + * This program is distributed in the hope that it will be useful,
1056 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1057 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
1058 + * GNU General Public License for more details.
1059 + *
1060 + * You should have received a copy of the GNU General Public License
1061 + * along with this program; if not, write to the Free Software
1062 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1063 + * MA 02111-1307 USA
1064 + */
1065 +
1066 +#ifndef __CONFIG_H
1067 +#define __CONFIG_H
1068 +
1069 +#include <asm/arch/mx51.h>
1070 +
1071 + /* High Level Configuration Options */
1072 +#define CONFIG_ARMV7           1       /* This is armv7 Cortex-A8 CPU core */
1073 +#define CONFIG_SYS_APCS_GNU
1074 +#define CONFIG_L2_OFF
1075 +
1076 +#define CONFIG_MXC             1
1077 +#define CONFIG_MX51_BBG                1       /* in a mx51 */
1078 +#define CONFIG_FLASH_HEADER    1
1079 +#define CONFIG_FLASH_HEADER_OFFSET 0x400
1080 +#define CONFIG_FLASH_HEADER_BARKER 0xB1
1081 +
1082 +#define CONFIG_SKIP_RELOCATE_UBOOT
1083 +
1084 +#define CONFIG_MX51_HCLK_FREQ  24000000        /* RedBoot says 26MHz */
1085 +#define CONFIG_MX51_CLK32      32768
1086 +#define CONFIG_DISPLAY_CPUINFO
1087 +#define CONFIG_DISPLAY_BOARDINFO
1088 +
1089 +#define BOARD_LATE_INIT
1090 +/*
1091 + * Disabled for now due to build problems under Debian and a significant
1092 + * increase in the final file size: 144260 vs. 109536 Bytes.
1093 + */
1094 +
1095 +#define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
1096 +#define CONFIG_REVISION_TAG            1
1097 +#define CONFIG_SETUP_MEMORY_TAGS       1
1098 +#define CONFIG_INITRD_TAG              1
1099 +
1100 +/*
1101 + * Size of malloc() pool
1102 + */
1103 +#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
1104 +/* size in bytes reserved for initial data */
1105 +#define CONFIG_SYS_GBL_DATA_SIZE       128
1106 +
1107 +/*
1108 + * Hardware drivers
1109 + */
1110 +#define CONFIG_MX51_UART       1
1111 +#define CONFIG_MX51_UART1      1
1112 +
1113 +/*
1114 + * SPI Configs
1115 + * */
1116 +#define CONFIG_FSL_SF          1
1117 +#define CONFIG_CMD_SPI
1118 +#define CONFIG_CMD_SF
1119 +#define CONFIG_SPI_FLASH_IMX_ATMEL     1
1120 +#define CONFIG_SPI_FLASH_CS    1
1121 +#define CONFIG_IMX_SPI
1122 +#define CONFIG_IMX_SPI_PMIC
1123 +#define CONFIG_IMX_SPI_PMIC_CS 0
1124 +
1125 +#define MAX_SPI_BYTES          (64 * 4)
1126 +
1127 +/*
1128 + * MMC Configs
1129 + * */
1130 +#define CONFIG_FSL_MMC         1
1131 +
1132 +#define CONFIG_MMC              1
1133 +#define CONFIG_CMD_MMC
1134 +#define CONFIG_DOS_PARTITION   1
1135 +#define CONFIG_CMD_FAT         1
1136 +#define CONFIG_MMC_BASE         0x0
1137 +
1138 +/*
1139 + * Eth Configs
1140 + */
1141 +#define CONFIG_HAS_ETH1
1142 +#define CONFIG_NET_MULTI 1
1143 +#define CONFIG_MXC_FEC
1144 +#define CONFIG_MII
1145 +#define CONFIG_DISCOVER_PHY
1146 +
1147 +#define CONFIG_FEC0_IOBASE     FEC_BASE_ADDR
1148 +#define CONFIG_FEC0_PINMUX     -1
1149 +#define CONFIG_FEC0_PHY_ADDR   0x1F
1150 +#define CONFIG_FEC0_MIIBASE    -1
1151 +
1152 +#define CONFIG_CMD_PING
1153 +#define CONFIG_CMD_DHCP
1154 +#define CONFIG_CMD_MII
1155 +#define CONFIG_CMD_NET
1156 +
1157 +/*
1158 + * Android support Configs
1159 + */
1160 +#include <asm/arch/keypad.h>
1161 +
1162 +#define CONFIG_FSL_ANDROID
1163 +
1164 +#define CONFIG_MXC_KPD
1165 +#define CONFIG_MXC_KEYMAPPING \
1166 +       {       \
1167 +               KEY_1, KEY_2, KEY_3, KEY_F1, KEY_UP, KEY_F2, \
1168 +               KEY_4, KEY_5, KEY_6, KEY_LEFT, KEY_SELECT, KEY_RIGHT, \
1169 +               KEY_7, KEY_8, KEY_9, KEY_F3, KEY_DOWN, KEY_F4, \
1170 +               KEY_0, KEY_OK, KEY_ESC, KEY_ENTER, KEY_MENU, KEY_BACK, \
1171 +       }
1172 +/*
1173 +       {       \
1174 +               KEY_3,         KEY_2,        KEY_0, KEY_OK, KEY_ESC, KEY_ENTER,
1175 +               KEY_F1, KEY_4, KEY_6, KEY_5,
1176 +               KEY_LEFT,      KEY_1,        KEY_ , KEY_8,  KEY_9,   KEY_RIGHT,
1177 +       }
1178 +       */
1179 +#define CONFIG_MXC_KPD_COLMAX 4
1180 +#define CONFIG_MXC_KPD_ROWMAX 4
1181 +#define CONFIG_ANDROID_NORMAL_BOOTARGS "ip=dhcp mem=480M init=/init wvga calibration"
1182 +#define CONFIG_ANDROID_RECOVERY_BOOTARGS "setenv bootargs ${bootargs} root=/dev/mmcblk0p4 ip=dhcp init=/init rootfstype=ext3 wvga"
1183 +#define CONFIG_ANDROID_RECOVERY_BOOTCMD  "run bootargs_base bootargs_android;mmcinit;cp.b 0x100000 ${loadaddr} 0x250000;bootm"
1184 +#define CONFIG_ANDROID_BOOTMOD_DELAY 3
1185 +
1186 +/* allow to overwrite serial and ethaddr */
1187 +#define CONFIG_ENV_OVERWRITE
1188 +#define CONFIG_CONS_INDEX              1
1189 +#define CONFIG_BAUDRATE                        115200
1190 +#define CONFIG_SYS_BAUDRATE_TABLE      {9600, 19200, 38400, 57600, 115200}
1191 +
1192 +/***********************************************************
1193 + * Command definition
1194 + ***********************************************************/
1195 +
1196 +#include <config_cmd_default.h>
1197 +
1198 +#define CONFIG_CMD_PING
1199 +#define CONFIG_CMD_DHCP
1200 +/* Enable below configure when supporting nand */
1201 +/* #define CONFIG_CMD_NAND */
1202 +#define CONFIG_CMD_ENV
1203 +
1204 +#undef CONFIG_CMD_IMLS
1205 +
1206 +#define CONFIG_BOOTDELAY       3
1207 +
1208 +#define CONFIG_PRIME   "FEC0"
1209 +
1210 +#define CONFIG_LOADADDR                0x90800000      /* loadaddr env var */
1211 +#define CONFIG_RD_LOADADDR     (CONFIG_LOADADDR + 0x300000)
1212 +
1213 +#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
1214 +               "netdev=eth0\0"                                         \
1215 +               "ethprime=FEC0\0"                                       \
1216 +               "uboot_addr=0xa0000000\0"                               \
1217 +               "uboot=u-boot.bin\0"                    \
1218 +               "kernel=uImage\0"                               \
1219 +               "rd_loadaddr=0x90B00000\0"      \
1220 +               "nfsroot=/opt/eldk/arm\0"                               \
1221 +               "bootargs_base=setenv bootargs console=ttymxc0,115200\0"\
1222 +               "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
1223 +                       "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
1224 +               "bootargs_android=setenv bootargs ${bootargs} ip=dhcp mem=480M init=/init wvga calibration\0"   \
1225 +               "bootcmd=run bootcmd_android\0"                         \
1226 +               "bootcmd_net=run bootargs_base bootargs_nfs; "          \
1227 +                       "tftpboot ${loadaddr} ${kernel}; bootm\0"       \
1228 +               "bootcmd_android=run bootargs_base bootargs_android; "  \
1229 +                       "mmcinit;cp.b 0x100000 ${loadaddr} 0x250000; "  \
1230 +                       "cp.b 0x400000 ${rd_loadaddr} 0x4B000; "        \
1231 +                       "bootm ${loadaddr} ${rd_loadaddr}\0"            \
1232 +               "prg_uboot=tftpboot ${loadaddr} ${uboot}; "             \
1233 +                       "protect off ${uboot_addr} 0xa003ffff; "        \
1234 +                       "erase ${uboot_addr} 0xa003ffff; "              \
1235 +                       "cp.b ${loadaddr} ${uboot_addr} ${filesize}; "  \
1236 +                       "setenv filesize; saveenv\0"
1237 +
1238 +/*Support LAN9217*/
1239 +/*
1240 +#define CONFIG_DRIVER_SMC911X  1
1241 +#define CONFIG_DRIVER_SMC911X_16_BIT 1
1242 +#define CONFIG_DRIVER_SMC911X_BASE_VARIABLE mx51_io_base_addr
1243 +*/
1244 +
1245 +/*
1246 + * The MX51 3stack board seems to have a hardware "peculiarity" confirmed under
1247 + * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
1248 + * controller inverted. The controller is capable of detecting and correcting
1249 + * this, but it needs 4 network packets for that. Which means, at startup, you
1250 + * will not receive answers to the first 4 packest, unless there have been some
1251 + * broadcasts on the network, or your board is on a hub. Reducing the ARP
1252 + * timeout from default 5 seconds to 200ms we speed up the initial TFTP
1253 + * transfer, should the user wish one, significantly.
1254 + */
1255 +#define CONFIG_ARP_TIMEOUT     200UL
1256 +
1257 +/*
1258 + * Miscellaneous configurable options
1259 + */
1260 +#define CONFIG_SYS_LONGHELP            /* undef to save memory */
1261 +#define CONFIG_SYS_PROMPT              "BBG U-Boot > "
1262 +#define CONFIG_AUTO_COMPLETE
1263 +#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
1264 +/* Print Buffer Size */
1265 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
1266 +#define CONFIG_SYS_MAXARGS     16      /* max number of command args */
1267 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
1268 +
1269 +#define CONFIG_SYS_MEMTEST_START       0       /* memtest works on */
1270 +#define CONFIG_SYS_MEMTEST_END         0x10000
1271 +
1272 +#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
1273 +
1274 +#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
1275 +
1276 +#define CONFIG_SYS_HZ  CONFIG_MX51_CLK32/* use 32kHz clock as source */
1277 +
1278 +#define CONFIG_CMDLINE_EDITING 1
1279 +
1280 +/*-----------------------------------------------------------------------
1281 + * Stack sizes
1282 + *
1283 + * The stack sizes are set up in start.S using the settings below
1284 + */
1285 +#define CONFIG_STACKSIZE       (128 * 1024)    /* regular stack */
1286 +
1287 +/*-----------------------------------------------------------------------
1288 + * Physical Memory Map
1289 + */
1290 +#define CONFIG_NR_DRAM_BANKS   1
1291 +#define PHYS_SDRAM_1           CSD0_BASE_ADDR
1292 +/* TO1 boards */
1293 +/* #define PHYS_SDRAM_1_SIZE   (128 * 1024 * 1024) */
1294 +#define PHYS_SDRAM_1_SIZE      (512 * 1024 * 1024)
1295 +
1296 +/*-----------------------------------------------------------------------
1297 + * FLASH and environment organization
1298 + */
1299 +#define CONFIG_SYS_NO_FLASH
1300 +
1301 +/*-----------------------------------------------------------------------
1302 + * NAND FLASH driver setup
1303 + */
1304 +#define NAND_MAX_CHIPS         8
1305 +#define CONFIG_SYS_MAX_NAND_DEVICE    1
1306 +#define CONFIG_SYS_NAND_BASE          0x40000000
1307 +
1308 +/* Monitor at beginning of flash */
1309 +#if defined(CONFIG_FSL_SF)
1310 +       #define CONFIG_FSL_ENV_IN_SF
1311 +#elif defined(CONFIG_FSL_MMC)
1312 +       #define CONFIG_FSL_ENV_IN_MMC
1313 +#elif defined(CONFIG_CMD_NAND)
1314 +       #define CONFIG_FSL_ENV_IN_NAND
1315 +#endif
1316 +
1317 +#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
1318 +#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
1319 +
1320 +#if defined(CONFIG_FSL_ENV_IN_NAND)
1321 +       #define CONFIG_ENV_IS_IN_NAND 1
1322 +       #define CONFIG_ENV_OFFSET       0x100000
1323 +#elif defined(CONFIG_FSL_ENV_IN_MMC)
1324 +       #define CONFIG_ENV_IS_IN_MMC    1
1325 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1326 +#elif defined(CONFIG_FSL_ENV_IN_SF)
1327 +       #define CONFIG_ENV_IS_IN_SPI_FLASH      1
1328 +       #define CONFIG_ENV_SPI_CS               1
1329 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1330 +#else
1331 +       #define CONFIG_ENV_IS_NOWHERE   1
1332 +#endif
1333 +/*
1334 + * JFFS2 partitions
1335 + */
1336 +#undef CONFIG_JFFS2_CMDLINE
1337 +#define CONFIG_JFFS2_DEV       "nand0"
1338 +
1339 +#endif                         /* __CONFIG_H */
1340 diff --git a/include/configs/mx25_3stack.h b/include/configs/mx25_3stack.h
1341 index 5e343ea..93e4b9a 100644
1342 --- a/include/configs/mx25_3stack.h
1343 +++ b/include/configs/mx25_3stack.h
1344 @@ -205,11 +205,11 @@
1345         #define CONFIG_ENV_OFFSET       0x80000
1346  #elif defined(CONFIG_FSL_ENV_IN_MMC)
1347         #define CONFIG_ENV_IS_IN_MMC    1
1348 -       #define CONFIG_ENV_OFFSET       0x100000
1349 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1350  #elif defined(CONFIG_FSL_ENV_IN_SF)
1351         #define CONFIG_ENV_IS_IN_SPI_FLASH      1
1352         #define CONFIG_ENV_SPI_CS               1
1353 -       #define CONFIG_ENV_OFFSET               0x100000
1354 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1355  #else
1356         #define CONFIG_ENV_IS_NOWHERE   1
1357  #endif
1358 diff --git a/include/configs/mx35_3stack.h b/include/configs/mx35_3stack.h
1359 index 9939964..b78f48e 100644
1360 --- a/include/configs/mx35_3stack.h
1361 +++ b/include/configs/mx35_3stack.h
1362 @@ -211,7 +211,7 @@
1363
1364  #if defined(CONFIG_FSL_ENV_IN_NAND)
1365         #define CONFIG_ENV_IS_IN_NAND 1
1366 -       #define CONFIG_ENV_OFFSET       0x100000
1367 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1368  #elif defined(CONFIG_FSL_ENV_IS_IN_FLASH)
1369         #define CONFIG_ENV_IS_IN_FLASH  1
1370  #endif
1371 diff --git a/include/configs/mx51_3stack.h b/include/configs/mx51_3stack.h
1372 index 9cb463d..2cee9d6 100644
1373 --- a/include/configs/mx51_3stack.h
1374 +++ b/include/configs/mx51_3stack.h
1375 @@ -3,7 +3,7 @@
1376   *
1377   * (C) Copyright 2009 Freescale Semiconductor, Inc.
1378   *
1379 - * Configuration settings for the MX31ADS Freescale board.
1380 + * Configuration settings for the MX51-3Stack Freescale board.
1381   *
1382   * This program is free software; you can redistribute it and/or
1383   * modify it under the terms of the GNU General Public License as
1384 @@ -32,7 +32,7 @@
1385  #define CONFIG_L2_OFF
1386
1387  #define CONFIG_MXC             1
1388 -#define CONFIG_MX51            1       /* in a mx51 */
1389 +#define CONFIG_MX51_3DS                1       /* in a mx51 */
1390  #define CONFIG_FLASH_HEADER    1
1391  #define CONFIG_FLASH_HEADER_OFFSET 0x400
1392  #define CONFIG_FLASH_HEADER_BARKER 0xB1
1393 @@ -68,6 +68,23 @@
1394  #define CONFIG_MX51_UART       1
1395  #define CONFIG_MX51_UART1      1
1396
1397 +
1398 +/*
1399 + * MMC Configs
1400 + * */
1401 +#define CONFIG_FSL_MMC         1
1402 +
1403 +#define CONFIG_MMC              1
1404 +#define CONFIG_CMD_MMC
1405 +#define CONFIG_DOS_PARTITION   1
1406 +#define CONFIG_CMD_FAT         1
1407 +#define CONFIG_MMC_BASE         0x0
1408 +
1409 +#define CONFIG_CMD_PING
1410 +#define CONFIG_CMD_DHCP
1411 +#define CONFIG_CMD_MII
1412 +#define CONFIG_CMD_NET
1413 +
1414  /* allow to overwrite serial and ethaddr */
1415  #define CONFIG_ENV_OVERWRITE
1416  #define CONFIG_CONS_INDEX      1
1417 @@ -179,10 +196,18 @@
1418  #define CONFIG_SYS_NAND_BASE          0x40000000
1419
1420  /* Monitor at beginning of flash */
1421 -#define CONFIG_ENV_IS_IN_NAND 1
1422 -#define CONFIG_ENV_SECT_SIZE   (1024 * 1024)
1423 +#define CONFIG_FSL_ENV_IN_NAND
1424 +#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
1425  #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
1426 -#define CONFIG_ENV_OFFSET              0x100000
1427 +#if defined(CONFIG_FSL_ENV_IN_NAND)
1428 +       #define CONFIG_ENV_IS_IN_NAND 1
1429 +       #define CONFIG_ENV_OFFSET       0x100000
1430 +#elif defined(CONFIG_FSL_ENV_IN_MMC)
1431 +       #define CONFIG_ENV_IS_IN_MMC    1
1432 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1433 +#else
1434 +       #define CONFIG_ENV_IS_NOWHERE   1
1435 +#endif
1436  /*
1437   * JFFS2 partitions
1438   */
1439 diff --git a/include/configs/mx51_3stack_android.h b/include/configs/mx51_3stack_android.h
1440 new file mode 100644
1441 index 0000000..c4958c0
1442 --- /dev/null
1443 +++ b/include/configs/mx51_3stack_android.h
1444 @@ -0,0 +1,289 @@
1445 +/*
1446 + * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
1447 + *
1448 + * (C) Copyright 2009 Freescale Semiconductor, Inc.
1449 + *
1450 + * Configuration settings for the MX51-3Stack Freescale board.
1451 + *
1452 + * This program is free software; you can redistribute it and/or
1453 + * modify it under the terms of the GNU General Public License as
1454 + * published by the Free Software Foundation; either version 2 of
1455 + * the License, or (at your option) any later version.
1456 + *
1457 + * This program is distributed in the hope that it will be useful,
1458 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1459 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
1460 + * GNU General Public License for more details.
1461 + *
1462 + * You should have received a copy of the GNU General Public License
1463 + * along with this program; if not, write to the Free Software
1464 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1465 + * MA 02111-1307 USA
1466 + */
1467 +
1468 +#ifndef __CONFIG_H
1469 +#define __CONFIG_H
1470 +
1471 +#include <asm/arch/mx51.h>
1472 +#include <asm/arch/keypad.h>
1473 +
1474 + /* High Level Configuration Options */
1475 +#define CONFIG_ARMV7           1       /* This is armv7 Cortex-A8 CPU core */
1476 +#define CONFIG_SYS_APCS_GNU
1477 +#define CONFIG_L2_OFF
1478 +
1479 +#define CONFIG_MXC             1
1480 +#define CONFIG_MX51_3DS                1       /* in a mx51 */
1481 +#define CONFIG_FLASH_HEADER    1
1482 +#define CONFIG_FLASH_HEADER_OFFSET 0x400
1483 +#define CONFIG_FLASH_HEADER_BARKER 0xB1
1484 +
1485 +#define CONFIG_SKIP_RELOCATE_UBOOT
1486 +
1487 +#define CONFIG_MX51_HCLK_FREQ  24000000        /* RedBoot says 26MHz */
1488 +#define CONFIG_MX51_CLK32      32768
1489 +#define CONFIG_DISPLAY_CPUINFO
1490 +#define CONFIG_DISPLAY_BOARDINFO
1491 +
1492 +#define BOARD_LATE_INIT
1493 +/*
1494 + * Disabled for now due to build problems under Debian and a significant
1495 + * increase in the final file size: 144260 vs. 109536 Bytes.
1496 + */
1497 +
1498 +#define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
1499 +#define CONFIG_REVISION_TAG            1
1500 +#define CONFIG_SETUP_MEMORY_TAGS       1
1501 +#define CONFIG_INITRD_TAG              1
1502 +
1503 +/*
1504 + * Size of malloc() pool
1505 + */
1506 +#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
1507 +/* size in bytes reserved for initial data */
1508 +#define CONFIG_SYS_GBL_DATA_SIZE       128
1509 +
1510 +/*
1511 + * Hardware drivers
1512 + */
1513 +#define CONFIG_MX51_UART       1
1514 +#define CONFIG_MX51_UART1      1
1515 +
1516 +/*
1517 + * SPI Configs
1518 + * */
1519 +#define CONFIG_FSL_SF          1
1520 +#define CONFIG_CMD_SPI
1521 +#define CONFIG_CMD_SF
1522 +#define CONFIG_SPI_FLASH_IMX_ATMEL     1
1523 +#define CONFIG_SPI_FLASH_CS    1
1524 +#define CONFIG_IMX_SPI
1525 +#define CONFIG_IMX_SPI_PMIC
1526 +#define CONFIG_IMX_SPI_PMIC_CS 0
1527 +
1528 +#define MAX_SPI_BYTES          (64 * 4)
1529 +
1530 +/*
1531 + * MMC Configs
1532 + * */
1533 +#define CONFIG_FSL_MMC         1
1534 +
1535 +#define CONFIG_MMC              1
1536 +#define CONFIG_CMD_MMC
1537 +#define CONFIG_DOS_PARTITION   1
1538 +#define CONFIG_CMD_FAT         1
1539 +#define CONFIG_MMC_BASE         0x0
1540 +
1541 +/*
1542 + * Eth Configs
1543 + */
1544 +#define CONFIG_HAS_ETH1
1545 +#define CONFIG_NET_MULTI 1
1546 +#define CONFIG_MXC_FEC
1547 +#define CONFIG_MII
1548 +#define CONFIG_DISCOVER_PHY
1549 +
1550 +#define CONFIG_FEC0_IOBASE     FEC_BASE_ADDR
1551 +#define CONFIG_FEC0_PINMUX     -1
1552 +#define CONFIG_FEC0_PHY_ADDR   0x1F
1553 +#define CONFIG_FEC0_MIIBASE    -1
1554 +
1555 +#define CONFIG_CMD_PING
1556 +#define CONFIG_CMD_DHCP
1557 +#define CONFIG_CMD_MII
1558 +#define CONFIG_CMD_NET
1559 +
1560 +/*
1561 + * Android support Configs
1562 + */
1563 +#include <asm/arch/keypad.h>
1564 +
1565 +#define CONFIG_FSL_ANDROID
1566 +
1567 +#define CONFIG_MXC_KPD
1568 +#define CONFIG_MXC_KEYMAPPING \
1569 +       {       \
1570 +               KEY_1, KEY_2, KEY_3, KEY_F1, KEY_UP, KEY_F2, \
1571 +               KEY_4, KEY_5, KEY_6, KEY_LEFT, KEY_SELECT, KEY_RIGHT, \
1572 +               KEY_7, KEY_8, KEY_9, KEY_F3, KEY_DOWN, KEY_F4, \
1573 +               KEY_0, KEY_OK, KEY_ESC, KEY_ENTER, KEY_MENU, KEY_BACK, \
1574 +       }
1575 +#define CONFIG_MXC_KPD_COLMAX 6
1576 +#define CONFIG_MXC_KPD_ROWMAX 4
1577 +#define CONFIG_ANDROID_NORMAL_BOOTARGS "ip=dhcp mem=480M init=/init wvga calibration"
1578 +#define CONFIG_ANDROID_RECOVERY_BOOTARGS "setenv bootargs ${bootargs} root=/dev/mmcblk0p4 ip=dhcp init=/init rootfstype=ext3 wvga"
1579 +#define CONFIG_ANDROID_RECOVERY_BOOTCMD  "run bootargs_base bootargs_android;mmcinit;cp.b 0x100000 ${loadaddr} 0x250000;bootm"
1580 +#define CONFIG_ANDROID_BOOTMOD_DELAY 3
1581 +
1582 +/* allow to overwrite serial and ethaddr */
1583 +#define CONFIG_ENV_OVERWRITE
1584 +#define CONFIG_CONS_INDEX              1
1585 +#define CONFIG_BAUDRATE                        115200
1586 +#define CONFIG_SYS_BAUDRATE_TABLE      {9600, 19200, 38400, 57600, 115200}
1587 +
1588 +/***********************************************************
1589 + * Command definition
1590 + ***********************************************************/
1591 +
1592 +#include <config_cmd_default.h>
1593 +
1594 +#define CONFIG_CMD_PING
1595 +#define CONFIG_CMD_DHCP
1596 +/* Enable below configure when supporting nand */
1597 +#define CONFIG_CMD_NAND
1598 +#define CONFIG_CMD_ENV
1599 +
1600 +#undef CONFIG_CMD_IMLS
1601 +
1602 +#define CONFIG_BOOTDELAY       3
1603 +
1604 +#define CONFIG_PRIME   "FEC0"
1605 +
1606 +#define CONFIG_LOADADDR                0x90800000      /* loadaddr env var */
1607 +#define CONFIG_RD_LOADADDR     (CONFIG_LOADADDR + 0x300000)
1608 +
1609 +#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
1610 +               "netdev=eth0\0"                                         \
1611 +               "ethprime=smc911x\0"                                    \
1612 +               "uboot_addr=0xa0000000\0"                               \
1613 +               "uboot=u-boot.bin\0"                    \
1614 +               "kernel=uImage\0"                               \
1615 +               "rd_loadaddr=0x90B00000\0"
1616 +               "nfsroot=/opt/eldk/arm\0"                               \
1617 +               "bootargs_base=setenv bootargs console=ttymxc0,115200\0"\
1618 +               "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
1619 +                       "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
1620 +               "bootargs_android=setenv bootargs ${bootargs} ip=dhcp mem=480M init=/init wvga calibration\0"   \
1621 +               "bootcmd=run bootcmd_android\0"                         \
1622 +               "bootcmd_net=run bootargs_base bootargs_nfs; "          \
1623 +                       "tftpboot ${loadaddr} ${kernel}; bootm\0"       \
1624 +               "bootcmd_android=run bootargs_base bootargs_android; "  \
1625 +                       "mmcinit;cp.b 0x100000 ${loadaddr} 0x250000; "  \
1626 +                       "cp.b 0x400000 ${rd_loadaddr} 0x4B000; "        \
1627 +                       "bootm ${loadaddr} ${rd_loadaddr}\0"            \
1628 +               "prg_uboot=tftpboot ${loadaddr} ${uboot}; "             \
1629 +                       "protect off ${uboot_addr} 0xa003ffff; "        \
1630 +                       "erase ${uboot_addr} 0xa003ffff; "              \
1631 +                       "cp.b ${loadaddr} ${uboot_addr} ${filesize}; "  \
1632 +                       "setenv filesize; saveenv\0"
1633 +
1634 +/*Support LAN9217*/
1635 +#define CONFIG_DRIVER_SMC911X  1
1636 +#define CONFIG_DRIVER_SMC911X_16_BIT 1
1637 +#define CONFIG_DRIVER_SMC911X_BASE_VARIABLE mx51_io_base_addr
1638 +
1639 +/*
1640 + * The MX51 3stack board seems to have a hardware "peculiarity" confirmed under
1641 + * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
1642 + * controller inverted. The controller is capable of detecting and correcting
1643 + * this, but it needs 4 network packets for that. Which means, at startup, you
1644 + * will not receive answers to the first 4 packest, unless there have been some
1645 + * broadcasts on the network, or your board is on a hub. Reducing the ARP
1646 + * timeout from default 5 seconds to 200ms we speed up the initial TFTP
1647 + * transfer, should the user wish one, significantly.
1648 + */
1649 +#define CONFIG_ARP_TIMEOUT     200UL
1650 +
1651 +/*
1652 + * Miscellaneous configurable options
1653 + */
1654 +#define CONFIG_SYS_LONGHELP            /* undef to save memory */
1655 +#define CONFIG_SYS_PROMPT              "MX51 U-Boot > "
1656 +#define CONFIG_AUTO_COMPLETE
1657 +#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
1658 +/* Print Buffer Size */
1659 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
1660 +#define CONFIG_SYS_MAXARGS     16      /* max number of command args */
1661 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
1662 +
1663 +#define CONFIG_SYS_MEMTEST_START       0       /* memtest works on */
1664 +#define CONFIG_SYS_MEMTEST_END         0x10000
1665 +
1666 +#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
1667 +
1668 +#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
1669 +
1670 +#define CONFIG_SYS_HZ  CONFIG_MX51_CLK32/* use 32kHz clock as source */
1671 +
1672 +#define CONFIG_CMDLINE_EDITING 1
1673 +
1674 +/*-----------------------------------------------------------------------
1675 + * Stack sizes
1676 + *
1677 + * The stack sizes are set up in start.S using the settings below
1678 + */
1679 +#define CONFIG_STACKSIZE       (128 * 1024)    /* regular stack */
1680 +
1681 +/*-----------------------------------------------------------------------
1682 + * Physical Memory Map
1683 + */
1684 +#define CONFIG_NR_DRAM_BANKS   1
1685 +#define PHYS_SDRAM_1           CSD0_BASE_ADDR
1686 +/* TO1 boards */
1687 +/* #define PHYS_SDRAM_1_SIZE   (128 * 1024 * 1024) */
1688 +#define PHYS_SDRAM_1_SIZE      (512 * 1024 * 1024)
1689 +
1690 +/*-----------------------------------------------------------------------
1691 + * FLASH and environment organization
1692 + */
1693 +#define CONFIG_SYS_NO_FLASH
1694 +
1695 +/*-----------------------------------------------------------------------
1696 + * NAND FLASH driver setup
1697 + */
1698 +#define NAND_MAX_CHIPS         8
1699 +#define CONFIG_SYS_MAX_NAND_DEVICE    1
1700 +#define CONFIG_SYS_NAND_BASE          0x40000000
1701 +
1702 +/* Monitor at beginning of flash */
1703 +#if defined(CONFIG_FSL_SF)
1704 +       #define CONFIG_FSL_ENV_IN_SF
1705 +#elif defined(CONFIG_FSL_MMC)
1706 +       #define CONFIG_FSL_ENV_IN_MMC
1707 +#elif defined(CONFIG_CMD_NAND)
1708 +       #define CONFIG_FSL_ENV_IN_NAND
1709 +#endif
1710 +
1711 +#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
1712 +#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
1713 +
1714 +#if defined(CONFIG_FSL_ENV_IN_NAND)
1715 +       #define CONFIG_ENV_IS_IN_NAND 1
1716 +       #define CONFIG_ENV_OFFSET       0x100000
1717 +#elif defined(CONFIG_FSL_ENV_IN_MMC)
1718 +       #define CONFIG_ENV_IS_IN_MMC    1
1719 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1720 +#elif defined(CONFIG_FSL_ENV_IN_SF)
1721 +       #define CONFIG_ENV_IS_IN_SPI_FLASH      1
1722 +       #define CONFIG_ENV_SPI_CS               1
1723 +       #define CONFIG_ENV_OFFSET       (768 * 1024)
1724 +#else
1725 +       #define CONFIG_ENV_IS_NOWHERE   1
1726 +#endif
1727 +/*
1728 + * JFFS2 partitions
1729 + */
1730 +#undef CONFIG_JFFS2_CMDLINE
1731 +#define CONFIG_JFFS2_DEV       "nand0"
1732 +
1733 +#endif                         /* __CONFIG_H */
1734 diff --git a/include/mxc_keyb.h b/include/mxc_keyb.h
1735 new file mode 100644
1736 index 0000000..50c6a20
1737 --- /dev/null
1738 +++ b/include/mxc_keyb.h
1739 @@ -0,0 +1,201 @@
1740 +/*
1741 + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
1742 + */
1743 +
1744 +/*
1745 + * The code contained herein is licensed under the GNU General Public
1746 + * License. You may obtain a copy of the GNU General Public License
1747 + * Version 2 or later at the following locations:
1748 + *
1749 + * http://www.opensource.org/licenses/gpl-license.html
1750 + * http://www.gnu.org/copyleft/gpl.html
1751 + */
1752 +
1753 +/*!
1754 + * @defgroup keypad Keypad Driver
1755 + */
1756 +
1757 +/*!
1758 + * @file mxc_keyb.h
1759 + *
1760 + * @brief MXC keypad header file.
1761 + *
1762 + * @ingroup keypad
1763 + */
1764 +#ifndef __MXC_KEYB_H__
1765 +#define __MXC_KEYB_H__
1766 +
1767 +/*!
1768 + * Keypad Module Name
1769 + */
1770 +#define MOD_NAME  "mxckpd"
1771 +
1772 +/*!
1773 + * Keypad irq number
1774 + */
1775 +#define KPP_IRQ  MXC_INT_KPP
1776 +
1777 +/*!
1778 + * XLATE mode selection
1779 + */
1780 +#define KEYPAD_XLATE        0
1781 +
1782 +/*!
1783 + * RAW mode selection
1784 + */
1785 +#define KEYPAD_RAW          1
1786 +
1787 +/*!
1788 + * Maximum number of keys.
1789 + */
1790 +#define MAXROW                 8
1791 +#define MAXCOL                 8
1792 +#define MXC_MAXKEY             (MAXROW * MAXCOL)
1793 +
1794 +/*!
1795 + * This define indicates break scancode for every key release. A constant
1796 + * of 128 is added to the key press scancode.
1797 + */
1798 +#define  MXC_KEYRELEASE   128
1799 +
1800 +/*
1801 + * _reg_KPP_KPCR   _reg_KPP_KPSR _reg_KPP_KDDR _reg_KPP_KPDR
1802 + * Keypad Control Register Address
1803 + */
1804 +#define KPCR    (KPP_BASE_ADDR + 0x00)
1805 +
1806 +/*
1807 + * Keypad Status Register Address
1808 + */
1809 +#define KPSR    (KPP_BASE_ADDR + 0x02)
1810 +
1811 +/*
1812 + * Keypad Data Direction Address
1813 + */
1814 +#define KDDR    (KPP_BASE_ADDR + 0x04)
1815 +
1816 +/*
1817 + * Keypad Data Register
1818 + */
1819 +#define KPDR    (KPP_BASE_ADDR + 0x06)
1820 +
1821 +/*
1822 + * Key Press Interrupt Status bit
1823 + */
1824 +#define KBD_STAT_KPKD        0x01
1825 +
1826 +/*
1827 + * Key Release Interrupt Status bit
1828 + */
1829 +#define KBD_STAT_KPKR        0x02
1830 +
1831 +/*
1832 + * Key Depress Synchronizer Chain Status bit
1833 + */
1834 +#define KBD_STAT_KDSC        0x04
1835 +
1836 +/*
1837 + * Key Release Synchronizer Status bit
1838 + */
1839 +#define KBD_STAT_KRSS        0x08
1840 +
1841 +/*
1842 + * Key Depress Interrupt Enable Status bit
1843 + */
1844 +#define KBD_STAT_KDIE        0x100
1845 +
1846 +/*
1847 + * Key Release Interrupt Enable
1848 + */
1849 +#define KBD_STAT_KRIE        0x200
1850 +
1851 +/*
1852 + * Keypad Clock Enable
1853 + */
1854 +#define KBD_STAT_KPPEN       0x400
1855 +
1856 +/*!
1857 + * Buffer size of keypad queue. Should be a power of 2.
1858 + */
1859 +#define KPP_BUF_SIZE    128
1860 +
1861 +/*!
1862 + * Test whether bit is set for integer c
1863 + */
1864 +#define TEST_BIT(c, n) ((c) & (0x1 << (n)))
1865 +
1866 +/*!
1867 + * Set nth bit in the integer c
1868 + */
1869 +#define BITSET(c, n)   ((c) | (1 << (n)))
1870 +
1871 +/*!
1872 + * Reset nth bit in the integer c
1873 + */
1874 +#define BITRESET(c, n) ((c) & ~(1 << (n)))
1875 +
1876 +enum KeyEvent {
1877 +       KDepress,
1878 +       KRelease
1879 +};
1880 +
1881 +/*!
1882 + * This enum represents the keypad state machine to maintain debounce logic
1883 + * for key press/release.
1884 + */
1885 +enum KeyState {
1886 +
1887 +       /*!
1888 +        * Key press state.
1889 +        */
1890 +       KStateUp,
1891 +
1892 +       /*!
1893 +        * Key press debounce state.
1894 +        */
1895 +       KStateFirstDown,
1896 +
1897 +       /*!
1898 +        * Key release state.
1899 +        */
1900 +       KStateDown,
1901 +
1902 +       /*!
1903 +        * Key release debounce state.
1904 +        */
1905 +       KStateFirstUp
1906 +};
1907 +
1908 +/*!
1909 + * Keypad Private Data Structure
1910 + */
1911 +typedef struct keypad_priv {
1912 +
1913 +       /*!
1914 +        * Keypad state machine.
1915 +        */
1916 +       enum KeyState iKeyState;
1917 +
1918 +       /*!
1919 +        * Number of rows configured in the keypad matrix
1920 +        */
1921 +       unsigned long kpp_rows;
1922 +
1923 +       /*!
1924 +        * Number of Columns configured in the keypad matrix
1925 +        */
1926 +       unsigned long kpp_cols;
1927 +} keypad_priv;
1928 +
1929 +/*!
1930 + * Keypad Data Structure
1931 + * */
1932 +struct kpp_key_info {
1933 +       enum KeyEvent evt;
1934 +       unsigned short val;
1935 +};
1936 +
1937 +int mxc_kpp_init();
1938 +int mxc_kpp_getc(struct kpp_key_info *);
1939 +
1940 +#endif                         /* __MXC_KEYB_H__ */
1941 --
1942 1.5.4.4
1943