1 From 34bc4951031059ccac23bf13fe261804f075880a Mon Sep 17 00:00:00 2001
2 From: Jason <r64343@freescale.com>
3 Date: Mon, 2 Nov 2009 14:26:36 +0800
4 Subject: [PATCH] ENGR00116772 Workaround for ARM errata ID #468414
6 Workaround for ARM errata ID #468414, This erratum is
7 referenced in ARM Core Cortex-A8 Errata Notice [1], ID 468414.
9 Signed-off-by:Jason Liu <r64343@freescale.com>
10 (cherry picked from commit 549c17b69a5052c61a979ba679bd1dbd33a4153d)
12 board/freescale/mx51_3stack/lowlevel_init.S | 5 +++++
13 board/freescale/mx51_bbg/lowlevel_init.S | 5 +++++
14 2 files changed, 10 insertions(+), 0 deletions(-)
16 diff --git a/board/freescale/mx51_3stack/lowlevel_init.S b/board/freescale/mx51_3stack/lowlevel_init.S
17 index f42cb6e..1710b88 100644
18 --- a/board/freescale/mx51_3stack/lowlevel_init.S
19 +++ b/board/freescale/mx51_3stack/lowlevel_init.S
20 @@ -274,6 +274,11 @@ lowlevel_init:
22 mcr 15, 0, r0, c7, c10, 4 /* Drain the write buffer */
24 + /* ARM errata ID #468414 */
25 + mrc 15, 0, r1, c1, c0, 1
26 + orr r1, r1, #(1 << 5) /* enable L1NEON bit */
27 + mcr 15, 0, r1, c1, c0, 1
32 diff --git a/board/freescale/mx51_bbg/lowlevel_init.S b/board/freescale/mx51_bbg/lowlevel_init.S
33 index b937067..cad0f1c 100644
34 --- a/board/freescale/mx51_bbg/lowlevel_init.S
35 +++ b/board/freescale/mx51_bbg/lowlevel_init.S
36 @@ -292,6 +292,11 @@ lowlevel_init:
37 msr spsr, r1 /* restore old spsr */
40 + /* ARM errata ID #468414 */
41 + mrc 15, 0, r1, c1, c0, 1
42 + orr r1, r1, #(1 << 5) /* enable L1NEON bit */
43 + mcr 15, 0, r1, c1, c0, 1