patches/0108-ENGR00122643-Integrate-linear-PMIC.patch

   1 From 4656abc886843e162f5c2538baffe57135281480 Mon Sep 17 00:00:00 2001
   2 From: Terry Lv <r65388@freescale.com>
   3 Date: Mon, 19 Apr 2010 13:42:33 +0800
   4 Subject: [PATCH] ENGR00122643: Integrate linear PMIC
   5
   6 Integrate linear PMIC.
   7
   8 Signed-off-by: Terry Lv <r65388@freescale.com>
   9 ---
  10  board/freescale/mx51_bbg/mx51_bbg.c |  103 ++++++++++++++++++++++++++++++++++-
  11  include/configs/mx51_bbg.h          |   13 +++++
  12  include/configs/mx51_bbg_android.h  |   11 ++++
  13  include/configs/mx51_bbg_mfg.h      |    3 +
  14  4 files changed, 128 insertions(+), 2 deletions(-)
  15
  16 diff --git a/board/freescale/mx51_bbg/mx51_bbg.c b/board/freescale/mx51_bbg/mx51_bbg.c
  17 index 1d553c1..32bfde8 100644
  18 --- a/board/freescale/mx51_bbg/mx51_bbg.c
  19 +++ b/board/freescale/mx51_bbg/mx51_bbg.c
  20 @@ -60,6 +60,7 @@ DECLARE_GLOBAL_DATA_PTR;
  21
  22  static u32 system_rev;
  23  static enum boot_device boot_dev;
  24 +static u32 voltage_setup;
  25  u32    mx51_io_base_addr;
  26
  27  static inline void setup_boot_device(void)
  28 @@ -306,6 +307,7 @@ static void setup_expio(void)
  29         writew(reg, mx51_io_base_addr + PBC_SW_RESET);
  30  }
  31
  32 +#ifdef CONFIG_IMX_ECSPI
  33  void spi_io_init(struct imx_spi_dev_t *dev)
  34  {
  35         switch (dev->base) {
  36 @@ -347,7 +349,9 @@ void spi_io_init(struct imx_spi_dev_t *dev)
  37                 break;
  38         }
  39  }
  40 +#endif
  41
  42 +#ifdef CONFIG_MXC_FEC
  43  static void setup_fec(void)
  44  {
  45         /*FEC_MDIO*/
  46 @@ -433,13 +437,93 @@ static void setup_fec(void)
  47         writel(0x2180, IOMUXC_BASE_ADDR + 0x054C);
  48         writel(0x0, IOMUXC_BASE_ADDR + 0x096C);
  49  }
  50 +#endif
  51 +
  52 +#ifdef CONFIG_I2C_MXC
  53 +static void setup_i2c(unsigned int module_base)
  54 +{
  55 +       unsigned int reg;
  56 +
  57 +       switch (module_base) {
  58 +       case I2C1_BASE_ADDR:
  59 +               reg = IOMUXC_BASE_ADDR + 0x5c; /* i2c1 SDA */
  60 +               writel(0x14, reg);
  61 +               reg = IOMUXC_BASE_ADDR + 0x3f0;
  62 +               writel(0x10d, reg);
  63 +               reg = IOMUXC_BASE_ADDR + 0x9B4;
  64 +               writel(0x0, reg);
  65 +
  66 +               reg = IOMUXC_BASE_ADDR + 0x68; /* i2c2 SCL */
  67 +               writel(0x14, reg);
  68 +               reg = IOMUXC_BASE_ADDR + 0x3fc;
  69 +               writel(0x10d, reg);
  70 +               reg = IOMUXC_BASE_ADDR + 0x9B0;
  71 +               writel(0x0, reg);
  72 +               break;
  73 +       case I2C2_BASE_ADDR:
  74 +               /* dummy here*/
  75 +               break;
  76 +       default:
  77 +               printf("Invalid I2C base: 0x%x\n", module_base);
  78 +               break;
  79 +       }
  80 +}
  81 +
  82 +static void setup_core_voltage_i2c(void)
  83 +{
  84 +       unsigned int reg;
  85 +       unsigned char buf[1] = { 0 };
  86 +
  87 +       puts("PMIC Mode: linear\n");
  88 +
  89 +       writel(0x0, CCM_BASE_ADDR + CLKCTL_CACRR);
  90 +       reg = readl(GPIO2_BASE_ADDR + 0x0);
  91 +       reg &= ~0x4000;  /* Lower reset line */
  92 +       writel(reg, GPIO2_BASE_ADDR + 0x0);
  93 +
  94 +       reg = readl(GPIO2_BASE_ADDR + 0x4);
  95 +       reg |= 0x4000;  /* configure GPIO lines as output */
  96 +       writel(reg, GPIO2_BASE_ADDR + 0x4);
  97 +
  98 +       /* Reset the ethernet controller over GPIO */
  99 +       writel(0x1, IOMUXC_BASE_ADDR + 0x0AC);
 100 +
 101 +       /*Configure LDO4*/
 102 +       i2c_read(0x34, 0x12, 1, buf, 1);
 103 +       buf[0] = buf[0] | 0x40;
 104 +       if (i2c_write(0x34, 0x12, 1, buf, 1)) {
 105 +               puts("write to PMIC 0x12 failed!\n");
 106 +               return;
 107 +       }
 108 +       i2c_read(0x34, 0x12, 1, buf, 1);
 109 +       printf("PMIC 0x12: 0x%x \n", buf[0]);
 110 +
 111 +       i2c_read(0x34, 0x10, 1, buf, 1);
 112 +       buf[0] = buf[0] | 0x40;
 113 +       if (i2c_write(0x34, 0x10, 1, buf, 1)) {
 114 +               puts("write to PMIC 0x10 failed!\n");
 115 +               return;
 116 +       }
 117 +       i2c_read(0x34, 0x10, 1, buf, 1);
 118 +       printf("PMIC 0x10: 0x%x \n", buf[0]);
 119 +
 120 +       udelay(500);
 121 +
 122 +       reg = readl(GPIO2_BASE_ADDR + 0x0);
 123 +       reg |= 0x4000;
 124 +       writel(reg, GPIO2_BASE_ADDR + 0x0);
 125 +}
 126 +#endif
 127
 128 -static void power_init(void)
 129 +#ifdef CONFIG_IMX_ECSPI
 130 +static void setup_core_voltage_spi(void)
 131  {
 132         struct spi_slave *slave;
 133         unsigned int val;
 134         unsigned int reg;
 135
 136 +       puts("PMIC Mode: SPI\n");
 137 +
 138  #define REV_ATLAS_LITE_1_0         0x8
 139  #define REV_ATLAS_LITE_1_1         0x9
 140  #define REV_ATLAS_LITE_2_0         0x10
 141 @@ -554,6 +638,7 @@ static void power_init(void)
 142
 143         spi_pmic_free(slave);
 144  }
 145 +#endif
 146
 147  #ifdef CONFIG_NET_MULTI
 148
 149 @@ -719,7 +804,13 @@ int board_init(void)
 150         setup_uart();
 151         setup_nfc();
 152         setup_expio();
 153 +#ifdef CONFIG_MXC_FEC
 154         setup_fec();
 155 +#endif
 156 +#ifdef CONFIG_I2C_MXC
 157 +       setup_i2c(I2C1_BASE_ADDR);
 158 +#endif
 159 +
 160         return 0;
 161  }
 162
 163 @@ -916,7 +1007,15 @@ inline int check_recovery_cmd_file(void)
 164
 165  int board_late_init(void)
 166  {
 167 -       power_init();
 168 +#ifdef CONFIG_I2C_MXC
 169 +       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 170 +       if (!i2c_probe(0x34))
 171 +               setup_core_voltage_i2c();
 172 +       else
 173 +#endif
 174 +#ifdef CONFIG_IMX_ECSPI
 175 +               setup_core_voltage_spi();
 176 +#endif
 177
 178  #if defined(CONFIG_FSL_ANDROID) && defined(CONFIG_MXC_KPD)
 179         if (waiting_for_func_key_pressing())
 180 diff --git a/include/configs/mx51_bbg.h b/include/configs/mx51_bbg.h
 181 index 121c7a1..117e506 100644
 182 --- a/include/configs/mx51_bbg.h
 183 +++ b/include/configs/mx51_bbg.h
 184 @@ -95,6 +95,7 @@
 185  #define CONFIG_CMD_SF
 186  #define CONFIG_CMD_MMC
 187  #define CONFIG_CMD_FUSE
 188 +#define CONFIG_CMD_I2C
 189
 190  /*
 191   * FUSE Configs
 192 @@ -129,6 +130,18 @@
 193         #define CONFIG_DOS_PARTITION    1
 194         #define CONFIG_CMD_FAT          1
 195  #endif
 196 +
 197 +/*
 198 + * I2C Configs
 199 + */
 200 +#ifdef CONFIG_CMD_I2C
 201 +       #define CONFIG_HARD_I2C         1
 202 +       #define CONFIG_I2C_MXC          1
 203 +       #define CONFIG_SYS_I2C_PORT             I2C1_BASE_ADDR
 204 +       #define CONFIG_SYS_I2C_SPEED            400000
 205 +       #define CONFIG_SYS_I2C_SLAVE            0xfe
 206 +#endif
 207 +
 208  /*
 209   * Eth Configs
 210   */
 211 diff --git a/include/configs/mx51_bbg_android.h b/include/configs/mx51_bbg_android.h
 212 index a0bb39e..5f7435d 100644
 213 --- a/include/configs/mx51_bbg_android.h
 214 +++ b/include/configs/mx51_bbg_android.h
 215 @@ -81,6 +81,7 @@
 216  #define CONFIG_CMD_MII
 217  #define CONFIG_CMD_NET
 218  #define CONFIG_NET_RETRY_COUNT 100
 219 +#define CONFIG_CMD_I2C
 220
 221  /*
 222   * Android support Configs
 223 @@ -256,6 +257,16 @@
 224         #define CONFIG_CMD_FAT          1
 225         #define CONFIG_CMD_EXT2         1
 226  #endif
 227 +
 228 +/*
 229 + * I2C Configs
 230 + */
 231 +#define CONFIG_HARD_I2C         1
 232 +#define CONFIG_I2C_MXC          1
 233 +#define CONFIG_SYS_I2C_PORT             I2C1_BASE_ADDR
 234 +#define CONFIG_SYS_I2C_SPEED            400000
 235 +#define CONFIG_SYS_I2C_SLAVE            0xfe
 236 +
 237  /*-----------------------------------------------------------------------
 238   * Stack sizes
 239   *
 240 diff --git a/include/configs/mx51_bbg_mfg.h b/include/configs/mx51_bbg_mfg.h
 241 index 4d35de2..becad73 100644
 242 --- a/include/configs/mx51_bbg_mfg.h
 243 +++ b/include/configs/mx51_bbg_mfg.h
 244 @@ -47,6 +47,7 @@
 245  #define CONFIG_DISPLAY_BOARDINFO
 246
 247  #define BOARD_LATE_INIT
 248 +
 249  /*
 250   * Disabled for now due to build problems under Debian and a significant
 251   * increase in the final file size: 144260 vs. 109536 Bytes.
 252 @@ -207,6 +208,8 @@
 253  /* TO1 boards */
 254  /* #define PHYS_SDRAM_1_SIZE   (128 * 1024 * 1024) */
 255  #define PHYS_SDRAM_1_SIZE      (512 * 1024 * 1024)
 256 +#define iomem_valid_addr(addr, size) \
 257 +       (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
 258
 259  /*-----------------------------------------------------------------------
 260   * FLASH and environment organization
 261 --
 262 1.5.4.4
 263