/*
- * Freescale i.MX28 common code
+ * Freescale i.MX23/i.MX28 common code
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
* on behalf of DENX Software Engineering GmbH
* Based on code from LTIB:
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/dma.h>
+#include <asm/imx-common/dma.h>
#include <asm/arch/gpio.h>
#include <asm/arch/iomux.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
+#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
-/* 1 second delay should be plenty of time for block reset. */
-#define RESET_MAX_TIMEOUT 1000000
-
-#define MXS_BLOCK_SFTRST (1 << 31)
-#define MXS_BLOCK_CLKGATE (1 << 30)
-
/* Lowlevel init isn't used on i.MX28, so just have a dummy here */
-inline void lowlevel_init(void) {}
+void lowlevel_init(void) {}
#define BOOT_CAUSE_MASK (RTC_PERSISTENT0_EXTERNAL_RESET | \
RTC_PERSISTENT0_ALARM_WAKE | \
#endif
}
-#define MX28_HW_DIGCTL_MICROSECONDS (void *)0x8001c0c0
-
-int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned
- int timeout)
-{
- uint32_t start = readl(MX28_HW_DIGCTL_MICROSECONDS);
-
- /* Wait for at least one microsecond for the bit mask to be set */
- while (readl(MX28_HW_DIGCTL_MICROSECONDS) - start <= 1 || --timeout) {
- if ((readl(®->reg) & mask) == mask) {
- while (readl(MX28_HW_DIGCTL_MICROSECONDS) - start <= 1)
- ;
- return 0;
- }
- udelay(1);
- }
-
- return !timeout;
-}
-
-int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned
- int timeout)
-{
- uint32_t start = readl(MX28_HW_DIGCTL_MICROSECONDS);
-
- /* Wait for at least one microsecond for the bit mask to be cleared */
- while (readl(MX28_HW_DIGCTL_MICROSECONDS) - start <= 1 || --timeout) {
- if ((readl(®->reg) & mask) == 0) {
- while (readl(MX28_HW_DIGCTL_MICROSECONDS) - start <= 1)
- ;
- return 0;
- }
- udelay(1);
- }
-
- return !timeout;
-}
-
-int mxs_reset_block(struct mxs_register_32 *reg)
-{
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, ®->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for SFTRST[%p] to clear: %08x\n",
- reg, readl(®->reg));
- return 1;
- }
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, ®->reg_clr);
-
- /* Set SFTRST */
- writel(MXS_BLOCK_SFTRST, ®->reg_set);
-
- /* Wait for CLKGATE being set */
- if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for CLKGATE[%p] to set: %08x\n",
- reg, readl(®->reg));
- return 1;
- }
-
- /* Clear SFTRST */
- writel(MXS_BLOCK_SFTRST, ®->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for SFTRST[%p] to clear: %08x\n",
- reg, readl(®->reg));
- return 1;
- }
-
- /* Clear CLKGATE */
- writel(MXS_BLOCK_CLKGATE, ®->reg_clr);
-
- if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) {
- printf("TIMEOUT waiting for CLKGATE[%p] to clear: %08x\n",
- reg, readl(®->reg));
- return 1;
- }
-
- return 0;
-}
-
+/*
+ * This function will craft a jumptable at 0x0 which will redirect interrupt
+ * vectoring to proper location of U-Boot in RAM.
+ *
+ * The structure of the jumptable will be as follows:
+ * ldr pc, [pc, #0x18] ..... for each vector, thus repeated 8 times
+ * <destination address> ... for each previous ldr, thus also repeated 8 times
+ *
+ * The "ldr pc, [pc, #0x18]" instruction above loads address from memory at
+ * offset 0x18 from current value of PC register. Note that PC is already
+ * incremented by 4 when computing the offset, so the effective offset is
+ * actually 0x20, this the associated <destination address>. Loading the PC
+ * register with an address performs a jump to that address.
+ */
void mx28_fixup_vt(uint32_t start_addr)
{
+ /* Jumptable location is 0x0 */
uint32_t *vt = (uint32_t *)0x20;
- int i;
+ uint32_t cr = get_cr();
- for (i = 0; i < 8; i++)
- vt[i] = start_addr + (4 * i);
+ /* cppcheck-suppress nullPointer */
+ memcpy(vt, (void *)start_addr + 0x20, 32);
+ set_cr(cr & ~CR_V);
}
#ifdef CONFIG_ARCH_MISC_INIT
}
#endif
-#ifdef CONFIG_ARCH_CPU_INIT
+#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+ case HW_DIGCTL_CHIPID_MX23:
+ return "23";
case HW_DIGCTL_CHIPID_MX28:
return "28";
default:
uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF;
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+ case HW_DIGCTL_CHIPID_MX23:
+ switch (rev) {
+ case 0x0:
+ return "1.0";
+ case 0x1:
+ return "1.1";
+ case 0x2:
+ return "1.2";
+ case 0x3:
+ return "1.3";
+ case 0x4:
+ return "1.4";
+ default:
+ return "??";
+ }
case HW_DIGCTL_CHIPID_MX28:
switch (rev) {
case 0x1:
/*
* Initializes on-chip ethernet controllers.
*/
-#if defined(CONFIG_MX28) && defined(CONFIG_CMD_NET)
+#if defined(CONFIG_SOC_MX28) && defined(CONFIG_CMD_NET)
int cpu_eth_init(bd_t *bis)
{
struct mxs_clkctrl_regs *clkctrl_regs =
writel(CLKCTRL_PLL2CTRL0_CLKGATE,
&clkctrl_regs->hw_clkctrl_pll2ctrl0_clr);
+ udelay(6000);
return 0;
}
#endif
-static void __mx28_adjust_mac(int dev_id, unsigned char *mac)
+__weak void mx28_adjust_mac(int dev_id, unsigned char *mac)
{
mac[0] = 0x00;
mac[1] = 0x04; /* Use FSL vendor MAC address by default */
mac[5] += 1;
}
-void mx28_adjust_mac(int dev_id, unsigned char *mac)
- __attribute__((weak, alias("__mx28_adjust_mac")));
-
#ifdef CONFIG_MX28_FEC_MAC_IN_OCOTP
#define MXS_OCOTP_MAX_TIMEOUT 1000000
projects / karo-tx-uboot.git / blobdiff