Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap3 / board.c

diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 89c587e3108aca523f71a3f3823a2e220fb43c6a..667e77ff05ba22429fdf101e0884856e5eb54e62 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -14,23 +14,7 @@
  *      Syed Mohammed Khasim <khasim@ti.com>
  *
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <spl.h>
@@ -98,11 +82,11 @@ int board_mmc_init(bd_t *bis)
 {
        switch (spl_boot_device()) {
        case BOOT_DEVICE_MMC1:
-               omap_mmc_init(0, 0, 0);
+               omap_mmc_init(0, 0, 0, -1, -1);
                break;
        case BOOT_DEVICE_MMC2:
        case BOOT_DEVICE_MMC2_2:
-               omap_mmc_init(1, 0, 0);
+               omap_mmc_init(1, 0, 0, -1, -1);
                break;
        }
        return 0;
@@ -110,11 +94,11 @@ int board_mmc_init(bd_t *bis)
 
 void spl_board_init(void)
 {
-#ifdef CONFIG_SPL_NAND_SUPPORT
+#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
        gpmc_init();
 #endif
 #ifdef CONFIG_SPL_I2C_SUPPORT
-       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 #endif
 }
 #endif /* CONFIG_SPL_BUILD */
@@ -163,7 +147,7 @@ void secure_unlock_mem(void)
  *             configure secure registers and exit secure world
  *              general use.
  *****************************************************************************/
-void secureworld_exit()
+void secureworld_exit(void)
 {
        unsigned long i;
 
@@ -194,7 +178,7 @@ void secureworld_exit()
  * Description: If chip is GP/EMU(special) type, unlock the SRAM for
  *              general use.
  *****************************************************************************/
-void try_unlock_memory()
+void try_unlock_memory(void)
 {
        int mode;
        int in_sdram = is_running_in_sdram();
@@ -306,8 +290,8 @@ void watchdog_init(void)
         * should not be running and does not generate a PRCM reset.
         */
 
-       sr32(&prcm_base->fclken_wkup, 5, 1, 1);
-       sr32(&prcm_base->iclken_wkup, 5, 1, 1);
+       setbits_le32(&prcm_base->fclken_wkup, 0x20);
+       setbits_le32(&prcm_base->iclken_wkup, 0x20);
        wait_on_value(ST_WDT2, 0x20, &prcm_base->idlest_wkup, 5);
 
        writel(WD_UNLOCK1, &wd2_base->wspr);
@@ -328,14 +312,25 @@ void abort(void)
  *****************************************************************************/
 static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
-       if (argc != 2)
+       if (argc < 2 || argc > 3)
                goto usage;
-       if (strncmp(argv[1], "hw", 2) == 0)
-               omap_nand_switch_ecc(1);
-       else if (strncmp(argv[1], "sw", 2) == 0)
-               omap_nand_switch_ecc(0);
-       else
+
+       if (strncmp(argv[1], "hw", 2) == 0) {
+               if (argc == 2) {
+                       omap_nand_switch_ecc(1, 1);
+               } else {
+                       if (strncmp(argv[2], "hamming", 7) == 0)
+                               omap_nand_switch_ecc(1, 1);
+                       else if (strncmp(argv[2], "bch8", 4) == 0)
+                               omap_nand_switch_ecc(1, 8);
+                       else
+                               goto usage;
+               }
+       } else if (strncmp(argv[1], "sw", 2) == 0) {
+               omap_nand_switch_ecc(0, 0);
+       } else {
                goto usage;
+       }
 
        return 0;
 
@@ -345,9 +340,13 @@ usage:
 }
 
 U_BOOT_CMD(
-       nandecc, 2, 1,  do_switch_ecc,
+       nandecc, 3, 1,  do_switch_ecc,
        "switch OMAP3 NAND ECC calculation algorithm",
-       "[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
+       "hw [hamming|bch8] - Switch between NAND hardware 1-bit hamming and"
+       " 8-bit BCH\n"
+       "                           ecc calculation (second parameter may"
+       " be omitted).\n"
+       "nandecc sw               - Switch to NAND software ecc algorithm."
 );
 
 #endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
@@ -479,11 +478,3 @@ void omap3_outer_cache_disable(void)
        omap3_update_aux_cr(0, 0x2);
 }
 #endif /* !CONFIG_SYS_L2CACHE_OFF */
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-}
-#endif /* !CONFIG_SYS_DCACHE_OFF */