Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap4 / sdram_elpida.c

diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index b9128faa5675c78cf2b26294e3e5d0c417adb0f9..d76dde719a1a00523d07f7879a10393ddc0071b3 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -7,23 +7,7 @@
  *
  * Aneesh V <aneesh@ti.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <asm/emif.h>
@@ -90,21 +74,28 @@ const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
        .emif_ddr_phy_ctlr_1            = 0x049ff418
 };
 
-/* Dummy registers for OMAP44xx */
-const u32 ddr3_ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG];
-
 const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80540300
+       .dmm_lisa_map_3 = 0x80540300,
+       .is_ma_present  = 0x0
 };
 
 const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80640300
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x0
+};
+
+const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {
+       .dmm_lisa_map_0 = 0xFF020100,
+       .dmm_lisa_map_1 = 0,
+       .dmm_lisa_map_2 = 0,
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x1
 };
 
 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
@@ -129,8 +120,10 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
 
        if (omap_rev == OMAP4430_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
-       else
+       else if (omap_rev < OMAP4460_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
+       else
+               *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
 }
 
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
@@ -284,3 +277,16 @@ void emif_get_device_timings(u32 emif_nr,
        __attribute__((weak, alias("emif_get_device_timings_sdp")));
 
 #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */
+
+const struct lpddr2_mr_regs mr_regs = {
+       .mr1    = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3,
+       .mr2    = 0x4,
+       .mr3    = -1,
+       .mr10   = MR10_ZQ_ZQINIT,
+       .mr16   = MR16_REF_FULL_ARRAY
+};
+
+void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs)
+{
+       *regs = &mr_regs;
+}