arm: do not compile relocate_code() for SPL builds

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / start.S

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 61da7acde910d37b67b45cdad80461cb3e85a2dc..3ade510da669b955cfe5382ed19ff00a8accc7ff 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -94,10 +94,6 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
-.globl _image_copy_end_ofs
-_image_copy_end_ofs:
-       .word __image_copy_end - _start
-
 .globl _bss_end_ofs
 _bss_end_ofs:
        .word __bss_end - _start
@@ -130,11 +126,15 @@ IRQ_STACK_START_IN:
 reset:
        bl      save_boot_params
        /*
-        * set the cpu to SVC32 mode
+        * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
+        * except if in HYP mode already
         */
        mrs     r0, cpsr
-       bic     r0, r0, #0x1f
-       orr     r0, r0, #0xd3
+       and     r1, r0, #0x1f           @ mask mode bits
+       teq     r1, #0x1a               @ test for HYP mode
+       bicne   r0, r0, #0x1f           @ clear all mode bits
+       orrne   r0, r0, #0x13           @ set SVC mode
+       orr     r0, r0, #0xc0           @ disable FIQ and IRQ
        msr     cpsr,r0
 
 /*
@@ -227,6 +227,8 @@ relocate_done:
 
        bx      lr
 
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -249,11 +251,9 @@ ENTRY(c_runtime_cpu_setup)
 /*
  * Move vector table
  */
-#if !defined(CONFIG_TEGRA)
        /* Set vector address in CP15 VBAR register */
        ldr     r0, =_start
        mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
-#endif /* !Tegra */
 
        bx      lr