imx: consolidate set_chipselect_size function

[karo-tx-uboot.git] / arch / arm / imx-common / cpu.c

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 5a09107c5ab3228441a7cd5de8aa7f375a4d3e6d..24740b860397a22049c975aa98d6b73e25397222 100644 (file)
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -7,7 +7,9 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
+#include <bootm.h>
 #include <common.h>
+#include <netdev.h>
 #include <asm/errno.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
@@ -93,6 +95,11 @@ unsigned imx_ddr_size(void)
        bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
        bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
        bits += ESD_MMDC_CTL_GET_CS1(ctl);
+
+       /* The MX6 can do only 3840 MiB of DRAM */
+       if (bits == 32)
+               return 0xf0000000;
+
        return 1 << bits;
 }
 #endif
@@ -112,6 +119,8 @@ const char *get_imx_type(u32 imxtype)
                return "6SOLO"; /* Solo version of the mx6 */
        case MXC_CPU_MX6SL:
                return "6SL";   /* Solo-Lite version of the mx6 */
+       case MXC_CPU_MX6SX:
+               return "6SX";   /* SoloX version of the mx6 */
        case MXC_CPU_MX51:
                return "51";
        case MXC_CPU_MX53:
@@ -178,3 +187,34 @@ void arch_preboot_os(void)
        ipuv3_fb_shutdown();
 }
 #endif
+
+void set_chipselect_size(int const cs_size)
+{
+       unsigned int reg;
+       struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+       reg = readl(&iomuxc_regs->gpr[1]);
+
+       switch (cs_size) {
+       case CS0_128:
+               reg &= ~0x7;    /* CS0=128MB, CS1=0, CS2=0, CS3=0 */
+               reg |= 0x5;
+               break;
+       case CS0_64M_CS1_64M:
+               reg &= ~0x3F;   /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
+               reg |= 0x1B;
+               break;
+       case CS0_64M_CS1_32M_CS2_32M:
+               reg &= ~0x1FF;  /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
+               reg |= 0x4B;
+               break;
+       case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
+               reg &= ~0xFFF;  /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
+               reg |= 0x249;
+               break;
+       default:
+               printf("Unknown chip select size: %d\n", cs_size);
+               break;
+       }
+
+       writel(reg, &iomuxc_regs->gpr[1]);
+}